EiceDRIVERTM
1ED020I12-F
Datasheet 6 Version 2.3, 2011-05-03
2 Functional Description
2.1 Introduction
The 1ED020I12-F is an advanced IGBT gate driver that
can be also used for driving power MOS devices.
Control and protection functions are included to make
possible the design of high reliability systems.
The device consists of two galvanic separated parts.
The input chip can be directly connected to a standard
5V DSP or microcontroller with CMOS in/output and the
output chip is connected to the high voltage side.
An effective active Miller clamp function avoids the
need of negative gate driving in most applications and
allows the use of a simple bootstrap supply for the high
side driver.
A rail-to-rail driver output enables the user to provide
easy clamping of the IGBTs gate voltage during short
circuit of the IGBT. So an increase of short circuit
current due to the feedback via the Miller capacitance
can be avoided. Further, a rail-to-rail output reduces
power dissipation.
The device also includes an IGBT desaturation
protection with a FAULT status output.
A READY status output reports if the device is supplied
and operates correctly.
2.2 Internal Protection Features
2.2.1 Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is
equipped with an undervoltage lockout for both chips.
If the power supply voltage VVCC1 of the input chip drops
below VUVLOL1 a turn-off signal is sent to the output chip
before power-down. The IGBT is switched off and the
signals at IN+ and IN- are ignored as long as VVCC1
reaches the power-up voltage VUVLOH1 .
If the power supply voltage VVCC2 of the output chip
goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored as long as VVCC2
reaches the power-up voltage VUVLOH2 .
2.2.2 READY status output
The READY output shows the status of three internal
protection features.
• UVLO of the input chip
• UVLO of the output chip after a short delay
• Internal signal transmission
It is not necessary to reset the READY signal since its
state only depends on the status of the former
protection signals.
2.2.3 Watchdog Timer
The 1ED020I12-F incorporates two level of signal
transmission security implemented through two
independent watchdog timers. First level ensures the
short term signal integrity by resending the (turn on/off)
signals with a watchdog period of typical 500ns. The
second level monitors during normal operation the
internal signal transmission. If the transmission fails for
a given time, the IGBT is switched off and the READY
output reports an internal error.
2.2.4 Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-
state if the output chip is not connected to the power
supply.
2.3 Non-Inverting and Inverting
Inputs
There are two possible input modes to control the
IGBT. At non-inverting mode IN+ controls the driver
output while IN- is set to low. At inverting mode IN-
controls the driver output while IN+ is set to high. A
minimum input pulse width is defined to filter occasional
glitches.
2.4 Driver Output
The output driver section uses only MOSFETs to
provide a rail-to-rail output. This feature permits that
tight control of gate voltage during on-state and short
circuit can be maintained as long as the drivers supply
is stable. Due to the low internal voltage drop, switching
behaviour of the IGBT is predominantly governed by
the gate resistor. Furthermore, it reduces the power to
be dissipated by the driver.