CY62148EV30 MoBL(R) 4-Mbit (512K x 8) Static RAM 4-Mbit (512K x 8) Static RAM Features Functional Description Very high speed: 45 ns Wide voltage range: 2.20 V to 3.60 V The CY62148EV30 is a high performance CMOS static RAM organized as 512K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery LifeTM (MoBL) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected (CE HIGH). The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW and WE LOW). Temperature range: Industrial: -40 C to +85 C Automotive-A: -40 C to +85 C Pin compatible with CY62148DV30 Ultra low standby power Typical standby current: 1 A Maximum standby current: 7 A (Industrial) Ultra low active power Typical active current: 2 mA at f = 1 MHz Easy memory expansion with CE and OE features Automatic power down when deselected Complementary metal oxide semiconductor (CMOS) for optimum speed and power Available in Pb-free 36-ball very fine-pitch ball grid array (VFBGA), 32-pin thin small outline package (TSOP) II, and 32-pin small outline integrated circuit (SOIC) [1] packages To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. For a complete list of related 1documentation, click here. Logic Block Diagram I/O0 IO0 INPUT BUFFER I/O1 IO1 I/O2 IO2 SENSE AMPS ROW DECODER A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 512K x 8 ARRAY I/O3 IO3 I/O4 IO4 I/O5 IO5 I/O6 IO6 I/O7 CE A17 A18 A15 A13 A14 OE A16 COLUMN DECODER WE IO7 POWER DOWN Note 1. SOIC package is available only in 55 ns speed bin. Cypress Semiconductor Corporation Document Number: 38-05576 Rev. *V * 198 Champion Court * San Jose, CA 95134-1709 * 408-943-2600 Revised January 25, 2018 CY62148EV30 MoBL(R) Contents Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ...................................................................... 5 Thermal Resistance .......................................................... 5 AC Test Loads and Waveforms ....................................... 5 Data Retention Characteristics ....................................... 6 Data Retention Waveform ................................................ 6 Switching Characteristics ................................................ 7 Switching Waveforms ...................................................... 8 Truth Table ...................................................................... 10 Document Number: 38-05576 Rev. *V Ordering Information ...................................................... 11 Ordering Code Definitions ......................................... 11 Package Diagrams .......................................................... 12 Acronyms ........................................................................ 15 Document Conventions ................................................. 15 Units of Measure ....................................................... 15 Document History Page ................................................. 16 Sales, Solutions, and Legal Information ...................... 19 Worldwide Sales and Design Support ....................... 19 Products .................................................................... 19 PSoC(R) Solutions ...................................................... 19 Cypress Developer Community ................................. 19 Technical Support ..................................................... 19 Page 2 of 19 CY62148EV30 MoBL(R) Pin Configuration VFBGA, SOIC and TSOP II pinouts are as follows. [2, 3] 36-ball VFBGA pinout 32-pin SOIC/TSOP II pinout Top View Top View A0 A1 NC A3 A6 A8 A I/O4 A2 WE A4 A7 I/O0 B NC A5 I/O1 C I/O5 VSS Vcc D VCC Vss E I/O2 F I/O6 A18 A17 I/O7 OE CE A16 A15 I/O3 G A9 A10 A11 A12 A13 A14 H A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 32 31 2 3 4 30 29 5 6 28 27 26 25 7 8 9 10 11 12 13 14 15 16 24 23 22 21 20 19 18 17 VCC A15 A18 WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 Product Portfolio Product Range CY62148EV30LL VFBGA TSOP II SOIC Industrial VCC Range (V) Min Typ [4] Max 2.2 3.0 3.6 2.2 3.0 3.6 Speed (ns) Power Dissipation Operating ICC (mA) f = 1 MHz f = fmax Standby ISB2 (A) Typ [4] Max Typ [4] Max Typ [4] Max 45 2 2.5 15 20 1 7 55 2 2.5 15 20 1 7 Industrial / Automotive-A Industrial Notes 2. SOIC package is available only in 55 ns speed bin. 3. NC pins are not connected on the die. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 C. Document Number: 38-05576 Rev. *V Page 3 of 19 CY62148EV30 MoBL(R) DC input voltage [5, 6] ...................-0.3 V to VCC(max) + 0.3 V Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage temperature ................................ -65 C to +150 C Ambient temperature with power applied ..................................... 55 C to +125 C Output current into outputs (LOW) ............................. 20 mA Static discharge voltage (MIL-STD-883, Method 3015) ................................ > 2001 V Latch up current ..................................................... > 200 mA Operating Range Supply voltage to ground potential .......................-0.3 V to VCC(max) + 0.3 V DC voltage applied to outputs in High Z State [5, 6] ......................-0.3 V to VCC(max) + 0.3 V Product Range CY62148EV30 Industrial / Automotive-A Ambient VCC[7] Temperature -40 C to +85 C 2.2 V to 3.6 V Electrical Characteristics Over the Operating Range Parameter VOH Description Test Conditions Output high voltage IOH = -0.1 mA IOH = -1.0 mA, VCC > 2.70 V VOL Output low voltage VIH Input high voltage VIL Input low voltage -45 (Industrial / Automotive-A) Min Typ [9] Max -55 [8] Min Typ [9] Unit Max 2.0 - - 2.0 - - V 2.4 - - 2.4 - - V IOL = 0.1 mA - - 0.4 - - 0.2 V IOL = 2.1 mA, VCC > 2.70 V - - 0.4 - - 0.4 V 1.8 - VCC + 0.3 1.8 - VCC + 0.3 V VCC + 0.3 2.2 VCC = 2.2 V to 2.7 V VCC = 2.7 V to 3.6 V 2.2 - - VCC + 0.3 V VCC = 2.2 V to 2.7 V For VFBGA and TSOP II packages -0.3 - 0.6 - - - V - - - -0.3 - 0.4 [10] V -0.3 - 0.8 - - - V - - - -0.3 - 0.6 [10] For SOIC package VCC = 2.7 V to 3.6 V For VFBGA and TSOP II packages For SOIC package IIX Input leakage current GND < VI < VC -1 - +1 -1 - +1 A IOZ Output leakage current GND < VO < VCC, Output disabled -1 - +1 -1 - +1 A ICC VCC operating supply current f = fmax = 1/tRC - 15 20 - 15 20 mA - 2 2.5 - 2 2.5 f = 1 MHz VCC = VCC(max), IOUT = 0 mA, CMOS levels ISB1 [11] Automatic CE power CE > VCC - 0.2 V, down current - VIN > VCC - 0.2 V, VIN < 0.2 V, f = fmax (Address and Data Only), CMOS inputs f = 0 (OE and WE), VCC = 3.60 V - 1 7 - 1 7 A ISB2 [11] Automatic CE power CE > VCC - 0.2 V, down current - VIN > VCC - 0.2 V or VIN < 0.2 V, CMOS inputs f = 0, VCC = 3.60 V - 1 7 - 1 7 A Notes 5. VIL(min) = -2.0 V for pulse durations less than 20 ns. 6. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 7. Full device AC operation assumes a minimum of 100 s ramp time from 0 to VCC(min) and 200 s wait time after VCC stabilization. 8. SOIC package is available only in 55 ns speed bin. 9. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 C. 10. Under DC conditions the device meets a VIL of 0.8V (for VCC range of 2.7 V to 3.6 V) and 0.6 V (for VCC range of 2.2 V to 2.7 V). However, in dynamic conditions Input LOW voltage applied to the device must not be higher than 0.6V and 0.4V for the above ranges. This is applicable to SOIC package only. 11. Chip Enable (CE) must be HIGH at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. Document Number: 38-05576 Rev. *V Page 4 of 19 CY62148EV30 MoBL(R) Capacitance Parameter [12] Description CIN Input capacitance COUT Output capacitance Test Conditions TA = 25 C, f = 1 MHz, VCC = VCC(typ) Max Unit 10 pF 10 pF 32-pin SOIC Package Unit Thermal Resistance Parameter [12] Description JA Thermal resistance (junction to ambient) JC Thermal resistance (junction to case) 36-ball VFBGA 32-pin TSOP II Package Package Test Conditions Still air, soldered on a 3 x 4.5 inch, four-layer printed circuit board 44.79 59.10 51.57 C/W 23.17 12.19 25.01 C/W AC Test Loads and Waveforms Figure 1. AC Test Loads and Waveforms R1 VCC OUTPUT ALL INPUT PULSES VCC 30 pF 10% R2 INCLUDING JIG AND SCOPE 90% GND Rise Time = 1 V/ns Equivalent to: 90% 10% Fall Time = 1 V/ns THEVENIN EQUIVALENT OUTPUT RTH VTH Parameters 2.50 V 3.0 V Unit R1 16667 1103 R2 15385 1554 RTH 8000 645 VTH 1.20 1.75 V Note 12. Tested initially and after any design or process changes that may affect these parameters. Document Number: 38-05576 Rev. *V Page 5 of 19 CY62148EV30 MoBL(R) Data Retention Characteristics Over the Operating Range Parameter VDR ICCDR Description Min Typ [13] Max Unit 1.5 - - V - 0.8 7 A 0 - - ns CY62148EV30LL-45 45 - - ns CY62148EV30LL-55 55 - - ns Conditions VCC for data retention [14] Data retention current VCC = 1.5 V, CE > VCC - 0.2 V, VIN > VCC - 0.2 V or VIN < 0.2 V tCDR[15] Chip deselect to data retention time tR[16] Operation recovery time Industrial / Automotive-A Data Retention Waveform Figure 2. Data Retention Waveform DATA RETENTION MODE VCC VCC(min) tCDR VDR > 1.5 V VCC(min) tR CE Notes 13. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 C. 14. Chip Enable (CE) must be HIGH at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. 15. Tested initially and after any design or process changes that may affect these parameters. 16. Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s. Document Number: 38-05576 Rev. *V Page 6 of 19 CY62148EV30 MoBL(R) Switching Characteristics Over the Operating Range Parameter [17, 18] Description -45 (Industrial / Automotive-A) Min -55 [19] Max Min Unit Max Read Cycle tRC Read cycle time 45 - 55 - ns tAA Address to data valid - 45 - 55 ns tOHA Data hold from address change 10 - 10 - ns tACE CE LOW to data valid - 45 - 55 ns tDOE OE LOW to data valid - 22 - 25 ns tLZOE OE LOW to Low Z [20] 5 - 5 - ns - 18 - 20 ns 10 - 10 - ns tHZOE tLZCE OE HIGH to High Z CE LOW to Low Z [20, 21] [20] [20, 21] tHZCE CE HIGH to High Z - 18 - 20 ns tPU CE LOW to power-up 0 - 0 - ns CE HIGH to power-down - 45 - 55 ns tPD Write Cycle [22, 23] tWC Write cycle time 45 - 55 - ns tSCE CE LOW to write end 35 - 40 - ns tAW Address setup to write end 35 - 40 - ns tHA Address hold from write end 0 - 0 - ns tSA Address setup to write start 0 - 0 - ns tPWE WE pulse width 35 - 40 - ns tSD Data setup to write end 25 - 25 - ns tHD Data hold from write end 0 - 0 - ns - 18 - 20 ns 10 - 10 - ns [20, 21] tHZWE WE LOW to High Z tLZWE WE HIGH to Low Z [20] Notes 17. In an earlier revision of this device, under a specific application condition, READ and WRITE operations were limited to switching of the chip enable signal as described in the Application Note AN66311. However, the issue has been fixed and in production now, and hence, this Application Note is no longer applicable. It is available for download on our website as it contains information on the date code of the parts, beyond which the fix has been in production. 18. Test Conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of VCC(typ)/2, input pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH as shown in the Figure 1 on page 5. 19. SOIC package is available only in 55 ns speed bin. 20. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 21. tHZOE, tHZCE, and tHZWE transitions are measured when the output enter a high impedance state. 22. The internal write time of the memory is defined by the overlap of WE, CE = VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write. 23. The minimum write cycle pulse width for Write Cycle No. 3 (WE Controlled, OE LOW) should be equal to the sum of tSD and tHZWE. Document Number: 38-05576 Rev. *V Page 7 of 19 CY62148EV30 MoBL(R) Switching Waveforms Figure 3. Read Cycle No. 1 (Address Transition Controlled) [24, 25] tRC RC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Figure 4. Read Cycle No. 2 (OE Controlled) [25, 26] ADDRESS tRC CE tACE OE tHZOE tDOE tHZCE tLZOE HIGH IMPEDANCE DATA OUT DATA VALID tLZCE tPD tPU VCC SUPPLY CURRENT HIGH IMPEDANCE 50% 50% ICC ISB Figure 5. Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [27, 28] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE OE tSD DATA I/O NOTE 29 tHD DATA VALID tHZOE Notes 24. Device is continuously selected. OE, CE = VIL. 25. WE is HIGH for read cycles. 26. Address valid before or similar to CE transition LOW. 27. Data I/O is high impedance if OE = VIH. 28. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 29. During this period, the I/Os are in output state. Do not apply input signals. Document Number: 38-05576 Rev. *V Page 8 of 19 CY62148EV30 MoBL(R) Switching Waveforms (continued) Figure 6. Write Cycle No. 2 (CE Controlled) [30, 31] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATA I/O tHD DATA VALID Figure 7. Write Cycle No. 3 (WE Controlled, OE LOW) [31, 32] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE tSD DATA I/O NOTE 33 tHD DATA VALID tHZWE tLZWE Notes 30. Data I/O is high impedance if OE = VIH. 31. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 32. The minimum write cycle pulse width should be equal to the sum of tSD and tHZWE. 33. During this period, the I/Os are in output state. Do not apply input signals. Document Number: 38-05576 Rev. *V Page 9 of 19 CY62148EV30 MoBL(R) Truth Table CE [34] WE OE H X X High Z Deselect/Power down Standby (ISB) L H L Data out Read Active (ICC) L H H High Z Output disabled Active (ICC) L L X Data in Write Active (ICC) Inputs/Outputs Mode Power Note 34. Chip enable must be at CMOS levels (not floating). Intermediate voltage levels on this pin is not permitted. Document Number: 38-05576 Rev. *V Page 10 of 19 CY62148EV30 MoBL(R) Ordering Information Speed (ns) 45 55 Ordering Code Package Diagram Package Type CY62148EV30LL-45BVI 51-85149 36-ball VFBGA CY62148EV30LL-45BVXI 51-85149 36-ball VFBGA (Pb-free) CY62148EV30LL-45BVXIT 51-85149 36-ball VFBGA (Pb-free) CY62148EV30LL-45ZSXI 51-85095 32-pin TSOP II (Pb-free) CY62148EV30LL-55SXI 51-85081 32-pin SOIC (Pb-free) Operating Range Industrial Industrial Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions CY 621 4 8 E V30 LL - XX XX X X X Option: T = Tape and Reel; Blank = Standard Temperature Grade: X = I or A I = Industrial; A = Automotive-A Pb-free Package Type: XX = BV or ZS or S BV = 36-ball VFBGA ZS = 32-pin TSOP II S = 32-pin SOIC Speed Grade: XX = 45 ns or 55 ns LL = Low Power V30 = 3 V (typical) Process Technology: E = 90 nm Bus width: 8 = x 8 Density: 4 = 4-Mbit Family Code: 621 = MoBL SRAM family Company ID: CY = Cypress Document Number: 38-05576 Rev. *V Page 11 of 19 CY62148EV30 MoBL(R) Package Diagrams Figure 8. 36-ball VFBGA (6 x 8 x 1.0 mm) VCF036/BV36/BZ36/BZ36A Package Outline, 51-85149 2X 0.10 C E1 E B A 6 5 4 3 2 1 7 A1 CORNER (datum B) A1 CORNER A 6 B SD C D D1 D E (datum A) F G H eD 6 0.10 C 2X eE SE TOP VIEW BOTTOM VIEW 0.25 C DETAIL A A1 0.10 C C 36XOb 5 A O0.25 M C A B O0.05 M C SIDE VIEW DETAIL A SYMBOL A A1 NOTES: DIMENSIONS MIN. NOM. MAX. - - 1.00 - - 0.16 D 8.00 BSC E 6.00 BSC D1 5.25 BSC E1 3.75 BSC MD 8 ME 6 N 0.30 0.25 eD 0.75 BSC eE 0.75 BSC SD 0.375 BSC SE 0.375 BSC 2. SOLDER BALL POSITION DESIGNATION PER JEP95, SECTION 3, SPP-020. 3. "e" REPRESENTS THE SOLDER BALL GRID PITCH. 4. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. N IS THE NUMBER OF POPULATED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. 5. DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 6. "SD" AND "SE" ARE MEASURED WITH RESPECT TO DATUMS A AND B AND 36 b 1. ALL DIMENSIONS ARE IN MILLIMETERS. 0.35 DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW "SD" OR "SE" = 0. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW "SD" = eD/2 AND "SE" = eE/2. 7. A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK METALIZED MARK, INDENTATION OR OTHER MEANS. 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED SOLDER BALLS. 51-85149 *G Document Number: 38-05576 Rev. *V Page 12 of 19 CY62148EV30 MoBL(R) Package Diagrams (continued) Figure 9. 32-pin TSOP II (20.95 x 11.76 x 1.0 mm) ZS32 Package Outline, 51-85095 51-85095 *D Document Number: 38-05576 Rev. *V Page 13 of 19 CY62148EV30 MoBL(R) Package Diagrams (continued) Figure 10. 32-pin SOIC (450 Mils) S32.45/SZ32.45 Package Outline, 51-85081 51-85081 *E Document Number: 38-05576 Rev. *V Page 14 of 19 CY62148EV30 MoBL(R) Acronyms Acronym Document Conventions Description Units of Measure BHE Byte High Enable BLE Byte Low Enable C degree Celsius CMOS Complementary Metal Oxide Semiconductor A microampere CE Chip Enable mA milliampere I/O Input/Output ns nanosecond OE Output Enable pF picofarad V volt W watt SRAM Static Random Access Memory TSOP Thin Small Outline Package VFBGA Very Fine-Pitch Ball Grid Array WE Write Enable Document Number: 38-05576 Rev. *V Symbol Unit of Measure Page 15 of 19 CY62148EV30 MoBL(R) Document History Page Document Title: CY62148EV30 MoBL(R), 4-Mbit (512K x 8) Static RAM Document Number: 38-05576 Region ECN Orig. of Change Submission Date Description of Change ** 223225 AJU 05/05/2004 New data sheet. *A 247373 SYT 07/28/2004 Changed status from Advance Information to Preliminary. Updated Operating Range (Updated Note 7 (Changed VCC stabilization time from 100 s to 200 s)). Updated Data Retention Characteristics (Changed maximum value of ICCDR parameter from 2.0 A to 2.5 A; changed minimum value of tR parameter from 100 s to tRC ns). Updated Switching Characteristics (Changed minimum value of tOHA parameter from 6 ns to 10 ns for both 35 ns and 45 ns speed bin; changed maximum value of tDOE parameter from 15 ns to 18 ns for 35 ns speed bin; changed maximum value of tHZOE, tHZWE parameters from 12 ns to 15 ns for 35 ns speed bin and 15 ns to 18 ns for 45 ns speed bin; changed minimum value of tSCE from 25 ns to 30 ns for 35 ns speed bin and 40 ns to 35 ns for 45 ns speed bin; changed maximum value of tHZCE parameter from 12 ns to 18 ns for 35 ns speed bin and 15 ns to 22 ns for 45 ns speed bin; changed minimum value of tSD parameter from 15 ns to 18 ns for 35 ns speed bin and 20 ns to 22 ns for 45 ns speed bin). Updated Ordering Information (Updated part numbers (Changed to include Pb-free Packages)). *B 414807 ZSD 12/16/2005 Changed status from Preliminary to Final. Changed the address of Cypress Semiconductor Corporation on page 1 from "3901 North First Street" to "198 Champion Court". Updated Features (Removed 35 ns speed bin). Updated Pin Configuration (Changed ball C3 from DNU to NC; removed the Note "DNU pins have to be left floating or tied to VSS to ensure proper application." and its reference; added 32-pin SOIC pinout). Updated Electrical Characteristics (Removed "L" version of CY62148EV30; changed maximum value of ICC parameter from 2 mA to 2.5 mA and typical value of ICC parameter from 1.5 mA to 2 mA at f = 1 MHz; changed typical value of ICC parameter from 12 mA to 15 mA at f = fmax; changed typical value of ISB1 and ISB2 parameters from 0.7 A to 1 A and maximum value of ISB1 and ISB2 parameters from 2.5 A to 7 A). Updated AC Test Loads and Waveforms (Changed the AC test load capacitance value from 50 pF to 30 pF). Updated Data Retention Characteristics (Changed maximum value of ICCDR parameter from 2.5 A to 7 A; added typical value of ICCDR parameter). Updated Switching Characteristics (Changed minimum value of tLZOE parameter from 3 ns to 5 ns; changed minimum value of tLZCE and tLZWE parameters from 6 ns to 10 ns; changed maximum value of tHZCE parameter from 22 ns to 18 ns; changed minimum value of tPWE parameter from 30 ns to 35 ns; changed minimum value of tSD from 22 ns to 25 ns). Updated Ordering Information (Updated part numbers; and replaced the Package Name column with Package Diagram). Updated Package Diagrams (spec 51-85149 - Changed revision from *B to *C; added 51-85081 *B). Updated to new template. *C 464503 NXR 05/25/2006 Updated Product Portfolio (Included Automotive Range). Updated Operating Range (Included Automotive Range). Updated Electrical Characteristics (Included Automotive Range). Updated Data Retention Characteristics (Included Automotive Range). Updated Switching Characteristics (Included Automotive Range). Updated Ordering Information (Updated part numbers (Included Automotive parts and their related information)). Document Number: 38-05576 Rev. *V Page 16 of 19 CY62148EV30 MoBL(R) Document History Page (continued) Document Title: CY62148EV30 MoBL(R), 4-Mbit (512K x 8) Static RAM Document Number: 38-05576 Region ECN Orig. of Change Submission Date *D 833080 VKN 03/09/2007 Updated Electrical Characteristics (Added VIL parameter for SOIC package, added Note 10 and referred the same note in the maximum value of VIL parameter for SOIC package). *E 890962 VKN 03/30/2007 Updated Features (Added Note 1 and referred the same note in 32-pin SOIC package). Updated Product Portfolio (Removed Automotive Range). Updated Operating Range (Removed Automotive Range). Updated Electrical Characteristics (Removed Automotive Range; added Note 11 and referred the same note in ISB2 parameter). Updated Data Retention Characteristics (Removed Automotive Range). Updated Switching Characteristics (Removed Automotive Range). Updated Switching Characteristics (Added values for all parameters for 55 ns Industrial range). Updated Ordering Information (Updated part numbers). *F 987940 VKN 04/18/2007 Updated Electrical Characteristics (Changed maximum value of VOL parameter from 0.4 V to 0.2 V for Industrial Range at IOL = 0.1 mA; changed maximum value of VIL parameter from 0.6 V to 0.4 V for Industrial Range, SOIC package at VCC = 2.2 V to 2.7 V; updated Note 10; updated Note 11 (made the note applicable for both ISB2 and ICCDR parameters). *G 2548575 NXR 08/05/2008 Updated Features (Included Automotive-A Range). Updated Product Portfolio (Included Automotive-A Range). Updated Operating Range (Included Automotive-A Range). Updated Electrical Characteristics (Included Automotive-A Range). Updated Data Retention Characteristics (Included Automotive-A Range). Updated Switching Characteristics (Included Automotive-A Range). Updated Ordering Information (Updated part numbers (Included Automotive-A parts and their related information)). Updated to new template. *H 2769239 VKN / AESA 09/25/2009 Updated Ordering Information (Updated part numbers). *I 2944332 VKN 06/04/2010 Updated Truth Table: Added Note 34 and referred the same note in CE column. Updated Package Diagrams: spec 51-85149 - Changed revision from *C to *D. spec 51-85095 - Changed revision from ** to *A. spec 51-85081 - Changed revision from *B to *C. *J 3007403 AJU 08/13/2010 Updated Ordering Information: No change in part numbers. Added Ordering Code Definitions. Updated to new template. Completing Sunset Review. *K 3110202 PRAS 12/14/2010 Updated Logic Block Diagram. Updated Ordering Information: No change in part numbers. Updated Ordering Code Definitions. *L 3302901 RAME 07/06/2011 Updated Functional Description (Removed the reference of AN1064). Updated Ordering Information: No change in part numbers. Updated Ordering Code Definitions. Updated Package Diagrams: spec 51-85095 - Changed revision from *A to *B. Updated to new template. Completing Sunset Review. Document Number: 38-05576 Rev. *V Description of Change Page 17 of 19 CY62148EV30 MoBL(R) Document History Page (continued) Document Title: CY62148EV30 MoBL(R), 4-Mbit (512K x 8) Static RAM Document Number: 38-05576 Region ECN Orig. of Change Submission Date *M 3363097 AJU 09/07/2011 Updated Data Retention Characteristics (Corrected Note cross-reference for ICCDR parameter (Added Note 14 and referred the same note in ICCDR parameter)). Updated Package Diagrams: spec 51-85149 - Changed revision from *D to *E. spec 51-85081 - Changed revision from *C to *D. *N 3546715 TAVA 03/09/2012 Updated Electrical Characteristics (Updated Note 10 (Removed the line "Refer to AN13470 for details".)). *O 3733339 JISH 09/04/2012 Minor text edits. Completing Sunset Review. *P 4102967 VINI 08/23/2013 Updated Switching Characteristics: Added Note 17 and referred the same note in "Parameter" column. Updated Package Diagrams: spec 51-85081 - Changed revision from *D to *E. Updated to new template. Completing Sunset Review. *Q 4307881 NILE 04/09/2014 Updated Switching Characteristics: Updated description of tPD parameter (Replaced "CE HIGH to power-up" with "CE HIGH to power-down"). *R 4576526 NILE 11/21/2014 Updated Functional Description: Added "For a complete list of related 1documentation, click here." at the end. Updated Switching Characteristics: Added Note 23 and referred the same note in "Write Cycle". Updated Switching Waveforms: Added Note 32 and referred the same note in Figure 7. *S 4802206 NILE 06/18/2015 Updated Package Diagrams: spec 51-85149 - Changed revision from *E to *F. spec 51-85095 - Changed revision from *B to *D. Updated to new template. *T 5234869 NILE 04/22/2016 Updated Ordering Information: Updated part numbers. Updated Ordering Code Definitions (Added Tape and Reel option). Updated Package Diagrams: spec 51-85149 - Changed revision from *F to *G. Updated to new template. *U 5480386 VINI 10/18/2016 Updated Thermal Resistance: Replaced "two-layer" with "four-layer" in "Test Conditions" column. Updated values of JA parameter and JC parameter corresponding to all packages. Updated to new template. Completing Sunset Review. *V 6045156 VINI 01/25/2018 Updated Ordering Information: Updated part numbers. Updated to new template. Document Number: 38-05576 Rev. *V Description of Change Page 18 of 19 CY62148EV30 MoBL(R) Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. 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