MITSUBISHI M56694FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M56694 is a semiconductor integrated circuit that has a built- in, 32-bit shift register and a latch of CMOS structure with serial input and serial/parallel output, and a 32-bit totem-pole-type parallel output driver of high pressure proof DMOS structure. Employed are Bi-CMOS and high pressure proof DMOS processing technology. FEATURES @ Serial input-serial/parallel output @ Cascade connections possible through serial output @ Latch circuit included for each stage M56694FP @ Driver section supply voltage: VH=120V @ Operating temperature: -20 75C EIGIENSIEISeleiele is! z ? APPLICATION Vacuum Fluorescent Display ANODE DRIVER FUNCTION The M56694 comprises a 32-bit D type flip-flop with 32 latches connected to its output. Outline 44P6N-A (FP) In accordance with truth table 1, inputting data to SIN and clock pulse to CLK allows SIN signal to be put into the internal shift register when the clock changes from H to L, and simultaneously shift register data to be shifted sequentially. Serial output SOUT is used by connecting to the next stage M56694 SIN when more than one M56694 is used to expand bits o z HOzo HVOe1 HVOx2 in the series. In accordance with truth table 2, parallel output allows the latch to data through if LAT input is turned to "H, and data to b Nc By zd N.C pass data through i input is turned to H, and data to be HVOr foal Fa] N.C retained if LAT input is turned to L. Driver output HVOn allows HVOx0 bal 24 HVGe3 data frorn the latch to be output if BLK input is tumed to L, and L HO [40 [21] HVOe4 to be output if BLK input is turned to H, irrespective of data from HVO fay [ad HVOes HVO 7 [a2 MS56694GP lig) HVGes the latch. n.c Eg iq] HVOe7 HVO 6 [44 it] HVOes HVOs [45 lie] HVGzs HVO 4 [46| li] HVOz0 HVO s [47] O [14] HVOs1 HVO 2 [aa Li HVOs2 ES) SS) S| | ES) ~-aQ ftzElKa Sra 95 5a 5ld gS 8" 5 Ta oI 8 a Outline 48P6D-A (GP) N.C: no connection MITSUBISHI M56694FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER BLOCK DIAGRAM (Note : Pin No. in paretheses are of M56694GP} HVO1 HVO2 HVO3 q...-------- HVOso HVO3si HVOs2 (1) (48) (47) (15) (14) (13) Output (2) protect Jf f\ fN\N 8 fK\ -WWHHHHeHeeee 2VH circuit /\ (11) (3)(11) vor @) ro tnecncceeeeee: CG) PGND (2)(12) BLK (4)-e2 OT Tt~ M56694FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCGHED DRIVER PIN FUNCTION DESCRIPTION Pin name Function VbD Logic stage supply voltage LGND Logic stage ground VH Output stage supply voltage PGND Output stage ground = Clock input for the internal shift resister. The data enter the internal shift resisters and the data in the shift registers will be CLK shifted in order by High to Low change of the clock. SIN Serial data input SOUT Serial data output LAT Latch input. When the LATGH is set to H, the data in the shift resister will enter the each latch circuit. When the LATCH inputis set to L, the data will be held. BLK Enable input for output control. When the BLK input is set to L, data in the latch circuit will appear at outputs. When the BLK input is set to H, all outputs will be set to L. HVO1-32 = | Output driver (push-pull) ABSOLUTE MAXIMUM RATINGS (Ta=25C, unless otherwise noted) VDD VH VI Vo rameter Logic stage supply voltage vol ci ts voltage vol Power dissipation range 8 re ran ons Data ou High supply voltage output pin Ta 25C RECOMMENDED OPERATING CONDITIONS Vbpb VH T Parameter Supply voltage rature Conditions ngs -0.3-7 -0.3-120 -0.3 Vpp40.3 -0.3 VbD+0.3 -0.3 VH 940 -55- 150 ELECTRICAL CHARACTERISTICS (Vop=5V, VH=110V and Ta=25C, unless otherwise noted) we Limits . Symbol Parameter Test conditions Win, Typ. Max Unit Ibp Supply current 1 No load 1 2 mA Qutput all L, no load 0 50 A IH Suppl t2 uPPIY curren Output all H, no load 2 4 mA IH H input current VIH=5V Input pin 0 2 pA wpost SIN, LAT, CLK 0 pA iL L input current VIL = OV BLK 30 100 uA VHVOH Driver output voltage IHVOH = -0.5mA 100 106 Vv VHVOL P g IHVOL = 0.5mA a7 2 VOH Loci tout volt IoH = -0.1mMA 4.5 4.95 Vv VoL ogic oulput vouage lo. = +0.1mA 0.04 | 04 IHVOH H output current High supply voltage output pin 1 3 mA IHVOL L output current High supply voltage output pin 1 3 mA VTH . 3.4 Vv Vic Output protect operating voltage 31 V MITSUBISHI M56694FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER SWITCHING CHARACTERISTICS (VbD=5V, VH=110V and Ta=25C, unless otherwise noted) Symbol Parameter Test condi Limits Unit ymbo aral est conditions Min- Typ. | Max. ni {CLK Clock frequency Duty = 45 55% 8 MHz t PLH(SO) . a 120 300 ns CL = 15pF t PHL(SO) Logic output propagation time P 100 300 ns {PLH(OUT) Dri tput tion ti ' e TPHL(QUT) | ~ "YE! SUIPUE Propagation time RO = 220KO 0i6 | 1 Us trout CO = 50pF ; Driver output rise and fall time 13 | 25 | us t fout 0.35 2 Ls TEST CIRCUIT input VDD VH (1) Pulse generator characteristics trs20ns tf<20ns (2) Capacitance CL includes connection ' C) SOUT floating capacitance and probe input capacitance. > RO=220K2 PG DUT aL CL : CO=50pF HVOn cO RO TIMING WAVEFORM : 1/fmax \ SOUT SIN HOn tsu 1 th : trso. ree 90% | soit 50% <$ >! tPLH(SO) trout tfout 1 eM g0% 90% Me Ae 50% of SK! i 10%ge 80 8% FSi 0% et . tPHL{OUT) TYPICAL CHARACTERISTICS Thermal derating 1.0 0.94 = ao o c N 2 s G 05 2 a = f=) o Q 0 25 50 75 100 Temperature Ta(C) Duty cycle vs Permissible output current 10 Q-@ 9 4 = 8 = xr 7 6 c 2 5 3 a 5 3 Oo 20 40 60 80 100 Duty cycle (%) Note *Ta=25C * Repeated frequency >100Hz *Figure in the circle represents the number of concurrently operating cutput circuits. * Current value denotes a numerical value per circuit. MITSUBISHI M56694FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER H output current lou{mA) Output current lou(mA) Note Note 1. Vop=5V and VH=110V, unless otherwise noted 2. Thermal derating characteristics represent those of an individual IC unit. 3. Allowable duty cycle output current characteristics represent that when a standard substrate is mounted. (Standard substrate: 70x70x1.6mm glass epoxy) Driver output VON-IOH 10 | | Ta=+75C & | Taas25C 7 6 Ta=-20C <7] 4 2 / Q S 0 2 4 6 8 10 H output voltage Von(V) Duty cycle vs Permissible output current )-@ 9 9 8 7 6 5 3 2 1 o Q 20 40 60 80 100 Duty cycle (%) *Ta=75C * Repeated frequency >100Hz *Figure in the circle represents the number of concurrently operating cutput circuits. * Current value denotes a numerical value per circuit.