1www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 and LCDA15C-8
Low Capacitance TVS Diode Array
For Multi-mode Transceiver Protection
Features
Circuit Diagram Schematic & PIN Configuration
Revision 02/18/05
The LCDAxxC-8 has been specifically designed to
protect sensitive components which are connected to
data and transmission lines from over voltages caused
by electrostatic discharge (ESD), electrical fast tran-
sients (EFT), and lightning.
The low capacitance array configuration of the
LCDAxxC-8 allows the user to protect eight high-speed
data or I/O lines. They may be used on systems
operating from 5 to 15 Volts. The high surge capability
(500W, tp=8/20µs) makes the LCDAxxC-8 suitable for
telecommunications systems operating in harsh tran-
sient environments. The low inductance construction
minimizes voltage overshoot during high current
surges.
The features of the LCDAxxC-8 are ideal for protecting
multi-protocol transceivers in WAN applications such as
Frame Relay systems, routers, and switches. Applications
Mechanical Characteristics
Multi-Mode Transceiver Protection
WAN Equipment:
CSU/DSU
Multiplexers
Routers
ISP Equipment
Customer Premise Equipment
Protection for any of the following interfaces:
RS-232 (V.28)
RS-422 (V.11, X.21)
RS-449 (V.11/V.10)
Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 0.5kV, 12A (8/20µs)
Protects eight I/O lines
Low capacitance for high-speed interfaces
High surge capability
Low clamping voltage
Solid-state silicon avalanche technology
JEDEC SO-16 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
SO-16 (Top View)
Pin 1
Pin 16
Description
22005 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 and LCDA15C-8
Absolute Maximum Rating
Electrical Characteristics
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32005 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
PROTECTION PRODUCTS
LCDA12C-8 and LCDA15C-8
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve
Clamping Voltage vs. Peak Pulse Current
0
10
20
30
40
50
60
70
80
90
100
110
0 5 10 15 20 25 30
Time (µs)
Percent of IPP
e-t
td = IPP/2
Waveform
Parameters:
tr = 8µs
td = 20µs
Pulse Waveform
0
10
20
30
40
50
60
70
80
90
100
110
0 25 50 75 100 125 150 175
Ambient Temperature - TA (oC)
% of Rated Power or I
PP
0.01
0.1
1
10
0.1 1 10 100 1000
Pulse Duration - tp (µs)
Peak Pulse Power - Ppk (kW)
10
12
14
16
18
20
22
24
26
28
0 5 10 15 20 25
Peak Pulse Current - IPP (A)
Clamping Voltage - VC (V)
Waveform
Parameters:
tr = 8µs
td = 20µs
LCDA15C-8
LCDA12C-8
0
1
2
3
4
5
6
02468101214
Reverse Voltage - VR (V)
Capacitance - Cj (pF)
f = 1 M Hz
0
2
4
6
8
10
12
024681012
Reverse Voltage - VR (V)
Capacitance - Cj (pF)
f = 1MHz
LCDA12C-8 Capacitance vs. Reverse Voltage LCDA15C-8 Capacitance vs. Reverse Voltage
42005 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 and LCDA15C-8
Device Connection Options for Protection of Eight
High-Speed Data Lines
The LCDAxxC-8 may be configured to protect up to
eight I/O lines operating between 5 and 15V. It may be
used to protect the most popular serial data interface
standard lines making it ideal for use in equipment
utilizing multi-mode transceivers. The LCDAxxC-8 is
symmetrical so the data lines may be connected at
pins 1-8 or 9-16. Pins 9-16 or 1-8 are connected to
ground as shown. For best results, these pins should
be connected directly to a ground plane on the board.
The path length should be kept as short as possible to
minimize parasitic inductance.
Multi-Mode Transceiver Protection
The LCDAxxC-8 may be used to protect multi-mode
transceiver I/O lines with external connections. The
LCDAxxC-8 adds a maximum loading capacitance of
15pF with a working voltage of 12V or 15V. This allows
the transceiver to safely operate in all modes without
clipping or degradation of the signal.
With proper design and layout, the transceiver port can
be protected to >15kV (HBM per IEC 61000-4-2).
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of fast rise-time transients such as ESD. The following
guidelines are recommended:
zPlace the LCDAxxC-8 near the input terminals or
connectors to restrict transient coupling.
zMinimize the path length between the LCDAxxC-8
and the protected line.
zMinimize all conductive loops including power and
ground loops.
zThe ESD transient return path to ground should be
kept as short as possible.
zNever run critical signals near board edges.
zUse ground planes whenever possible.
Device Connection
Applications Information
Matte Tin Lead Finish
Matte tin has become the industry standard lead-free
replacement for SnPb lead finishes. A matte tin finish
is composed of 100% tin solder with large grains.
Since the solder volume on the leads is small com-
pared to the solder paste volume that is placed on the
land pattern of the PCB, the reflow profile will be
determined by the requirements of the solder paste.
Therefore, these devices are compatible with both
lead-free and SnPb assembly techniques. In addition,
unlike other lead-free compositions, matte tin does not
have any added alloys that can cause degradation of
the solder joint.
52005 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
PROTECTION PRODUCTS
LCDA12C-8 and LCDA15C-8
Land Pattern - SO-16
Outline Drawing - SO-16
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SEATING
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A
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GAGE
PLANE
h
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3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
-B-
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
DATUMS AND TO BE DETERMINED AT DATUM PLANE
NOTES:
1.
2. -A- -H-
REFERENCE JEDEC STD MS-012, VARIATION AC.4.
.050 BSC
.236 BSC
16
.010
.150
.386
.154
.390
.012 -
16
0.25
1.27 BSC
6.00 BSC
3.90
9.90
-
.157
.394
3.80
9.80
.020 0.31
4.00
10.00
0.51
(.041)
.004
.008
-
.028
-
-
-
-
0°
.016
.007
.049
.004
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8° 0°
0.20
0.10
-8°
0.40
0.17
1.25
0.10
.041
.010
.069
.065
.010
1.35
(1.04)
0.72
-
1.04
0.25
-
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-1.75
1.65
0.25
0.25
-
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-
A2
A1
D
E1
DIM
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L1
MIN
MILLIMETERS
DIMENSIONS
e
L
h
E
b
c
NOM
INCHES
MIN
A
MAX MAXNOM
E
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
NOTES:
1.
REFERENCE IPC-SM-782A, RLP NO. 304A.
2.
.291
.087
.024
.118
(.205)
INCHES
DIMENSIONS
Z
P
Y
X
DIM
C
G
MILLIMETERS
.050
(5.20)
7.40
2.20
0.60
3.00
1.27
ZG
Y
P
(C)
X
62005 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 and LCDA15C-8
Contact Information
Semtech Corporation
Protection Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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Ordering Information