LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 LM4952 BoomerTM Audio Power Amplifier Series 3.1W Stereo-SE Audio Power Amplifier with DC Volume Control Check for Samples: LM4952 FEATURES DESCRIPTION * The LM4952 is a dual audio power amplifier primarily designed for demanding applications in flat panel monitors and TV's. It is capable of delivering 3.1 watts per channel to a 4 single-ended load with less than 1% THD+N when powered by a 12VDC power supply. 1 23 * * * * * Pop & Click Circuitry Eliminates Noise During Turn-on and Turn-off Transitions Low Current, Active-low Shutdown Mode Low Quiescent Current Stereo 3.8W Output, RL = 4 DC-controlled Volume Control Short Circuit Protection APPLICATIONS * * * Flat Panel Monitors Flat Panel TV's Computer Sound Cards KEY SPECIFICATIONS * * * Quiscent Power Supply Current 18mA (typ) POUT @ VDD = 12V, RL = 4, 10% THD+N 3.8W (typ) Shutdown current 55A (typ) Eliminating external feedback resistors, an internal, DC-controlled, volume control allows easy and variable gain adjustment. Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. The LM4952 does not require bootstrap capacitors or snubber circuits. Therefore, it is ideally suited for display applications requiring high power and minimal size. The LM4952 features a low-power consumption active-low shutdown mode. Additionally, the LM4952 features an internal thermal shutdown protection mechanism along with short circuit protection. The LM4952 contains advanced pop & click circuitry that eliminates noises which would otherwise occur during turn-on and turn-off transitions. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Boomer is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Connection Diagram BYPASS UZXYTT L4952TS -VIN B VOUT B VDD GND VOUT A SHUTDOWN -VIN A DC VOL Figure 1. DDPAK - Top View See Package Number KTW L4952TS = LM4952TS Typical Application VDD CS 10 PF 6 CIN A 0.39 PF AUDIO INPUT A 2 -VIN A COUTA VOLUME AMPA + SHUTDOWN CONTROL 3 SHUTDOWN 9 BYPASS C BYPAS VOUTA DCCONTROLLED VOLUME CONTROL BIAS 4.7 PF DC-VOL 1 8 -VIN B AMPB VOLUME 0V - 3.3V COUTB + CIN B 0.39 PF RL 4: S AUDIO INPUT B 470 PF 4 VOUTB 7 470 PF - RL 4: 5 Figure 2. Typical LM4952 SE Audio Amplifier Application Circuit These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 Absolute Maximum Ratings (1) (2) (3) Supply Voltage (pin 6, referenced to GND, pins 4 and 5) 18.0V -65C to +150C Storage Temperature -0.3V to VDD + 0.3V pins 4, 6, and 7 Input Voltage -0.3V to 9.5V pins 1, 2, 3, 8, and 9 (4) Internally limited ESD Susceptibility (5) 2000V ESD Susceptibility (6) 200V Power Dissipation Junction Temperature 150C JC (TS) JA (TS) (4) Thermal Resistance (1) (2) (3) (4) (5) (6) 4C/W 20C/W All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / JA or the given in Absolute Maximum Ratings, whichever is lower. For the LM4952 typical application (shown in Figure 2) with VDD = 12V, RL = 4 stereo operation the total power dissipation is 3.65W. JA = 20C/W for the DDPAK package mounted to 16in2 heatsink surface area. Human body model, 100pF discharged through a 1.5k resistor. Machine Model, 220pF-240pF discharged through all pins. Operating Ratings TMIN TA TMAX Temperature Range -40C T A 85C 9.6V VDD 16V Supply Voltage Electrical Characteristics VDD = 12V (1) (2) The following specifications apply for VDD = 12V, AV = 20dB (nominal), RL = 4, and TA = 25C unless otherwise noted. Symbol IDD Parameter Quiescent Power Supply Current Conditions VIN = 0V, IO = 0A, No Load (6) LM4952 Units (Limits) Typical (3) Limit (4) (5) 18 35 mA (max) 55 85 A (max) ISD Shutdown Current VSHUTDOWN = GND RIN Amplifier Input Resistance VDC VOL = VDD/2 44 VDC VOL = GND 200 k k VIN Amplifier Input Signal VDD/2 Vp-p (max) VSDIH Shutdown Voltage Input High 2.0 VDD/2 V (min) V (max) VSDIL Shutdown Voltage Input Low 0.4 V (max) TWU Wake-up Time TSD Thermal Shutdown Temperature PO Output Power (1) (2) (3) (4) (5) (6) CB = 4.7F f = 1kHz, THD+N = 1% THD+N = 10% 440 ms 170 C 3.1 3.8 2.8 W (min) All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25C and represent the parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Shutdown current is measured in a normal room environment. The Shutdown pin should be driven as close as possible to GND for minimum shutdown current. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 3 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Electrical Characteristics VDD = 12V(1)(2) (continued) The following specifications apply for VDD = 12V, AV = 20dB (nominal), RL = 4, and TA = 25C unless otherwise noted. Symbol Parameter Conditions LM4952 Typical THD+N Total Harmomic Distortion + Noise PO = 2.0Wrms, f = 1kHz OS Output Noise A-Weighted Filter, VIN = 0V, Input Referred XTALK Channel Separation fIN = 1kHz, PO = 1W, Input Referred RL = 8 RL = 4 (3) Limit (4) (5) Units (Limits) 0.08 % 8 V 78 72 dB PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 1kHz, Input Referred 89 IOL Output Current Limit VIN = 0V, RL = 500m 5 80 dB (min) A Electrical Characteristics for Volume Control (1) (2) The following specifications apply for VDD = 12V, AV = 20dB (nominal), and TA = 25C unless otherwise noted. Symbol Parameter LM4952 Conditions Typical (3) VOLmax Gain VDC-VOL = Full scale, No Load 20 VOLmin Gain VDC-VOL = +1LSB, No Load -46 AM Mute Attenuation VDC-VOL = 0V, No Load 75 (1) (2) (3) (4) Limit (4) Units (Limits) dB dB 63 dB (min) All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25C and represent the parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). External Components Description Refer to Figure 2. Components Functional Description 1. CIN This is the input coupling capacitor. It blocks DC voltage at the amplifier's inverting input. CIN and RIN create a highpass filter. The filter's cutoff frequency is fC = 1/(2RINCIN). Refer to SELECTING EXTERNAL COMPONENTS, for an explanation of determining CIN's value. 2. CS The supply bypass capacitor. Refer to POWER SUPPLY BYPASSING for information about properly placing, and selecting the value of, this capacitor. 3. CBYPASS This capacitor filters the half-supply voltage present on the BYPASS pin. Refer to SELECTING EXTERNAL COMPONENTS for information about properly placing, and selecting the value of, this capacitor. 4 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 Typical Performance Characteristics AV = 20dB and TA = 25C, unless otherwise noted. THD+N vs Frequency THD+N vs Frequency 10 10 5 5 2 2 1 THD+N (%) THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 50 100 200 500 1k 2k 0.01 20 5k 10k 20k FREQUENCY (Hz) VDD = 12V, RL = 4, POUT = 2W, CIN = 1.0F 10 VDD = 12V, RL = 8, POUT = 1W, CIN = 1.0F Figure 3. THD+N vs Output Power 10 5 5 2 2 Figure 4. THD+N vs Output Power 1 THD+N (%) THD+N (%) 5k 10k 20k FREQUENCY (Hz) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 10m 20m 50m 100m 200m 500m 1 2 0.01 10m 20m 50m 100m 200m 500m 1 56 OUTPUT POWER (W) VDD = 12V, RL = 4, fIN = 1kHz 50 100 200 500 1k 2k VDD = 12V, RL = 8, fIN = 1kHz Figure 5. Output Power vs Power Supply Voltage RL = 4, fIN = 1kHz both channels driven and loaded (average shown), at (from top to bottom at 12V): THD+N = 10%, THD+N = 1% Figure 7. 2 56 OUTPUT POWER (W) Figure 6. Output Power vs Power Supply Voltage RL = 8, fIN = 1kHz both channels driven and loaded (average shown), at (from top to bottom at 12V): THD+N = 10%, THD+N = 1% Figure 8. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 5 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) AV = 20dB and TA = 25C, unless otherwise noted. MAGNITUDE (dB) Power Supply Rejection vs Frequency Total Power Dissipation vs Load Dissipation +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) VDD = 12V, RL = 4, VRIPPLE = 200mVp-p VDD = 12V, fIN = 1kHz, at (from top to bottom at 1W): RL = 4, RL = 8 Figure 9. Output Power vs Load Resistance Figure 10. Channel-to-Channel Crosstalk vs Frequency +0 -10 -20 AMPLITUDE (dB) -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) VDD = 12V, RL = 4, POUT = 1W, Input Referred at (from top to bottom at 1kHz): VINB driven, VOUTA measured, VINA driven, VOUTB measured VDD = 12V, fIN = 1kHz, at (from top to bottom at 15): THD+N = 10%, THD+N = 1% Figure 11. Figure 12. Channel-to-Channel Crosstalk vs Frequency Amplifier Gain vs DC Volume Voltage +0 20 -10 10 -20 0 AMPLIFIER GAIN (dB) AMPLITUDE (dB) -30 -40 -50 -60 -70 -80 -90 -20 -30 -40 -50 -100 -60 -110 -70 -120 20 50 100 200 500 1k 2k -80 -0 +0.5 +1 +1.5 +2 +2.5 +3 +3.5 +4 +4.5 +5 5k 10k 20k FREQUENCY (Hz) VDD = 12V, RL = 8, POUT = 1W, Input Referred at (from top to bottom at 1kHz): VINB driven, VOUTA measured, VINA driven, VOUTB measured Figure 13. 6 -10 DC VOLUME VOLTAGE (V) VDD = 12V, RL = 8, at (from top to bottom at 1.5V): Decreasing DC Volume Voltage, Increasing DC Volume Voltage Figure 14. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 Typical Performance Characteristics (continued) AV = 20dB and TA = 25C, unless otherwise noted. THD+N vs Frequency 20 10 10 5 0 2 -10 1 THD+N (%) AMPLIFIER GAIN (dB) Amplifier Gain vs Part-to-Part DC Volume Voltage Variation (Five parts) -20 -30 -40 0.5 0.2 0.1 -50 0.05 -60 -70 0.02 -80 -0 +0.5 +1 +1.5 +2 +2.5 +3 +3.5 +4 +4.5 +5 0.01 20 50 100 200 500 1k 2k VDD = 9.6V, RL = 4, POUT = 1.1W, CIN = 1.0F VDD = 12V, RL = 8, Figure 15. Figure 16. THD+N vs Frequency 10 10 5 5 2 2 THD+N (%) 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 THD+N vs Output Power 1 1 THD+N (%) 5k 10k 20k FREQUENCY (Hz) DC VOLUME VOLTAGE (V) 50 100 200 500 1k 2k 0.01 10m 20m 50m 100m 200m 500m 1 5k 10k 20k FREQUENCY (Hz) 56 OUTPUT POWER (W) VDD = 9.6V, RL = 8, POUT = 850mW, CIN = 1.0F VDD = 9.6V, RL = 4, fIN = 1kHz Figure 17. 10 2 THD+N vs Output Power Figure 18. Total Power Dissipation vs Load Dissipation 5 2 THD+N (%) 1 0.5 0.2 0.1 0.05 0.02 0.01 10m 20m 50m 100m 200m 500m 1 2 56 OUTPUT POWER (W) VDD = 9.6V, RL = 8, fIN = 1kHz Figure 19. VDD = 9.6V, fIN = 1kHz at (from top to bottom at 1W): RL = 4, RL = 8 Figure 20. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 7 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) AV = 20dB and TA = 25C, unless otherwise noted. Power Supply Rejection vs Frequency MAGNITUDE (dB) Output Power vs Load Resistance +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) VDD = 9.6V, RL = 4, VRIPPLE = 200mVP-P VDD = 9.6V, fIN = 1kHz, at (from top to bottom at 15): THD+N = 10%, THD+N = 1% Figure 22. Channel-to Channel Crosstalk vs Frequency Channel-to Channel Crosstalk vs Frequency +0 +0 -10 -10 -20 -20 -30 -30 AMPLITUDE (dB) AMPLITUDE (dB) Figure 21. -40 -50 -60 -70 -80 -40 -50 -60 -70 -80 -90 -90 -100 -100 -110 -110 -120 -120 20 50 100 200 500 1k 2k 20 5k 10k 20k VDD = 9.6V, RL = 4, POUT = 1W, Input Referred at (from top to bottom at 1kHz): VINB driven, VOUTA measured; VINA driven, VOUTB measured Figure 23. THD+N vs Frequency THD+N vs Frequency 10 5 5 2 2 1 THD+N (%) THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 50 100 200 500 1k 2k 0.01 20 5k 10k 20k FREQUENCY (Hz) VDD = 14V, RL = 4, POUT = 2W, CIN = 1.0F 8 5k 10k 20k VDD = 9.6V, RL = 8, POUT = 1W, Input Referred at (from top to bottom at 1kHz): VINB driven, VOUTA measured; VINA driven, VOUTB measured Figure 24. 10 0.01 20 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 25. 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) VDD = 14V, RL = 8, POUT = 1W, CIN = 1.0F Submit Documentation Feedback Figure 26. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 Typical Performance Characteristics (continued) AV = 20dB and TA = 25C, unless otherwise noted. 10 THD+N vs Output Power 10 5 5 2 2 1 THD+N (%) THD+N (%) 1 THD+N vs Output Power 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 10m 20m 50m 100m 200m 500m 1 2 0.01 10m 20m 50m 100m 200m 500m 1 56 OUTPUT POWER (W) VDD = 14V, RL = 4, fIN = 1kHz VDD = 14V, RL = 8 fIN = 1kHz Figure 27. Power Supply Rejection vs Frequency POWER SUPPLY REJECTION (dB) 2 56 OUTPUT POWER (W) Figure 28. Output Power vs Load Resistance +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) VDD = 14V, RL = 4 VRIPPLE = 200mVP-P Figure 29. VDD = 15V, fIN = 1kHz, at (from top to bottom at 2W): RL = 4, RL = 8 THD+N vs Output Power VDD = 15V, at (from top to bottom at 15): THD+N = 10%, THD+N = 1%, fIN = 1kHz Figure 31. Figure 30. THD+N vs Output Power VDD = 16V, RL = 4, fIN = 1kHz Figure 32. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 9 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) AV = 20dB and TA = 25C, unless otherwise noted. Channel-to-Channel Crosstalk vs Frequency +0 +0 -10 -10 -20 -20 -30 -30 AMPLITUDE (dB) AMPLITUDE (dB) Channel-to-Channel Crosstalk vs Frequency -40 -50 -60 -70 -80 -40 -50 -60 -70 -80 -90 -90 -100 -100 -110 -110 -120 20 50 100 200 500 1k 2k -120 20 5k 10k 20k 50 100 200 500 1k 2k FREQUENCY (Hz) VDD = 16V, RL = 4, POUT = 1W, Input Referred at (from top to bottom at 1kHz): VINB driven, VOUTA measured; VINA driven, VOUTB measured Figure 33. VDD = 16V, RL = 8, POUT = 1W, Input Referred at (from top to bottom at 1kHz): VINB driven, VOUTA measured; VINA driven, VOUTB measured Figure 34. Power Supply Current vs Power Supply Voltage Clipping Voltage vs Power Supply Voltage 1.75 1.5 25 CLIPPING VOLTAGE (V) POWER SUPPLY CURRENT (mA) 30 20 15 10 1.25 1 0.75 0.5 0.25 0 9.5 5 9 10 11 12 13 14 15 16 17 10.5 11.5 12.5 13.5 14.5 15.5 POWER SUPPLY VOLTAGE (V) POWER SUPPLY VOLTAGE (V) RL = 4, fIN = 1kHz at (from top to bottom at 12.5V): positive signal swing, negative signal swing Figure 36. RL = 4, VIN = 0V, RSOURCE = 50 Figure 35. Clipping Voltage vs Power Supply Voltage Power Dissipation vs Ambient Temperature 1.25 CLIPPING VOLTAGE (V) 5k 10k 20k FREQUENCY (Hz) 1 0.75 0.5 0.25 0 9.5 10.5 11.5 12.5 13.5 14.5 15.5 POWER SUPPLY VOLTAGE (V) RL = 8, fIN = 1kHz at (from to bottom at 12.5V): positive signal swing, negative signal swing Figure 37. 10 VDD = 12V, RL = 4 (SE), fIN = 1kHz, (from to bottom at 80C): 16in2 copper plane heatsink area, 8in2 copper plane heatsink area Figure 38. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 Typical Performance Characteristics (continued) AV = 20dB and TA = 25C, unless otherwise noted. Power Dissipation vs Ambient Temperature VDD = 12V, RL = 8, fIN = 1kHz, (from to bottom at 120C): 16in2 copper plane heatsink area, 8in2 copper plane heatsink area Figure 39. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 11 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com APPLICATION INFORMATION HIGH VOLTAGE BOOMER WITH INCREASED OUTPUT POWER VDD CS 10 PF 6 CIN A 0.39 PF AUDIO INPUT A 2 -VIN A COUTA VOLUME AMPA + SHUTDOWN CONTROL 3 SHUTDOWN 9 BYPASS C BYPAS VOUTA DCCONTROLLED VOLUME CONTROL BIAS 4.7 PF DC-VOL 1 8 -VIN B AMPB VOLUME 0V - 3.3V COUTB + CIN B 0.39 PF RL 4: S AUDIO INPUT B 470 PF 4 VOUTB 7 470 PF - RL 4: 5 Figure 40. Typical LM4952 SE Application Circuit Unlike previous 5V Boomer amplifiers, the LM4952 is designed to operate over a power supply voltages range of 9.6V to 16V. Operating on a 12V power supply, the LM4952 will deliver 3.8W into a 4 SE load with no more than 10% THD+N. POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation 1 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX-SE = (VDD) 2/ (22RL): Single Ended (1) The LM4952's dissipation is twice the value given by Equation 1 when driving two SE loads. For a 12V supply and two 4 SE loads, the LM4952's dissipation is 1.82W. The maximum power dissipation point given by Equation 1 must not exceed the power dissipation given by Equation 2: PDMAX' = (TJMAX - TA) / JA (2) The LM4952's TJMAX = 150C. In the TS package, the LM4952's JA is 20C/W when the metal tab is soldered to a copper plane of at least 16in2. This plane can be split between the top and bottom layers of a two-sided PCB. Connect the two layers together under the tab with a 5x5 array of vias. At any given ambient temperature TA, use Equation 2 to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation 2 and substituting PDMAX for PDMAX' results in Equation 3. This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the LM4952's maximum junction temperature. 12 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 TA = TJMAX - PDMAX-SEJA (3) For a typical application with a 12V power supply and an SE 4 load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 77C for the TS package. TJMAX = PDMAX-MONOBTLJA + TA (4) Equation 4 gives the maximum junction temperature TJMAX. If the result violates the LM4952's 150C, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures. The above examples assume that a device is operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. If the result of Equation 1 is greater than that of Equation 2, then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. Further, ensure that speakers rated at a nominal 4 do not fall below 3. If these measures are insufficient, a heat sink can be added to reduce JA. The heat sink can be created using additional copper area around the package, with connections to the ground pins, supply pin and amplifier output pins. Refer to the Typical Performance Characteristics curves for power dissipation information at lower output power levels. POWER SUPPLY VOLTAGE LIMITS Continuous proper operation is ensured by never exceeding the voltage applied to any pin, with respect to ground, as listed in Absolute Maximum Ratings (1) (2) (3). POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a voltage regulator typically use a 10F in parallel with a 0.1F filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 10F tantalum bypass capacitance connected between the LM4952's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4952's power supply pin and ground as short as possible. BYPASS PIN BYPASSING Connecting a 4.7F capacitor, CBYPASS, between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases turn-on time. The selection of bypass capacitor values, especially CBYPASS, depends on desired PSRR requirements, click and pop performance (as explained in SELECTING EXTERNAL COMPONENTS), system cost, and size constraints. MICRO-POWER SHUTDOWN The LM4952 features an active-low micro-power shutdown mode. When active, the LM4952's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The low 55A typical shutdown current is achieved by applying a voltage to the SHUTDOWN pin that is as near to GND as possible. A voltage that is greater than GND may increase the shutdown current. (1) (2) (3) All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 13 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com There are a few methods to control the micro-power shutdown. These include using a single-pole, single-throw switch (SPST), a microprocessor, or a microcontroller. Figure 41 shows a simple switch-based circuit that can be used to control the LM4952's shutdown fucntion. Select normal amplifier operation by closing the switch. Opening the switch applies GND to the SHUTDOWN pin, activating micro-power shutdown. The switch and resistor ensure that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the active-state voltage to the SHUTDOWN pin. VDD SPST 47 k: To SHUTDOWN Pin 47 k: Figure 41. Simple switch and voltage divider generates shutdown control signal DC VOLUME CONTROL The LM4952 has an internal stereo volume control whose setting is a function of the DC voltage applied to the DC VOL input pin. The LM4952 volume control consists of 31 steps that are individually selected by a variable DC voltage level on the volume control pin. As shown in Figure 42, the range of the steps, controlled by the DC voltage, is 20dB to 46dB. The gain levels are 1dB/step from 20dB to 14dB, 2dB/step from 14dB to -16dB, 3dB/step from -16dB to -27dB, 4dB/step from -27db to -31dB, 5dB/step from -31dB to -46dB. 20 10 AMPLIFIER GAIN (dB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -0 +0.5 +1 +1.5 +2 +2.5 +3 +3.5 +4 +4.5 +5 DC VOLUME VOLTAGE (V) Figure 42. Volume Control Response Like all volume controls, the LM4952's internal volume control is set while listening to an amplified signal that is applied to an external speaker. The actual voltage applied to the DC VOL input pin is a result of the volume a listener desires. As such, the volume control is designed for use in a feedback system that includes human ears and preferences. This feedback system operates quite well without the need for accurate gain. The user simply sets the volume to the desired level as determined by their ear, without regard to the actual DC voltage that 14 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 produces the volume. Therefore, the accuracy of the volume control is not critical, as long as volume changes monotonically and step size is small enough to reach a desired volume that is not too loud or too soft. Since the gain is not critical, there may be a volume variation from part-to-part even with the same applied DC volume control voltage. The gain of a given LM4952 can be set with fixed external voltage, but another LM4952 may require a different control voltage to achieve the same gain. Figure 43 is a curve showing the volume variation of five typical LM4952s as the voltage applied to the DC VOL input pin is varied. For gains between -20dB and +16dB, the typical part-to-part variation is typically 1dB for a given control voltage. 20 10 AMPLIFIER GAIN (dB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -0 +0.5 +1 +1.5 +2 +2.5 +3 +3.5 +4 +4.5 +5 DC VOLUME VOLTAGE (V) Figure 43. Typical Part-to-Part Gain Variation as a Function of DC Vol Control Voltage VOLUME CONTROL VOLTAGE GENERATION Figure 44 shows a simple circuit that can be used to create an adjustable DC control voltage that is applied to the DC Vol input. The 91k series resistor and the 50k potentiometer create a voltage divider between the supply voltage, VDD, and GND. The series resistor's value assumes a 12V power supply voltage. The voltage present at the node between the series resistor and the top of the potentiometer need only be a nominal value of 3.5V and must not exceed 9.5V, as stated in the LM4952's Absolute Maximum Ratings. VDD 91 k: RS 50 k: RVOL 4 DC VOL LM4952 10 PF* * optional Capacitor connected to DC VOL pin minimizes voltage fluctuation when using unregulated supplies that could cause changes in perceived volume setting. Figure 44. Typical Circuit Used for DC Voltage Volume Control UNREGULATED POWER SUPPLIES AND THE DC VOL CONTROL As an amplifier's output power increases, the current that flows from the power supply also increases. If an unregulated power supply is used, its output voltage can decrease ("droop" or "sag") as this current increases. It is not uncommon for an unloaded unregulated 15V power supply connected to the LM4952 to sag by as much as 2V when the amplifier is drawing 1A to 2A while driving 4 stereo loads to full power dissipation. Figure 45 is an oscilloscope photo showing an unregulated power supply's voltage sag while powering an LM4952 that is driving 4 stereo loads. The amplifier's input is a typical music signal supplied by a CD player. As shown, the sag can be quite significant. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 15 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Wave forms shown include VDD (Trace A), VOUT A (Trace B), VOUT B (Trace C), and the DC voltage applied to the DC VOL pin (Trace D). Figure 45. LM4952 Operating on an Unregulated 12V (Nominal) Power Supply This sagging supply voltage presents a potential problem when the voltage that drives the DC Vol pin is derived from the voltage supplied by an unregulated power supply. This is the case for the typical volume control circuit (a 50k potentiometer in series with a 91k resistor) shown in Figure 44. The potentiometer's wiper is connected to the DC Vol pin. With this circuit, power supply voltage fluctuations will be seen by the DC Vol input. Though attenuated by the voltage divider action of the potentiometer and the series resistor, these fluctuations may cause perturbations in the perceived volume. An easy and simple solution that suppresses these perturbations is a 10F capacitor connected between the DC Vol pin and ground. See the result of this capacitor in Figure 46. This capacitance can also be supplemented with bulk capacitance in the range of 1000F to 10,000F connected to the unregulated power supply's output. Figure 48 shows how this bulk capacitance minimizes fluctuations on VDD. Same conditions and waveforms as shown in Figure 45, except that a 10F capacitor has been connected between the DC VOL pin and GND (Trace D). Figure 46. If space constraints preclude the use of a 10F capacitor connected to the DC Vol pin or large amounts of bulk supply capacitance, or if more resistance to the fluctuations is desired, using an LM4040-4.1 voltage reference shown in Figure 47 is recommended. The value of the 91k resistor, already present in the typical volume applications circuit, should be changed to 62k. This sets the LM4040-4.1's bias current at 125A when using a nominal 12V supply, well within the range of current needed by this reference. 16 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 VDD 62 k: 50 k: 4 DC VOL LM4040-4.1 RVOL LM4952 Using an LM4040-4.1 to set the maximum DC volume control voltage and attenuate power supply variations when using unregulated supplies that would otherwise perturb the volume setting. Figure 47. Same conditions and waveforms as shown in Figure 46, except that a 4700F capacitor has been connected between the VDD pin and GND (Trace A). Figure 48. SELECTING EXTERNAL COMPONENTS Input Capacitor Value Selection Two quantities determine the value of the input coupling capacitor: the lowest audio frequency that requires amplification and desired output transient suppression. The amplifier's input resistance and the input capacitor (CIN) produce a high pass filter cutoff frequency that is found using Equation 5. FCIN = 1/(2RINCIN) (5) As an example when using a speaker with a low frequency limit of 50Hz and based on the LM4952's 44k nominal minimum input resistance, CIN, using Equation 5 is 0.072F. The 0.39F CINA shown in Figure 40 allows the LM4952 to drive high efficiency, full range speaker whose response extends below 30Hz. Similarly, the output coupling capacitor and the load impedance also form a high pass filter. The cutoff frequency formed by these two components is found using Equation 6. fCOUT = 1/(2RLOADCOUT) (6) Expanding on the example above and assuming a nominal speaker impedance of 4, response below 30Hz is assured if the output coupling capacitors have a value, using Equation 6, greater than 1330F. Bypass Capacitor Value Besides minimizing the input capacitor size, careful consideration should be paid to value of CBYPASS, the capacitor connected to the BYPASS pin. Since CBYPASS determines how fast the LM4952 settles to quiescent operation, its value is critical when minimizing turn-on pops. The slower the LM4952's outputs ramp to their quiescent DC voltage (nominally VDD/2), the smaller the turn-on pop. Choosing CBYPASS equal to 4.7F along with a small value of CIN (in the range of 0.1F to 0.39F) produces a click-less and pop-less shutdown function. As discussed above, choosing CIN no larger than necessary for the desired bandwidth helps minimize clicks and pops. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 17 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com Routing Input and BYPASS Capacitor Grounds Optimizing the LM4952's low distortion performance is easily accomplished by connecting the input signal's ground reference directly to the DDPAK's grounded tab connection. In like manner, the ground lead of the capacitor connected between the BYPASS pin and GND should also be connected to the package's grounded tab. OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE The LM4952 contains circuitry that eliminates turn-on and shutdown transients ("clicks and pops"). For this discussion, turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode is deactivated. As the VDD/4 voltage present at the BYPASS pin ramps to its final value, the LM4952's internal amplifiers are muted. Once the voltage at the BYPASS pin reaches VDD/4, the amplifiers are unmuted. The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches VDD/4. As soon as the voltage on the bypass pin is stable, the device becomes fully operational and the amplifier outputs are reconnected to their respective output pins. In order eliminate "clicks and pops", all capacitors must be discharged before turn-on. Rapidly switching VDD may not allow the capacitors to fully discharge, which may cause "clicks and pops". There is a relationship between the value of CIN and CBYPASS that ensures minimum output transient when power is applied or the shutdown mode is deactivated. Best performance is achieved by selecting a CBYPASS value that is greater than twelve times CIN's value. RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT Figure 47 through Figure 49 show the recommended two-layer PC board layout that is optimized for the DDPAKpackaged, SE-configured LM4952 and associated external components. These circuits are designed for use with an external 12V supply and 4(min)(SE) speakers. These circuit boards are easy to use. Apply 12V and ground to the board's VDD and GND pads, respectively. Connect a speaker between the board's OUTA and OUTB outputs and respective GND pins. Demonstration Board Layout Figure 49. Recommended TS SE PCB Layout: Top Silkscreen 18 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 LM4952 www.ti.com SNAS230A - AUGUST 2004 - REVISED MAY 2013 Figure 50. Recommended TS SE PCB Layout: Top Layer Figure 51. Recommended TS SE PCB Layout: Bottom Layer Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 19 LM4952 SNAS230A - AUGUST 2004 - REVISED MAY 2013 www.ti.com REVISION HISTORY Changes from Original (May 2013) to Revision A * 20 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 19 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4952 PACKAGE OPTION ADDENDUM www.ti.com 3-May-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Top-Side Markings (3) (4) LM4952TS/NOPB ACTIVE DDPAK/ TO-263 KTW 9 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 85 LM4952TS LM4952TSX/NOPB ACTIVE DDPAK/ TO-263 KTW 9 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 85 LM4952TS (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 10-Dec-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM4952TSX/NOPB Package Package Pins Type Drawing SPQ DDPAK/ TO-263 500 KTW 9 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 24.4 Pack Materials-Page 1 10.75 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 14.85 5.0 16.0 24.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 10-Dec-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4952TSX/NOPB DDPAK/TO-263 KTW 9 500 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA KTW0009A TS9A (Rev B) BOTTOM SIDE OF PACKAGE www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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