WE128K32-XXX HI-RELIABILITY PRODUCT 128Kx32 EEPROM MODULE, SMD 5962-94585 FEATURES Access Times of 120*, 140, 150, 200, 250, 300ns Packaging: * 66-pin, PGA Type, 27.3mm (1.075") square, Hermetic Ceramic HIP (Package 400) Automatic Page Write Operation Page Write Cycle Time: 10ms Max Data Polling for End of Write Detection Hardware and Software Data Protection TTL Compatible Inputs and Outputs 5 Volt Power Supply Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation Weight WE128K32-XG2TX - 8 grams typical WE128K32-XG1UX - 5 grams typical WE128K32-XH1X - 13 grams typical WE128K32-XG4X - 20 grams typical * 68 lead, 40mm CQFP (G4), (Package 501) * 68 lead, 22.4mm sq. CQFP (G2T), 4.57mm (0.180") high, (Package 509) * 68 lead, 22.4mm sq. Low Profile CQFP (G1U), 3.57mm (0.140") high, (Package 519) Organized as 128Kx32; User Configurable as 256Kx16 or 512Kx8 Write Endurance 10,000 Cycles Data Retention Ten Years Minimum (at +25C) Commercial, Industrial and Military Temperature Ranges Low Power CMOS FIG. 1 * 120ns not available for SMD product PIN CONFIGURATION FOR WE128K32N-XH1X PIN DESCRIPTION TOP VIEW 1 12 23 WE2 I/O8 I/O15 CS2 I/O9 34 I/O14 45 VCC I/O24 CS4 I/O25 56 I/O0-31 Data Inputs/Outputs I/O31 A0-16 Address Inputs I/O30 WE1-4 Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply I/O10 GND I/O13 I/O26 WE4 I/O29 A13 I/O11 I/O12 A6 I/O27 I/O28 A14 A10 OE A7 A3 A0 GND Ground A15 A11 NC NC A4 A1 NC Not Connected A16 A12 WE1 A8 A5 A2 NC VCC I/O7 A9 WE3 I/O23 BLOCK DIAGRAM WE1 CS 1 WE2 CS2 WE3 CS 3 WE 4CS4 OE I/O0 CS1 I/O6 I/O16 CS3 I/O22 I/O1 NC I/O5 I/O17 GND I/O21 I/O2 I/O3 I/O4 I/O18 I/O19 I/O20 A0-16 128K x 8 8 11 22 33 44 55 8 128K x 8 8 128K x 8 8 66 I/O0-7 July 2001 Rev. 5 128K x 8 1 I/O8-15 I/O16-23 I/O24-31 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX FIG. 2 PIN CONFIGURATION FOR WE128K32-XG4X PIN DESCRIPTION NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC TOP VIEW I/O0-31 Data Inputs/Outputs 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 A0-16 Address Inputs WE Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected BLOCK DIAGRAM CS 3 CS 2 CS 1 CS 4 WE OE A0-16 128K x 8 128K x 8 128K x 8 128K x 8 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 NC NC NC NC NC NC NC I/O24-31 PIN CONFIGURATION FOR WE128K32-XG2TX AND WE128K32-XG1UX PIN DESCRIPTION NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC TOP VIEW I/O0-31 Data Inputs/Outputs 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 8 I/O16-23 I/O8-15 I/O0-7 FIG. 3 8 8 8 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 0.940" WE1-4 Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground 1 2 1 2 3 3 4 OE A0-16 NC NC NC WE4 WE2 WE3 OE CS2 NC A16 CS1 A15 A14 A13 A12 A11 VCC Address Inputs The White 68 lead G2T/G1U NC Not Connected CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T/ G1U has the TCE and lead BLOCK DIAGRAM inspection advantage of the WE WE CS WE CS WE CS CS CQFP form. 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 128K x 8 8 I/O0-7 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com A0-16 2 128K x 8 8 I/O8-15 128K x 8 8 I/O16-23 128K x 8 8 I/O24-31 4 WE128K32-XXX ABSOLUTE MAXIMUM RATINGS Parameter Symbol Operating Temperature Unit -55 to +125 C T STG -65 to +150 C VG -0.6 to +6.25 V -0.6 to +13.5 V TA Storage Temperature Signal Voltage Relative to GND TRUTH TABLE Voltage on OE and A9 CS H L L X X X NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. WE X H L X H X Parameter Symbol Min Max Unit Supply Voltage V CC Input High Voltage V IH 4.5 5.5 V 2.0 V CC + 0.3 V Input Low Voltage V IL -0.5 +0.8 V Operating Temp. (Mil.) TA -55 +125 C Operating Temp. (Ind.) TA -40 +85 C Mode Standby Read Write Out Disable Write Inhibit Data I/O High Z Data Out Data In High Z/Data Out CAPACITANCE (TA = +25C) RECOMMENDED OPERATING CONDITIONS Parameter OE X L H H X L Symbol Conditions OE capacitance COE VIN = 0 V, f = 1.0 MHz WE1-4 capacitance HIP (PGA) CQFP G4 CQFP G2T/G1U CWE VIN = 0 V, f = 1.0 MHz Max 50 Unit pF pF 20 50 20 CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 20 pF Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 50 pF This parameter is guaranteed by design but not tested. DC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C) Parameter Symbol Input Leakage Current Conditions ILI Max Unit VCC = 5.5, VIN = GND to VCC Min 10 A Output Leakage Current ILOx32 CS = VIH, OE = VIH, VOUT = GND to VCC 10 A Operating Supply Current x 32 Mode ICCx32 CS = VIL, OE = VIH, f = 5MHz 250 mA Standby Current ISB CS = VIH, OE = VIH, f = 5MHz 2.5 mA Output Low Voltage VOL IOL = 2.1mA, VCC = 4.5V 0.45 Output High Voltage VOH IOH = -400A, VCC = 4.5V NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V 2.4 FIG. 4 AC TEST CIRCUIT V V AC TEST CONDITIONS Parameter I OL Current Source VZ D.U.T. 1.5V (Bipolar Supply) C eff = 50 pf I OH Current Source 3 Typ Unit Input Pulse Levels VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V NOTES: V Z is programmable from -2V to +7V. I OL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 . V Z is typically the midpoint of VOH and V OL. I OL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX AC WRITE CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C) WRITE A write cycle is initiated when OE is high and a low pulse is on WE or CS with CS or WE low. The address is latched on the falling edge of CS or WE whichever occurs last. The data is latched by the rising edge of CS or WE, whichever occurs first. A byte write operation will automatically continue to completion. Write Cycle Parameter WRITE CYCLE TIMING Figures 5 and 6 show the write cycle timing relationships. A write cycle begins with address application, write enable and chip select. Chip select is accomplished by placing the CS line low. Write enable consists of setting the WE line low. The write cycle begins when the last of either CS or WE goes low. The WE line transition from high to low also initiates an internal 150 sec delay timer to permit page mode operation. Each subsequent WE transition from high to low that occurs before the completion of the 150 sec time out will restart the timer from zero. The operation of the timer is the same as a retriggerable one-shot. White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 4 Symbol Min Max Unit 10 ms Write Cycle Time, TYP = 6ms tWC Address Set-up Time tAS 0 ns Write Pulse Width (WE or CS) tWP 150 ns Chip Select Set-up Time tCS 0 ns Address Hold Time tAH 100 ns Data Hold Time tDH 10 ns Chip Select Hold Time tCSH 0 ns Data Set-up Time tDS 100 ns Output Enable Set-up Time tOES 10 ns Output Enable Hold Time tOEH 10 ns Write Pulse Width High tWPH 50 ns WE128K32-XXX FIG. 5 WRITE WAVEFORMS WE CONTROLLED t WC OE t OEH t OES ADDRESS t AS CS 1-4 tCSH t AH t CS WE 1-4 t WP t WPH t DS t DH DATA IN FIG. 6 WRITE WAVEFORMS CS CONTROLLED t WC OE t OEH t OES ADDRESS t AS tCSH t AH WE1 - 4 t CS CS1 - 4 t WP t WPH t DS t DH DATA IN 5 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX READ The WE128K32-XXX stores data at the memory location determined by the address pins. When CS and OE are low and WE is high, this data is present on the outputs. When CS and OE are high, the outputs are in a high impedance state. This two line control prevents bus contention. AC READ CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C) Read Cycle Parameter Symbol Read Cycle Time t RC -120 Min Max 120 -140 Min Max 140 -150 Min Max 150 -200 Min Max 200 -250 Min Max 250 -300 Min Max 300 Address Access Time t ACC 120 140 150 200 250 300 ns Chip Select Access Time t ACS 120 140 150 200 250 300 ns Output Hold from Add. Change, OE or CS t OH 0 Output Enable to Output Valid t OE 0 85 ns Chip Select or OE to High Z Output t DF 70 ns 0 50 0 0 55 70 0 70 0 55 0 70 0 55 0 70 READ WAVEFORMS t RC ADDRESS VALID CS 1-4 CS t ACS t OE OE t DF NOTES: OE may be delayed up to tACS - tOE after the falling edge of CS without impact on tOE or by t ACC - tOE after an address change without impact on tACC . t ACC OUTPUT White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com HIGH Z 6 t OH OUTPUT VALID 85 70 FIG. 7 ADDRESS 0 0 Unit ns ns WE128K32-XXX DATA POLLING The WE128K32-XXX offers a data polling feature which allows a faster method of writing to the device. Figure 8 shows the timing diagram for this function. During a byte or page write cycle, an attempted read of the last byte written will result in the complement of the written data on D7 (for each chip.) Once the write cycle has been completed, true data is valid on all outputs and the next cycle may begin. Data polling may begin at any time during the write cycle. DATA POLLING CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C) Parameter Symbol Min Data Hold Time tDH 10 OE Hold Time tOEH 10 OE To Output Valid tOE Write Recovery Time tWR Max Unit ns ns 55 0 ns ns FIG. 8 DATA POLLING WAVEFORMS WE1-4 CS1-4 t OEH OE I/O7 t DH t OE HIGH Z t WR ADDRESS 7 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX PAGE WRITE OPERATION PAGE WRITE CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C) The WE128K32-XXX has a page write operation that allows one to 128 bytes of data to be written into the device and consecutively loads during the internal programming period. Successive bytes may be loaded in the same manner after the first data byte has been loaded. An internal timer begins a time out operation at each write cycle. If another write cycle is completed within 150s or less, a new time out period begins. Each write cycle restarts the delay period. The write cycles can be continued as long as the interval is less than the time out period. Page Mode Write Characteristics The usual procedure is to increment the least significant address lines from A0 through A6 at each write cycle. In this manner a page of up to 128 bytes can be loaded in to the EEPROM in a burst mode before beginning the relatively long interval programming cycle. tWC Address Set-up Time tAS 0 ns Address Hold Time (1) tAH 100 ns Data Set-up Time tDS 100 ns Data Hold Time t DH 10 ns Write Pulse Width tWP 150 ns Byte Load Cycle Time tBLC Write Pulse Width High tWPH PAGE MODE WRITE WAVEFORMS OE CS x t BLC WE x ADDRESS t AH VALID ADDRESS t DS DATA VALID DATA White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 10 150 50 1. Page address must remain valid for duration of write cycle. t WPH t WC t DH BYTE 0 BYTE 1 8 Max Write Cycle Time, TYP = 6ms FIG. 9 t AS Unit Min After the 150s time out is completed, the EEPROM begins an internal write cycle. During this cycle the entire page of bytes will be written at the same time. The internal programming cycle is the same regardless of the number of bytes accessed. t WP Symbol Parameter BYTE 2 BYTE 3 BYTE 127 ms s ns WE128K32-XXX FIG. 10 SOFTWARE DATA PROTECTION ENABLE ALGORITHM(1) LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA WRITES ENABLED(2) LOAD DATA A0 TO ADDRESS 5555 LOAD DATA XX TO ANY ADDRESS(4) LOAD LAST BYTE TO LAST ADDRESS ENTER DATA PROTECT STATE NOTES: 1. Data Format: D 7 - D0 (Hex); Address Format: A 16 - A0 (Hex). 2. Write Protect state will be activated at end of write even if no other data is loaded. 3. Write Protect state will be deactivated at end of write period even if no other data is loaded. 4. 1 to 128 bytes of data may be loaded. 9 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX SOFTWARE DATA PROTECTION FIG. 11 A software write protection feature may be enabled or disabled by the user. When shipped by White Microelectronics, the WE128K32-XXX has the feature disabled. Write access to the device is unrestricted. SOFTWARE DATA PROTECTION DISABLE ALGORITHM(1) To enable software write protection, the user writes three access code bytes to three special internal locations. Once write protection has been enabled, each write to the EEPROM must use the same three byte write sequence to permit writing. After setting software data protection, any attempt to write to the device without the three-byte command sequence will start the internal write timers. No data will be written to the device, however, for the duration of tWC. The write protection feature can be disabled by a six byte write sequence of specific data to specific locations. Power transitions will not reset the software write protection. LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 80 TO ADDRESS 5555 Each 128K byte block of the EEPROM has independent write protection. One or more blocks may be enabled and the rest disabled in any combination. The software write protection guards against inadvertent writes during power transitions, or unauthorized modification using a PROM programmer. LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA HARDWARE DATA PROTECTION (3) These features protect against inadvertent writes to the WE128K32-XXX. These are included to improve reliability during normal operation: LOAD DATA XX TO ANY ADDRESS(4) a) V CC power on delay As VCC climbs past 3.8V typical the device will wait 5msec typical before allowing write cycles. LOAD LAST BYTE TO LAST ADDRESS b) V CC sense While below 3.8V typical write cycles are inhibited. EXIT DATA PROTECT STATE LOAD DATA 20 TO ADDRESS 5555 c) Write inhibiting Holding OE low and either CS or WE high inhibits write cycles. d) Noise filter Pulses of <8ns (typ) on WE or CS will not initiate a write cycle. NOTES: 1. Data Format: D 7 - D0 (Hex); Address Format: A 16 - A0 (Hex). 2. Write Protect state will be activated at end of write even if no other data is loaded. 3. Write Protect state will be deactivated at end of write period even if no other data is loaded. 4. 1 to 128 bytes of data may be loaded. White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 10 WE128K32-XXX PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1) 27.3 (1.075) 0.25 (0.010) SQ PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM 25.4 (1.0) TYP 4.34 (0.171) MAX 3.81 (0.150) 0.13 (0.005) 1.42 (0.056) 0.13 (0.005) 0.76 (0.030) 0.13 (0.005) 2.54 (0.100) TYP 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H) 30.1 (1.185) 0.38 (0.015) SQ PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM 25.4 (1.0) TYP 6.22 (0.245) MAX 3.81 (0.150) 0.1 (0.005) 1.27 (0.050) 0.1 (0.005) 0.76 (0.030) 0.1 (0.005) 2.54 (0.100) TYP 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 11 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX PACKAGE 501: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4) 39.6 (1.56) 0.38 (0.015) SQ 5.1 (0.200) MAX 1.27 (0.050) 0.1 (0.005) PIN 1 IDENTIFIER Pin 1 12.7 (0.500) 0.5 (0.020) 4 PLACES 5.1 (0.200) 0.25 (0.010) 4 PLACES 1.27 (0.050) TYP 0.25 (0.010) 0.05 (0.002) 0.38 (0.015) 0.08 (0.003) 68 PLACES 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T) 25.15 (0.990) 0.26 (0.010) SQ 4.57 (0.180) MAX 22.36 (0.880) 0.26 (0.010) SQ 0.27 (0.011) 0.04 (0.002) 0.25 (0.010) REF Pin 1 R 0.25 (0.010) 24.03 (0.946) 0.26 (0.010) 0.19 (0.007) 0.06 (0.002) 1 / 7 1.0 (0.040) 0.127 (0.005) 23.87 (0.940) REF DETAIL A 1.27 (0.050) TYP SEE DETAIL "A" 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 12 WE128K32-XXX PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U) 25.27 (0.995) 0.13 (0.005) SQ 3.56 (0.140) MAX 23.88 (0.940) 0.25 (0.010) SQ 0.25 (0.010) 0.61 (0.024) 0.15 (0.006) 0.84 (0.033) REF DETAIL A SEE DETAIL "A" 1.27 (0.050) 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF The White 68 lead G1U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G1U has the TCE and lead inspection advantage of the CQFP form. ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 13 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WE128K32-XXX FIG. 12 ALTERNATE PIN CONFIGURATION FOR WE128K32NP-XH1X TOP VIEW I/O0-31 Data Inputs/Outputs I/O8 WE2 I/O15 I/O24 VCC I/O31 A0-16 Address Inputs I/O9 CS2 I/O14 I/O25 CS4 I/O30 WE1-4 Write Enables 1 12 23 GND I/O10 I/O13 34 45 WE4 I/O26 56 I/O29 Chip Selects OE Output Enable VCC Power Supply I/O27 I/O28 OE A12 A4 A1 GND Ground A9 NC NC A5 A2 NC Not Connected A15 WE1 A13 A6 A3 I/O11 I/O12 A16 A10 A11 A0 NC VCC I/O7 A8 WE3 I/O23 I/O0 CS1 I/O6 I/O16 CS3 I/O22 I/O1 NC I/O5 I/O17 GND I/O21 I/O2 I/O3 I/O4 I/O18 I/O19 I/O20 22 CS1-4 A7 A14 BLOCK DIAGRAM WE1 CS 1 WE2 CS2 33 44 55 WE3 CS 3 WE 4CS4 OE A0-16 128K x 8 128K x 8 8 11 PIN DESCRIPTION I/O0-7 66 128K x 8 8 8 I/O8-15 I/O16-23 128K x 8 8 I/O24-31 ORDERING INFORMATION W E 128K32 X - XXX X X X LEAD FINISH: Blank = Gold plated leads A = Solder dip leads DEVICE GRADE: Q = Compliant M = Military Screened I = Industrial C = Commercial -55C to +125C -40C to +85C 0C to +70C PACKAGE TYPE: H1 = 1.075" sq. Ceramic Hex In-line Package, HIP (Package 400*) G2T = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 509) G1U = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 519) G4 = 40mm Ceramic Quad Flat Pack, CQFP (Package 501) ACCESS TIME (ns) IMPROVEMENT MARK N = No Connect at pins 8, 21, 28, and 39 in HIP for upgrade P = Alternate Pin Configuration for HIP package ORGANIZATION 128K x 32 User Configurable as 256K x 16 or 512K x 8 EEPROM WHITE ELECTRONIC DESIGNS CORP. White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 14 WE128K32-XXX DEVICE TYPE SPEED PACKAGE SMD NO. 128K x 32 EEPROM Module 300ns 66 pin HIP (H1) 5962-94585 01H5X 128K x 32 EEPROM Module 250ns 66 pin HIP (H1) 5962-94585 02H5X 128K x 32 EEPROM Module 200ns 66 pin HIP (H1) 5962-94585 03H5X 128K x 32 EEPROM Module 150ns 66 pin HIP (H1) 5962-94585 04H5X 128K x 32 EEPROM Module 140ns 66 pin HIP (H1) 5962-94585 05H5X 128K x 32 EEPROM Module 300ns 66 pin HIP (H1, P type pinout) 5962-94585 01H6X 128K x 32 EEPROM Module 250ns 66 pin HIP (H1, P type pinout) 5962-94585 02H6X 128K x 32 EEPROM Module 200ns 66 pin HIP (H1, P type pinout) 5962-94585 03H6X 128K x 32 EEPROM Module 150ns 66 pin HIP (H1, P type pinout) 5962-94585 04H6X 128K x 32 EEPROM Module 140ns 66 pin HIP (H1, P type pinout) 5962-94585 05H6X 128K x 32 EEPROM Module 300ns 68 lead CQFP/J (G2T) 5962-94585 01HMX 128K x 32 EEPROM Module 250ns 68 lead CQFP/J (G2T) 5962-94585 02HMX 128K x 32 EEPROM Module 200ns 68 lead CQFP/J (G2T) 5962-94585 03HMX 128K x 32 EEPROM Module 150ns 68 lead CQFP/J (G2T) 5962-94585 04HMX 128K x 32 EEPROM Module 140ns 68 lead CQFP/J (G2T) 5962-94585 05HMX 128K x 32 EEPROM Module 300ns 68 lead CQFP (G4) 5962-94585 01HNX 128K x 32 EEPROM Module 250ns 68 lead CQFP (G4) 5962-94585 02HNX 128K x 32 EEPROM Module 200ns 68 lead CQFP (G4) 5962-94585 03HNX 128K x 32 EEPROM Module 150ns 68 lead CQFP (G4) 5962-94585 04HNX 128K x 32 EEPROM Module 140ns 68 lead CQFP (G4) 5962-94585 05HNX 128K x 32 EEPROM Module 300ns 68 lead CQFP (G1U) 5962-94585 01H9X 128K x 32 EEPROM Module 250ns 68 lead CQFP (G1U) 5962-94585 02H9X 128K x 32 EEPROM Module 200ns 68 lead CQFP (G1U) 5962-94585 03H9X 128K x 32 EEPROM Module 150ns 68 lead CQFP (G1U) 5962-94585 04H9X 128K x 32 EEPROM Module 140ns 68 lead CQFP (G1U) 5962-94585 05H9X 15 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com