TDA7273
SINGLE CHIP STEREO CASSETTE PLAYBACK SYSTEM
WIDE OPERATING SUPPLY VOLTAGE
(1.8V to 7V)
INPUT COUP LING WITHOU T CAPA CITORS
BUILT-IN DC STEREO VOLUME CONTROL
BUILT-IN RIPPLE FILTERS
LOW QUIES CEN T CURRENT
NO EXTE RNAL B OUCHE RO T CELL
MAX OUTPUT CURRENT 70mA PEAK
DESCRIPTION
The TDA7273 is a monolithic integrated circuit
designed for portable cassette players market.
It comprises preamplifiers, DC volume control,
and headphone drivers.
September 2003
®
BLOCK DIAGRAM
DIP16 SO16
ORDERING NUMBERS:
TDA7273 TDA7273D
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ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Test Conditions Unit
VSSupply Voltage 9 V
IoOutput Current (max) 70 mA
Top Operating Temperature Range -20 to 70 °C
Tstg, TjStorage & Junction Temperature Range -40 to +150 °C
THERMAL DATA
Symbol Description DIP-16 SO-16 Unit
Rthj-amb Thermal Resistance Junction-ambient Max 100 200 °C/W
DC CHARACTERISTICS: Tamb = 25°C; VS = 3V; RL = 10K (Preamplifier), RL = 32 (Headphone);
VIN = 0; VOL control = Vref
Terminal No 12345678910111213141516
Terminal Voltage (V) 0 1.5 1.5 1.5 1.5 2.7 1.5 0 3 1.5 1.5 1.5 1.5 1.5 1.5 1.5
TEST CIRCUIT
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ELECTRICAL CHARACTERISTICS (Tamb = 25°C, VS = 3V, f = 1KHz, RL = 32 Vol. control = 2/3Vref
unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
VSSupply Voltage 1.8 7 V
IdQuiescent Current 14 20 mA
Vref Reference Voltage 1.3 1.49 1.7 V
PREAM PLIFIER SE C TION
GVO Open Loop Gain 70 dB
GVClose Loop Gain 30 33 35 dB
VoOutput Voltage THD = 1% 600 850 mV
IbBias Current 3 µA
THD Total Harmonic Distortion Vo = 330mVrms 0.05 0.25 %
CtCross Talk Rg = 2.2K; Vo = 330mVrms 74 dB
ENOutput Noise Rg = 2.2K; BW = 22Hz to 22KHz 100 µV
SVR Ripple Rejection Rg = 2.2K VR = 100mVrms
f = 100Hz; CSVR = 100µF 40 50 dB
HEADPH O NE DR I VER
Vo(DC) DC Output Voltage 1.50 V
PoOutput Powe r TH D = 1 0% ; 15 30 mW
PoTransient Output Power THD = 10% RL = 1650 mW
GVClose Loop Gain Po = 5mW 28 31 34 dB
THD Total Harmonic Distortion Po = 5mW 0.2 1 %
CtCross Talk Rg = 10K; Po = 5mW 40 50 dB
SVR Ripple Rejection Vr = 100mVrms, f = 100Hz
Vol. control = 1/3Vref
CSVR = 100µF; Rg =600
47 dB
Volume Control Range 66 75 dB
PIN C ONNECTION (Top view)
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Figure 1: Application Circuit
Figure 2: P.C. Board and Component Layout of the Circuit of Figure 1 (1:1 scale)
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Figure 7: SVR vs. Frequency (PREA MP LIFIER)
Figure 6: THD vs. Frequency (VS = 3V,
Vo =330mVrms, RL = 10K)
(PREAMPLIFIER)
Figure 5: Closed Loop Gain vs. Frequency
(VS = 3V) (PR EAMPLIFIER)
Figure 3: Supply Current vs. Supply Voltage
(Preamplifier + Driver) Figure 4: Vref, vs. Supply Voltage (pin 16)
Figure 8: Quiescent Output Voltage vs. Supply
Voltage (DRIVER)
VS = 3V
Rg = 2.2K
VR = 100mVrms
CSVR = 100µF
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Figure 13: SVR vs. Frequency VS = 3V (RL =
32, Vr = 100Vrms Rg = 600,
CSVR = 100mV) ( DRIVER)
Figure 10: Output Power vs. Supply Voltage
(Vol = 2/3Vref, RL = 32Ω, THD = 10%,
f = 1KHz ) (DRIVER)
Figure 14: Volume Control (0dB = 10mW ,
VS = 3V Rvol = 50K, RL = 32,
f = 1 K H z) vs . Volume S e tti ng ( D RIV ER)
Figure 12: THD vs. Frequency (Po = 5mW, VS =
3V RL = 32) (DR I VE R )
Figure 11: THD vs. Output Power (Vo = 2/3Vref,
VS = 3V, RL = 32, f = 1KHz)
(DRIVER)
Figure 9: Closed Loop Gain vs Frequency
(VS = 3V, RL = 32) (DRIVER)
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DIP16
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 0.77 1.65 0.030 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 0.050
OUTLINE AND
MECHANICAL DATA
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DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.35 2.65 0.093 0.104
A1 0.1 0.3 0.004 0.012
B 0.33 0.51 0.013 0.020
C 0.23 0.32 0.009 0.013
D 10.1 10.5 0.398 0.413
E 7.4 7.6 0.291 0.299
e 1.27 0.050
H 10 10.65 0.394 0.419
h 0.25 0.75 0.010 0.030
L 0.4 1.27 0.016 0.050
K 0˚ (min.)8˚ (max.)
h x 45
A
e
B
D
E
A1
H
L
C
K
16
18
9
SO16 Wide
OUTLINE AND
MECHANICAL DATA
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