©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
File Number4261.1
HGTP12N60C3D, HGT1S12N60C3DS
24A, 600V, UFS Series N-Channel IGBT
with Anti-Parallel Hyperfast Diodes
This family of MOS gated high voltage switching devices
combine the best features of MOSFETs and bipolar
transistors. The device has the high input impedance of a
MOSFET and the low on-state conduction loss of a bipolar
transistor. The much lower on-state voltage drop varies only
moderately between 25oC and 150oC. The IGBT used is the
development type TA49123. The diode used in anti-parallel
with the IGBT is the development type TA49188.
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential.
Formerly Developmental Type TA49182.
Symbol
Features
•24A, 600V at TC = 25oC
•Typical Fall Time at TJ = 150oC. . . . . . . . . . . . . . . . 210ns
•Short Circuit Rating
•Low Conduction Loss
•Hyperfast Anti-Parallel Diode
Packaging
JEDEC TO-220AB
JEDEC TO-263AB
Ordering Information
PART NUMBER PACKAGE BRAND
HGTP12N60C3D TO-220AB 12N60C3D
HGT1S12N60C3DS TO-263AB 12N60C3D
NOTE:When ordering, use the entire part number. Add the suffix T
to obtain the TO-263 variant in Tape and Reel, i.e.,
HGT1S12N60C3DST.
C
E
G
ECG
COLLECTOR
(FLANGE)
GE
COLLECTOR
(FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713
4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637
4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986
4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767
4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027
Data Sheet September 2001
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
Absolute Maximum RatingsTC = 25oC, Unless Otherwise Specified ALL TYPES UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES 600 V
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IC25 24 A
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 12 A
Average Diode Forward Current at 110oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I(AVG) 12 A
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM 96 A
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGES ±20 V
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGEM ±30 V
Switching Safe Operating Area at TJ = 150oC (Figure 14) . . . . . . . . . . . . . . . . . . . . . . SSOA 24A at 600V
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD104 W
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.83 W/oC
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -40 to 150 oC
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL260 oC
Short Circuit Withstand Time (Note 2) at VGE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 4µs
Short Circuit Withstand Time (Note 2) at VGE = 10V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 13 µs
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress on ly rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.Repetitive Rating: Pulse width limited by maximum junction temperature.
2.VCE(PK) = 360V, TJ = 125oC, RG = 25Ω.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Collector to Emitter Breakdown Voltage BVCES IC = 250µA, VGE = 0V 600 - - V
Collector to Emitter Leakage Current ICES VCE = BVCES TC = 25oC- - 250 µA
TC = 150oC- - 2.0 mA
Collector to Emitter Saturation Voltage VCE(SAT) IC = IC110, VGE = 15V TC = 25oC-1.65 2.0 V
TC = 150oC-1.85 2.2 V
IC = 15A, VGE = 15V TC = 25oC-1.80 2.2 V
TC = 150oC-2.0 2.4 V
Gate to Emitter Threshold Voltage VGE(TH) IC = 250µA, VCE = VGE 3.0 5.0 6.0 V
Gate to Emitter Leakage Current IGES VGE = ±20V - - ±100 nA
Switching SOA SSOA TJ = 150oC,
VGE = 15V,
RG = 25Ω,
L = 100µH
VCE(PK) = 480V 80 - - A
VCE(PK) = 600V 24 - - A
Gate to Emitter Plateau Voltage VGEP IC = IC110, VCE = 0.5 BVCES -7.6 -V
On-State Gate Charge Qg(ON) IC = IC110,
VCE = 0.5 BVCES VGE = 15V -48 55 nC
VGE = 20V -62 71 nC
Current Turn-On Delay Time td(ON)I TJ = 150oC,
ICE = IC110,
VCE(PK) = 0.8 BVCES,
VGE = 15V,
RG = 25Ω,
L = 100µH
-28 -ns
Current Rise Time tri -20 -ns
Current Turn-Off Delay Time td(OFF)I -270 400 ns
Current Fall Time tfi -210 275 ns
Turn-On Energy EON -380 -µJ
Turn-Off Energy (Note 3) EOFF -900 -µJ
Diode Forward Voltage VEC IEC = 12A -1.7 2.1 V
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
Diode Reverse Recovery Time trr IEC = 12A, dIEC/dt = 200A/µs-32 40 ns
IEC = 1.0A, dIEC/dt = 200A/µs-23 30 ns
Thermal Resistance RθJC IGBT - - 1.2 oC/W
Diode - - 1.9 oC/W
NOTE:
3.Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse, and ending
at the point where the collector current equals zero (ICE = 0A). This family of devices was tested per JEDEC Standard No. 24-1 Method for
Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include
losses due to diode recovery.
Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Typical Performance Curves
FIGURE 1.TRANSFER CHARACTERISTICS FIGURE 2.SATURATION CHARACTERISTICS
FIGURE 3.COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 4.COLLECTOR TO EMITTER ON-STATE VOLTAGE
ICE, COLLECTOR TO EMITTER CURRENT (A)
VGE, GATE TO EMITTER VOLTAGE (V)
6 8 10 12
0
10
20
40
50
60
70
14
30
80
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VCE = 10V
4
TC = 150oC
TC = 25oC
TC = -40oC
ICE, COLLECTOR TO EMITTER CURRENT (A)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
PULSE DURATION = 250µs, DUTY CYCLE <0.5%, TC = 25oC
00 2 4 6 8 10
10
20
30
12.0V
8.5V
9.0V
8.0V
7.5V
7.0V
VGE = 15.0V
40
50
60
70
80
10.0V
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
30
0 1 2 3 4 5
40
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VGE = 10V
TC = 150oC
TC = 25oC
TC = -40oC
10
20
50
70
80
60
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
30
012345
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
TC = 25oC
TC = -40oC
TC = 150oC
DUTY CYCLE <0.5%, VGE = 15V
PULSE DURATION = 250µs
10
20
40
50
60
70
80
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
FIGURE 5.MAXIMUM DC COLLECTOR CURRENT vs CASE
TEMPERATURE FIGURE 6.SHORT CIRCUIT WITHSTAND TIME
FIGURE 7.TURN ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT FIGURE 8.TURN OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 9.TURN ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT FIGURE 10.TURN OFF FALL TIME vs COLLECTOR TO
EMITTER CURRENT
Typical Performance Curves (Continued)
25 50 75 100 125 150
0
5
10
15
20
25
ICE, DC COLLECTOR CURRENT (A)
TC, CASE TEMPERATURE (oC)
VGE = 15V
ISC, PEAK SHORT CIRCUIT CURRENT (A)
20
60
80
120
tSC, SHORT CIRCUIT WITHSTAND TIME (
µ
s)
10 11 12
VGE, GATE TO EMITTER VOLTAGE (V)
14 1513
140
100
40
ISC
5
10
15
20 VCE = 360V, RG = 25Ω, TJ = 125oC
tSC
td(ON)I, TURN ON DELAY TIME (ns)
10
20
30
510 15 20
ICE, COLLECTOR TO EMITTER CURRENT (A)
100
25 30
50
VGE = 10V
VGE = 15V
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
td(OFF)I, TURN OFF DELAY TIME (ns)
400
300
200
100510 15 20 25 30
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V
VGE = 15V
ICE, COLLECTOR TO EMITTER CURRENT (A)
tri, TURN ON RISE TIME (ns)
5
10
100
510 15 20 25 30
VGE = 15V
VGE = 10V
200 TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
tfi, FALL TIME (ns)
100
510 15 20 25 30
200
300 TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V OR 15V
90
80
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
FIGURE 11.TURN ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT FIGURE 12.TURN OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 13.OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT FIGURE 14.SWITCHING SAFE OPERATING AREA
FIGURE 15.CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE FIGURE 16.GATE CHARGE WAVEFORMS
Typical Performance Curves (Continued)
ICE, COLLECTOR TO EMITTER CURRENT (A)
0510 15 20
EON, TURN ON ENERGY LOSS (mJ)
VGE = 15V
0.5
1.0
1.5
2.0
25 30
VGE = 10V
TJ = 150oC, RG = 25Ω, L = 100µH, V CE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
EOFF, TURN OFF ENERGY LOSS (mJ)
510 15 20 25 30
0.5
1.0
1.5
2.0
2.5
3.0
0
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V or 15V
ICE, COLLECTOR TO EMITTER CURRENT (A)
fMAX, OPERATING FREQUENCY (kHz)
5 10 20 30
10
100
200
1
fMAX2 = (PD - PC)/(EON + EOFF)
PD = ALLOWABLE DISSIPATION
PC = CONDUCTION DISSIPATION
fMAX1 = 0.05/(tD(OFF)I + tD(ON)I)
(DUTY FACTOR = 50%)
RθJC = 1.2oC/W
TJ = 150oC, TC = 75oC
RG = 25Ω, L = 100µH
VGE = 15V
VGE = 10V
VCE(PK), COLLECTOR TO EMITTER VOLTAGE (V)
ICE, COLLECTOR TO EMITTER CURRENT (A)
0100 200 300 400 500 600
0
20
40
60
80
100 TJ = 150oC, VGE = 15V, RG = 25Ω, L = 100µH
LIMITED BY
CIRCUIT
COES
CRES
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
0 5 10 15 20 25
0
500
1000
1500
2000
2500
C, CAPACITANCE (pF)
FREQUENCY = 1MHz
CIES
VGE, GATE TO EMITTER VOLTAGE (V)
Qg, GATE CHARGE (nC)
15
12
9
6
3
010 20 30 40 50 600
VCE = 200V VCE = 400V
VCE = 600V
IG REF = 1.276mA, RL = 50Ω, TC = 25oC
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
FIGURE 17.IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE
FIGURE 18.DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP FIGURE 19.RECOVERY TIMES vs FORWARD CURRENT
Typical Performance Curves (Continued)
t1,RECTANGULAR PULSE DURATION (s)
10-5 10-3 100101
10-4 10-1
10-2
100
Z
θ
JC, NORMALIZED THERMAL RESPONSE
10-1
10-2
DUTY FACTOR, D = t1 / t2
PEAK TJ = PD x ZθJC x RθJC + TC
t1
t2
PD
SINGLE PULSE
0.5
0.2
0.1
0.05
0.02
0.01
0.5 1.0 1.5 2.5 3.0
IEC, FORWARD CURRENT (A)
VEC, FORWARD VOLTAGE (V)
02.0
10
0
20
30
40
50
25oC
100oC
150oC
30
20
10
0
tR, RECOVERY TIMES (ns)
IEC, FORWARD CURRENT (A)
510 200 15
35
25
15
5
trr
ta
tb
TC = 25oC, dIEC/dt = 200A/ms
Test Circuit and Waveform
FIGURE 20.INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21.SWITCHING TEST WAVEFORMS
RG = 25Ω
L = 100µH
VDD = 480V
+
-
HGTP12N60C3D
tfi
td(OFF)I tri
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF EON
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
1.Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.
2.When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means, for example, with a metallic wristband.
3.Tips of soldering irons should be grounded.
4.Devices should never be inserted into or removed from
circuits with power on.
5.Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6.Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to voltage
buildup on the input capacitor due to leakage currents or
pickup.
7.Gate Protection - These devices do not have an internal
monolithic Zener Diode from gate to emitter. If gate
protection is required, an external Zener is
recommended.
Operating Frequency Information
Operating frequency information for a typical device (Figure13)
is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs collector
current (ICE) plots are possible using the information shown
for a typical unit in Figures 4, 7, 8, 11 and 12. The operating
frequency plot (Figure 13) of a typical device shows fMAX1 or
fMAX2 whichever is smaller at each point. The information is
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
fMAX1 is defined by fMAX1 = 0.05/(tD(OFF)I + tD(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. tD(OFF)I and tD(ON)I are defined in Figure 21.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM. tD(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowable dissipation (PD) is defined by PD=(TJM -TC)/RθJC.
The sum of device switching and conduction losses must not
exceed PD. A 50% duty factor was used (Figure 13) and the
conduction losses (PC) are approximated by
PC=(VCE xICE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 21. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss during turn-off. All
tail losses are included in the calculation for EOFF; i.e., the
collector current equals zero (ICE = 0).
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
HGTP12N60C3D, HGT1S12N60C3DS
TO-220AB (Alternate Version)
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
E
ØP
D
L
L1
60o
b1
b
e
e1
H1
1J1
2 3
TERM. 4
Q
c
A1
A
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A0.170 0.180 4.32 4.57 -
A10.048 0.052 1.22 1.32 2, 4
b0.030 0.034 0.77 0.86 2, 4
b10.045 0.055 1.15 1.39 2, 4
c0.018 0.022 0.46 0.55 2, 4
D0.590 0.610 14.99 15.49 -
E0.395 0.405 10.04 10.28 -
e0.100 TYP 2.54 TYP 5
e10.200 BSC 5.08 BSC 5
H10.235 0.255 5.97 6.47 -
J10.095 0.105 2.42 2.66 6
L0.530 0.550 13.47 13.97 -
L10.110 0.130 2.80 3.30 3
ØP 0.149 0.153 3.79 3.88 -
Q0.105 0.115 2.66 2.92 -
NOTES:
1.These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2.Dimension (without solder).
3.Solder finish uncontrolled in this area.
4.Add typically 0.002 inches (0.05mm) for solder plating.
5.Position of lead to be measured 0.250 inches (6.35mm) from bot-
tom of dimension D.
6.Position of lead to be measured 0.100 inches (2.54mm) from bot-
tom of dimension D.
7.Controlling dimension:Inch.
8.Revision 3 dated 7-97.
©2001 Fairchild Semiconductor Corporation HGTP12N60C3D, HGT1S12N60C3DS Rev. A1
HGTP12N60C3D, HGT1S12N60C3DS
TO-263ABSURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
TO-263AB
24mm TAPE AND REEL
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
EA1
A
H1
D
L
be
e1
L2
b1
L1
c
TERM. 4
1 3
13
L3
b2
TERM. 4 0.450
0.350
0.150
(3.81)
0.080 TYP (2.03)
0.700
(11.43)
(8.89)
(17.78)
0.062 TYP (1.58)
J1
SYMBOL INCHES MILLIMETERS NOTESMIN MAX MIN MAX
A0.170 0.180 4.32 4.57 -
A10.048 0.052 1.22 1.32 4, 5
b0.030 0.034 0.77 0.86 4, 5
b10.045 0.055 1.15 1.39 4, 5
b20.310 -7.88 -2
c0.018 0.022 0.46 0.55 4, 5
D0.405 0.425 10.29 10.79 -
E0.395 0.405 10.04 10.28 -
e0.100 TYP 2.54 TYP 7
e10.200 BSC 5.08 BSC 7
H10.045 0.055 1.15 1.39 -
J10.095 0.105 2.42 2.66 -
L0.175 0.195 4.45 4.95 -
L10.090 0.110 2.29 2.79 4, 6
L20.050 0.070 1.27 1.77 3
L30.315 -8.01 -2
NOTES:
1.These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-263AB outline dated 2-92.
2.L3 and b2 dimensions established a minimum mounting surface
for terminal 4.
3.Solder finish uncontrolled in this area.
4.Dimension (without solder).
5.Add typically 0.002 inches (0.05mm) for solder plating.
6.L1 is the terminal length for soldering.
7.Position of lead to be measured 0.120 inches (3.05mm) from bottom
of dimension D.
8.Controlling dimension:Inch.
9.Revision 10 dated 5-99.
2.0mm
4.0mm 1.75mm
1.5mm
DIA. HOLE
C
L
USER DIRECTION OF FEED
16mm
24mm
330mm 100mm
13mm
30.4mm
24.4mm
COVER TAPE
GENERAL INFORMATION
1. 800 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
ACCESS HOLE
40mm MIN.
Rev. H4
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LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or
In Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2001 Fairchild Semiconductor Corporation
