©2012 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to www.littelfuse.com/SPA for current information.
26
TVS Diode Arrays (SPA
™ Family of Products)
Revision: March 20, 2012
SP1001 Series
General Purpose ESD Protection - SP1001 Series
Absolute Maximum Ratings
Symbol Parameter Value Units
IPP Peak Current (tp=8/20s) 2 A
TOP Operating Temperature -40 to 85 °C
TSTOR Storage Temperature -60 to 150 °C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress only rating and operation of the device
at these or any other conditions above those indicated in the operational sections of this
specification is not implied.
Electrical Characteristics (TOP = 25°C)
Parameter Symbol Test Conditions Min Typ Max Units
Forward Voltage Drop VFIF=10mA 0.7 0.9 1.2 V
Reverse Voltage Drop VRIR=1mA 7.0 7.8 8.5 V
Reverse Standoff Voltage VRWM IR≤1µA 5.5 V
Reverse Leakage Current ILEAK VR=5V 0.5 µA
Clamp Voltage1VC
IPP=1A, tp=8/20µs, Fwd 8.0 11.0 V
IPP=2A, tp=8/20µs, Fwd 9.7 13.0 V
Dynamic Resistance RDYN (VC2 - VC1) / (IPP2 - IPP1) 1.7
ESD Withstand Voltage1,2 VESD
IEC61000-4-2 (Contact) ±15 kV
IEC61000-4-2 (Air) ±30 kV
Diode Capacitance1CD
Reverse Bias=0V 12 pF
Reverse Bias=2.5V 8 pF
Reverse Bias=5V 7 pF
Notes:
1 Parameter is guaranteed by device characterization
2 A minimum of 1,000 ESD pulses are applied at 1s intervals between the anode and common cathode of each diode
Thermal Information
Parameter Rating Units
Storage Temperature Range -65 to 150 °C
Maximum Junction Temperature 150 °C
Maximum Lead Temperature (Soldering
20s-40s)
260 °C
Capacitance vs. Reverse Bias
0
2
4
6
8
10
12
14
DC Bias (V)
Capacitance (pF)
00.511.522.533.544.555.56
Design Consideration
Because of the fast rise-time of the ESD transient,
placement of ESD devices is a key design consideration.
To achieve optimal ESD suppression, the devices should be
placed on the circuit board as close to the source of the ESD
transient as possible. Install the ESD suppressors directly
behind the connector so that they are the first board-level
circuit component encountered by the ESD transient. They
are connected from signal/data line to ground.