1. Product profile
1.1 General description
NPN/PNP Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic
packages.
1.2 Features and benefits
1.3 Applications
Low current peripheral driver
Control of IC inputs
Replaces general-purpose transistors in digital applications
1.4 Quick reference data
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors;
R1 = 10 k, R2 = 10 k
Rev. 11 — 25 September 2013 Product data sheet
Table 1. Product overview
Type number Package PNP/PNP
complement NPN/NPN
complement Package
configuration
Nexperia JEITA
PEMD3 SOT666 - PEMB11 PEMH11 ultra small and flat lead
PIMD3 SOT457 SC-74 - - small
PUMD3 SOT363 SC-88 PUMB11 PUMH11 very small
100 mA output current capability Reduces component count
Built-in bias resistors Reduces pick and place costs
Simplifies circuit design AEC-Q101 qualified
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transistor; for the PNP transistor (TR2) with negative polarity
VCEO collector-emitter voltage open base - - 50 V
IOoutput current - - 100 m A
R1 bias resistor 1 (input) 7 10 13 k
R2/R1 bias resistor ratio 0.8 1 1.2
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 2 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
2. Pinning information
3. Ordering information
4. Marking
[1] * = placeholder for manufacturing site code.
Table 3. Pinning
Pin Description Simplified outline Graphic symbol
1 GND (emitter) TR1
2 input (base) TR1
3 output (collector) TR2
4 GND (emitter) TR2
5 input (base) TR2
6 output (collector) TR1
001aab555
6 45
1 32
65 4
123
R2
TR1 TR2
R1
R2 R1
006aaa143
Table 4. Orderin g information
Type number Package
Name Description Version
PEMD3 - plastic surface-mounted package; 6 leads SOT666
PIMD3 SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
PUMD3 SC-88 plastic surface-mounted package; 6 leads SOT363
Table 5. Marking codes
Type number Marking code[1]
PEMD3 D3
PIMD3 M7
PUMD3 D*3
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 3 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
5. Limiting values
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor; for the PNP transistor (TR2) with negative polarity
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 10 V
VIinput voltage TR1
positive - +40 V
negative - 10 V
input voltage TR2
positive - +10 V
negative - 40 V
IOoutput current - 100 mA
ICM peak collector current - 100 mA
Ptot total power dissipation Tamb 25 C[1]
PEMD3 (SOT666) - 200 mW
PIMD3 (SOT457) - 250 mW
PUMD3 (SOT363) - 200 mW
Per device
Ptot total power dissipation Tamb 25 C[1]
PEMD3 (SOT666) - 300 mW
PIMD3 (SOT457) - 400 mW
PUMD3 (SOT363) - 300 mW
Tjjunction temperature - 150 C
Tamb ambient temp erature 65 +150 C
Tstg storage temperature 65 +150 C
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 4 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
(1) SOT457; FR4 PCB, standard footprint
(2) SOT363 and SOT666; FR4 PCB, standard footprint
Fig 1. Per device: Power derating curves
Tamb (°C)
-75 17512525 75-25
006aac766
200
300
100
400
500
Ptot
(mW)
0
(1)
(2)
Table 7. Thermal characteris tics
Symbol Parameter Conditions Min Typ Max Unit
Per transis tor
Rth(j-a) thermal resistance from
junction to ambient in free air [1]
PEMD3 (SOT666) - - 625 K/W
PIMD3 (SOT457) - - 500 K/W
PUMD3 (SOT363) - - 625 K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air [1]
PEMD3 (SOT666) - - 417 K/W
PIMD3 (SOT457) - - 313 K/W
PUMD3 (SOT363) - - 417 K/W
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 5 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for
PEMD3 (SOT666); typical valu es
FR4 PCB, standard footprint
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for
PIMD3 (SOT457); typical values
006aac751
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1
0.05
0.02 0.01
0
006aac767
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1
0.05
0.02 0.01
0
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 6 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
FR4 PCB, standard footprint
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for
PUMD3 (SOT363); typical values
006aac750
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33
0.2
0.1 0.05
0.02 0.01
0
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 7 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
7. Characteristics
[1] Characteristics of built-in transistor.
Table 8. Characteristics
Tamb = 25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per transistor; for the PNP transistor (TR2) with negative polarity
ICBO collector-base
cut-off current VCB =50V; I
E= 0 A - - 100 nA
ICEO collector-emitter
cut-off current VCE =30V; I
B=0A --1A
VCE =30V; I
B=0A;
Tj= 150 C--5A
IEBO emitter-base
cut-off current VEB =5V; I
C= 0 A - - 400 A
hFE DC current gain VCE =5V; I
C=5mA 30 - -
VCEsat collector-emitter
saturation voltage IC=10mA; I
B= 0.5 mA - - 150 mV
VI(off) off-state input
voltage VCE =5V; I
C=100A-1.10.8V
VI(on) on-state input
voltage VCE = 0.3 V; IC=10mA 2.5 1.8 - V
R1 bias resistor 1 (input) 7 10 13 k
R2/R1 bias resistor ratio 0.8 1 1.2
Cccollector capacitance VCB =10V; I
E=i
e=0A;
f=1MHz
TR1 (NPN) - - 2.5 pF
TR2 (PNP) - - 3 pF
fTtransition frequency VCB =5V; I
C=10mA;
f = 100 MHz [1]
TR1 (NPN) - 230 - M Hz
TR2 (PNP) - 180 - MHz
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 8 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
VCE =5V
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
IC/IB=20
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
Fig 5. TR1 (NPN): DC current gain as a function of
collector current; typical valu es F ig 6. TR1 (NPN): Collector-emitter saturation
voltage as a function of collector cur r e nt;
typical values
VCE =0.3V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
VCE =5V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
Fig 7. TR1 (NPN): On-state input voltage as a
function of collector current; typical values Fig 8. TR1 (NPN): Off-state input voltage as a
function of collector current; typical values
IC (mA)
10-1 102
101
006aac768
102
10
103
hFE
1
(1)
(2)
(3)
IC (mA)
110
2
10
006aac769
10-1
1
VCEsat
(V)
10-2
(1)
(2)
(3)
006aac770
IC (mA)
10-1 102
101
1
10
VI(on)
(V)
10-1
(1)
(2)
(3)
IC (mA)
10-1 101
006aac771
1
10
VI(off)
(V)
10-1
(1)
(2)
(3)
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 9 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
f = 1 MHz; Tamb =25CV
CE =5V; T
amb =25C
Fig 9. TR1 (NPN): Collector capacit ance as a function
of collector-base voltage; typical values Fig 10. TR1 (NPN): Transition frequency as a function
of collector current; typical values of built-in
transistor
VCE =5V
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
IC/IB=20
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
Fig 11. TR2 (PNP): DC current gain as a function of
collector current; typical valu es F ig 12. TR2 (PNP): Collector-emitter saturation
voltage as a function of collector cur r e nt;
typical values
VCB (V)
0504020 3010
006aac772
1
2
3
Cc
(pF)
0
006aac757
IC (mA)
10-1 102
101
102
103
fT
(MHz)
10
IC (mA)
-10-1 -102
-10-1
006aac773
102
10
103
hFE
1
(1)
(2)
(3)
IC (mA)
-1 -102
-10
006aac774
-10-1
-1
VCEsat
(V)
-10-2
(1)
(2)
(3)
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 10 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
VCE =0.3 V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
VCE =5V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
Fig 13. TR2 (PNP): On-state input voltag e as a
function of collector current; typical values Fig 14. TR2 (PNP): Off-state input voltage as a
function of collector current; typical values
f = 1 MHz; Tamb =25CV
CE =5V; T
amb =25C
Fig 15. TR2 (PNP): Collector cap acitance as a function
of collector-base voltage; typical values Fig 16. TR2 (PNP): Transition frequency as a fun ction
of collector current; typical values of built-in
transistor
006aac775
IC (mA)
-10-1 -102
-10-1
-1
-10
VI(on)
(V)
-10-1
(1)
(2)
(3)
IC (mA)
-10-1 -10-1
006aac776
-1
-10
VI(off)
(V)
-10-1
(1)
(2)
(3)
VCB (V)
0 -50-40-20 -30-10
006aac777
2
4
6
Cc
(pF)
0
006aac763
IC (mA)
-10-1 -102
-10-1
102
103
fT
(MHz)
10
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 11 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
8. Test information
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
9. Package outline
Fig 17. Package outline PEMD3 (SOT666) Fig 18. Package outline PIMD3 (SOT457/SC-74)
Fig 19. Package outline PUMD3 (SOT363/SC-88)
Dimensions in mm 04-11-08
1.7
1.5
1.7
1.5
1.3
1.1
1
0.18
0.08
0.27
0.17
0.5
pin 1 index
123
456
0.6
0.5
0.3
0.1
04-11-08Dimensions in mm
3.0
2.5 1.7
1.3
3.1
2.7
pin 1 index
1.9
0.26
0.10
0.40
0.25
0.95
1.1
0.9
0.6
0.2
132
4
56
06-03-16Dimensions in mm
0.25
0.10
0.3
0.2
pin 1
index
1.3
0.65
2.2
2.0 1.35
1.15
2.2
1.8 1.1
0.8
0.45
0.15
132
465
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 12 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
10. Soldering
Fig 20. Reflow soldering footprint PIMD3 (SOT457/SC-74)
Fig 21. W ave soldering footprint PIMD3 (SOT457/SC-74)
solder lands
solder resist
occupied area
solder paste
sot457_fr
3.45
1.95
2.8253.3
0.45
(6×)0.55
(6×)
0.7
(6×)
0.8
(6×)2.4
0.95
0.95
Dimensions in mm
sot457_fw
5.3
5.05
1.45
(6×)
0.45
(2×)
1.5
(4×)
2.85
1.475
1.475 solder lands
solder resist
occupied area
preferred transport
direction during soldering
Dimensions in mm
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 13 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
Fig 22. Reflow soldering footprint PUMD3 (SOT363/SC-88)
Fig 23. W ave soldering footprint PUMD3 (SOT363/SC-88)
solder lands
solder resist
occupied area
solder paste
sot363_fr
2.65
2.35 0.4 (2×)
0.6
(2×)
0.5
(4×)
0.5
(4×)
0.6
(4×)
0.6
(4×)
1.5
1.8
Dimensions in mm
sot363_fw
solder lands
solder resist
occupied area
preferred transport
direction during soldering
5.3
1.3 1.3
1.5
0.3
1.5
4.5
2.45
2.5
Dimensions in mm
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 14 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
Fig 24. Reflow soldering foot prin t PEMD3 (SOT666)
solder lands
placement area
occupied area
solder paste
sot666_fr
2.75
2.45
2.1
1.6
0.4
(6×)
0.55
(2×)
0.25
(2×)
0.6
(2×)
0.65
(2×)
0.3
(2×)
0.325
(4×)
0.45
(4×)
0.5
(4×)
0.375
(4×)
1.72
1.7
1.0750.538
Dimensions in mm
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 15 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
11. Revision history
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PEMD3_PIMD3_
PUMD3 v.11 20130925 Product data sheet - PEMD3_PIMD3_
PUMD3 v.10
Modifications: •Section 1 “Product profile”: updated
•Section 4 “Marking”: updated
•Table 6 “Limiting values”: Ptot updated according to the latest measurements
•Table 7 “Thermal characteristics”: updated according to the latest measurements
•Table 8 “Characteristics”: ICEO updated according to the latest measurements, fT added
•Figure 1 to 3, 9, 10, 15 and 16: added
•Figure 5 to 8 and Figure 11 to 14: updated
•Section 8 “Test information”: added
•Section 10 “Soldering”: added
•Section 12 “Legal information”: updated
PEMD3_PIMD3_
PUMD3 v.10 20091115 Product data sheet - PEMD3_PIMD3_
PUMD3 v.9
PEMD3_PIMD3_ PUMD3 v.9 20050518 Product data sheet - PEMD3_PIMD3_
PUMD3 v.8
PEMD3_PIMD3_ PUMD3 v.8 20041206 Product data sheet - PEMD3_PUMD3 v.7
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 16 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conf lict with the short data sheet, the
full data sheet shall pre vail.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an inf ormation
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use in automotive applications — This Nexperia
product has been qualified for use in automotive
applications. Unless ot herwise agreed in writing, t he product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications an d ther efo re su ch inclusi on a nd/or use is at the cu stome r's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessa ry
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by cust omer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the obj ective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
PEMD3_PIMD3_PUMD3 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 11 — 25 September 2013 17 of 18
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
No offer to sell or license — Nothing in this document may be interpret ed or
construed as an of fer to sell product s that is op en for accept ance or the grant ,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
13. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors
14. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 11
8.1 Quality information . . . . . . . . . . . . . . . . . . . . . 11
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
13 Contact information. . . . . . . . . . . . . . . . . . . . . 17
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
25 September 2013
