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HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

HCPL06XX Rev. 1.0.9

August 2013

HCPL0600, HCPL0601, HCPL0611,

HCPL0637, HCPL0638, HCPL0639

High Speed-10 MBit/s Logic Gate Optocouplers

Single Channel: HCPL0600, HCPL0601, HCPL0611

Dual Channel: HCPL0637, HCPL0638, HCPL0639

Features

■

Compact SO8 package

■

Very high speed-10 MBit/s

■

Superior CMR

■

Logic gate output

■

Strobable output (single channel devices)

■

Wired OR-open collector

■

U.L. recognized (File # E90700)

■

IEC60747-5-2 approved (VDE option)

– HCPL0600, HCPL0601, HCPL0611 only

Applications

■

Ground loop elimination

■

LSTTL to TTL, LSTTL or 5-volt CMOS

■

Line receiver, data transmission

■

Data multiplexing

■

Switching power supplies

■

Pulse transformer replacement

■

Computer-peripheral interface

Description

The HCPL06XX optocouplers consist of an AlGaAS

LED, optically coupled to a very high speed integrated

photo-detector logic gate with a strobable output (single

channel devices). The devices are housed in a compact

small-outline package. This output features an open col-

lector, thereby permitting wired OR outputs. The

HCPL0600, HCPL0601 and HCPL0611 output consists

of bipolar transistors on a bipolar process while the

HCPL0637, HCPL0638, and HCPL0639 output consists

of bipolar transistors on a CMOS process for reduced

power consumption. The coupled parameters are guar-

anteed over the temperature range of -40°C to +85°C.

An internal noise shield provides superior common

mode rejection.

Package Dimensions

Lead Coplanarity : 0.004 (0.10) MAX

0.202 (5.13)

Pin 1

0.019 (0.48)

0.182 (4.63)

0.021 (0.53)

0.011 (0.28) 0.050 (1.27)

TYP

0.244 (6.19)

0.224 (5.69)

0.143 (3.63)

0.123 (3.13)

0.008 (0.20)

0.003 (0.08)

0.010 (0.25)

0.006 (0.16)

SEATING PLANE

0.164 (4.16)

0.144 (3.66)

Note:

All dimensions are in inches (millimeters)

HCPL06XX Rev. 1.0.9 2

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Truth Table

(Positive Logic)

*Dual channel devices or single channel devices with pin 7 not connected.

A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1)

Input Enable Output

HHL

LHH

HLH

LLH

H* NC* L*

L* NC* H*

Single-channel circuit drawing

(HCPL0600, HCPL0601 and HCPL0611)

Dual-channel circuit drawing

(HCPL0637, HCPL0638 and HCPL0639)

1

2

3

4 5

6

7

8

N/C

_

VCC

VE

VO

GND

+

N/C

VF

1

2

3

45

6

7

8

+

_

VF1

VCC

V01

V02

GND

VF2

_

+

HCPL06XX Rev. 1.0.9 3

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Absolute Maximum Ratings

(No derating required up to 85°C)

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is

5.0mA or less

Symbol Parameter Value Units

T

STG

Storage Temperature -40 to +125 °C

T

OPR

Operating Temperature -40 to +85 °C

EMITTER

I

F

DC/Average Forward Input Current

(each channel)

Single Channel 50 mA

Dual Channel

V

E

Enable Input Voltage

Not to exceed VCC by more than 500mV

Single Channel 5.5 V

V

R

Reverse Input Voltage (each channel) 5.0 V

P

I

Power Dissipation Single Channel 45 mW

Dual Channel

DETECTOR

V

CC

(1 minute max)

Supply Voltage 7.0 V

I

O

Output Current (each channel) Single Channel 50 mA

Dual Channel 15

V

O

Output Voltage (each channel) 7.0 V

P

O

Collector Output Power Dissipation Single Channel 85 mW

Dual Channel 85

Symbol Parameter Min. Max. Units

I

FL

Input Current, Low Level 0 250 µA

I

FH

Input Current, High Level *6.3 15 mA

V

CC

Supply Voltage, Output 4.5 5.5 V

V

EL

Enable Voltage, Low Level Single Channel only 0 0.8 V

V

EH

Enable Voltage, High Level Single Channel only 2.0 V

CC

V

T

A

Operating Temperature -40 +85 °C

N Fan Out (TTL load) Single Channel 8 TTL Loads

Dual Channel 5

R

L

Output Pull-up 330 4K

Ω

HCPL06XX Rev. 1.0.9 4

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Electrical Characteristics

(T

A

= -40°C to +85°C unless otherwise speciﬁed.)

Individual Component Characteristics

Switching Characteristics

(T

A

= -40°C to +85°C, V

CC

= 5 V, I

F

= 7.5 mA unless otherwise speciﬁed.)

Symbol Parameter Test Conditions Min. Typ.* Max. Unit

EMITTER

V

F

Input Forward Voltage I

F

= 10mA 1.8 V

T

A

= 25°C 1.75

B

VR

Input Reverse Breakdown Voltage I

R

= 10µA 5.0 V

Δ

VF/

Δ

TA Input Diode Temperature Coefﬁcient I

F

= 10mA -1.5 mV/°C

DETECTOR

I

CCH

High Level Supply Current I

F

= 0mA, V

E

= 0.5 V

V

CC

= 5.5V

Single Channel 10 mA

Dual Channel 15

I

CCL

Low Level Supply Current I

F

= 10mA, V

E

= 0.5 V

V

CC

= 5.5V

Single Channel 13 mA

Dual Channel 21

I

EL

Low Level Enable Current V

CC

= 5.5V, V

E

= 0.5V Single Channel -1.6 mA

I

EH

High Level Enable Current V

CC

= 5.5V, V

E

= 2.0V Single Channel -1.6 mA

V

EH

High Level Enable Voltage V

CC

= 5.5V, I

F

= 10mA Single Channel 2.0 V

V

EL

Low Level Enable Voltage V

CC

= 5.5V, I

F

= 10mA

(2)

Single Channel 0.8 V

Symbol AC Characteristics Test Conditions Device Min. Typ. Max. Unit

T

PLH

Propagation Delay Time

to Output High Level

R

L

= 350

Ω

, C

L

= 15pF

(3)

T

A

= 25°C All 20 75 ns

(Fig. 20) 100

T

PHL

Propagation Delay Time

to Output Low Level

R

L

= 350

Ω

, C

L

= 15pF

(4)

T

A

= 25°C All 25 75 ns

(Fig. 20) 100

|T

PHL

-T

PLH

| Pulse Width Distortion R

L

= 350

Ω

, C

L

= 15pF (Fig. 20) All 35 ns

t

r

Output Rise Time (10-90%) R

L

= 350

Ω

, C

L

= 15pF

(5)

(Fig. 20) Single Ch 50 ns

Dual Ch

17

t

f

Output Fall Time (90-10%) R

L

= 350

Ω

, C

L

= 15pF

(6)

(Fig. 20) Single Ch 12 ns

Dual Ch

5

t

ELH

Enable Propagation Delay

Time to Output High Level

I

F

= 7.5mA, V

EH

= 3.5V, R

L

= 350

Ω

,

C

L

= 15pF

(7)

(Fig. 21)

HCPL0600

HCPL0601

HCPL0611

20 ns

t

EHL

Enable Propagation Delay

Time to Output Low Level

I

F

= 7.5mA, V

EH

= 3.5V, R

L

= 350

Ω

,

C

L

= 15 pF

(8)

(Fig. 21)

HCPL0600

HCPL0601

HCPL0611

20 ns

|CM

H

| Common Mode

Transient Immunity

(at Output High Level)

R

L

= 350

Ω

, T

A

=25°C,

I

F

= 0mA,

V

OH

(Min.) = 2.0 V(9)

(Fig. 22, 23)

|VCM| = 10V HCPL0600

HCPL0637

5,000 V/µs

|VCM| = 50V HCPL0601

HCPL0638

10,000

|VCM| = 1,000V HCPL0611 15,000

HCPL0639 25,000

|CML| Common Mode

Transient Immunity

(at Output Low Level)

RL = 350Ω, TA =25°C,

IF = 7.5mA,

VOL (Max.) = 0.8 V(10)

(Fig. 22, 23)

|VCM| = 10V HCPL0600

HCPL0637

5,000 V/µs

|VCM| = 50V HCPL0601

HCPL0638

10,000

|VCM| = 1,000V HCPL0611 15,000

HCPL0639 25,000

HCPL06XX Rev. 1.0.9 5

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Transfer Characteristics (TA = -40°C to +85°C unless otherwise speciﬁed.)

Isolation Characteristics (TA = -40°C to +85°C unless otherwise speciﬁed.)

*All typical values are at VCC = 5 V, TA = 25°C

Notes:

1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic

or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible

to the package VCC and GND pins of each device.

2. Enable Input – No pull up resistor required as the device has an internal pull up resistor.

3. tPLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current

pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.

4. tPHL – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current

pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.

5. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.

6. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.

7. tELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input

voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.

8. tEHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input

voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.

9. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high

state (i.e., VOUT > 2.0V). Measured in volts per microsecond (V/µs).

10. CML – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low

output state (i.e., VOUT < 0.8V). Measured in volts per microsecond (V/µs).

11. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted

together.

Symbol DC Characteristics Test Conditions Min. Typ.* Max. Unit

IOH High Level Output Current VCC = 5.5V, VO = 5.5 V, IF = 250µA,

VE = 2.0V(2)

100 µA

VOL Low Level Output Voltage VCC = 5.5V, IF = 5mA, VE = 2.0V,

IOL = 13mA(2)

0.6 V

IFT Input Threshold Current VCC = 5.5V, VO = 0.6V, VE = 2.0V,

IOL = 13mA

5mA

Symbol Characteristics Test Conditions Min. Typ.* Max. Unit

II-O Input-Output

Insulation Leakage Current

Relative humidity = 45%,

TA = 25°C, t = 5s,

VI-O = 3000 VDC(11)

1.0* µA

VISO Withstand Insulation Test Voltage RH < 50%, TA = 25°C,

II-O ≤ 2µA, t = 1 min.(11)

3750 VRMS

RI-O Resistance (Input to Output) VI-O = 500V(11) 1012 Ω

CI-O Capacitance (Input to Output) f = 1MHz(11) 0.6 pF

HCPL06XX Rev. 1.0.9 6

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only)

Fig. 1 Forward Current vs. Input Forward Voltage

VF – FORWARD VOLTAGE (V)

IF – FORWARD CURRENT (mA)

Fig. 2 Output Voltage vs. Forward Current

IOH – HIGH LEVEL OUTPUT CURRENT (μA)

ITH – INPUT THRESHOLD CURRENT (mA)

Fig. 3 Input Threshold Current vs. Temperature

TA – TEMPERATURE (˚C) TA – TEMPERATURE (˚C)

Fig. 4 High Level Output Current vs. Temperature

IF – FORWARD INPUT CURRENT (mA)

Vo – OUTPUT VOLTAGE (V)

0.91.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7

0.001

0.01

0.1

1

10

100

TA = 85°C

TA = 70°C

TA = 25°C

TA = 0°C

TA = -40°C

012345

0

1

2

3

4

5

6

TA = 25°C

VCC = 5V

RL = 350Ω

RL = 1kΩ

-40-200 20406080100

0

1

2

3

4

5

VCC = 5V

VO = 0.6V

RL = 350Ω

RL = 1KΩ

-40-200 20406080100

0

2

4

6

8

10

12

14

16

VO = VCC = 5.5V

VE = 2V

IF = 250μA

HCPL06XX Rev. 1.0.9 7

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only)

Fig. 5 Low Level Output Voltage vs. Temperature

TA – TEMPERATURE (˚C)

VOL – LOW LEVEL OUTPUT VOLTAGE (V)

TP – PROPAGATION DELAY (ns)

Fig. 6 Low Level Output Current vs. Temperature

IOL – LOW LEVEL OUTPUT CURRENT (mA)

TP – PROPAGATION DELAY (ns)

Fig. 7 Propagation Delay vs. Temperature Fig. 8 Propagation Delay vs. Pulse Input Current

IF – PULSE INPUT CURRENT (mA)

-40-200 20406080100

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

VCC = 5.5V

VE = 2V

IF = 5mA

IO = 12.8mA

IO = 9.6mA

IO = 6.4mA

IO = 16mA

-40-200 20406080100

20

25

30

35

40

45

50

55

60

VCC = 5V

VE = 2V

VOL = 0.6V

IF = 10-15mA

IF = 5mA

-40-200 20406080100

20

30

40

50

60

70

80

90

100

VCC = 5V

IF = 7.5mA

tPLH

RL = 1kΩ

tPLH

RL = 350Ω

tPHL

RL = 350Ω & 1kΩ

57911 13 15

20

30

40

50

60

70

80

90

VCC = 5V

TA = 25°C

tPLH

RL = 1kΩ

tPLH

RL = 350Ω

tPHL

RL = 350Ω & 1kΩ

HCPL06XX Rev. 1.0.9 8

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only)

Fig. 9 Typical Enable Propagation Delay vs. Temparature

TA – TEMPERATURE (˚C) TA – TEMPERATURE (˚C)

TA – TEMPERATURE (˚C)

tE – ENABLE PROPAGATION DELAY (ns)

Fig. 10 Typical Rise and Fall Time vs. Temperature

tf – FALL TIME (ns)

Fig. 11 Typical Pulse Width Distortion vs. Temperature

PWD – PULSE WIDTH DISTORTION (ns)

-40-200 20406080100

0

10

20

30

40

50

60

70

80

90

VCC = 5V

VEH = 3V

VEL = 0V

IF = 7.5mA tELH

RL = 1kΩ

tELH

RL = 350Ω

tEHL

RL = 350Ω & 1kΩ

-40-200 20406080100

0

40

80

120

160

200

240

VCC = 5V

IF = 7.5mA

tr

RL = 1kΩ

tr

RL = 350Ω

tf

RL = 350Ω & 1kΩ

-40-200 20406080100

0

5

10

15

20

25

30

35

40

VCC = 5V

IF = 7.5mA

RL = 1kΩ

RL = 350Ω

HCPL06XX Rev. 1.0.9 9

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only)

Fig. 12 Input Forward Current vs. Forward Voltage Fig. 13 Input Threshold Current vs. Ambient Temperature

Fig. 14 High Level Output Current vs.

Ambient Temperature

Fig. 15 Low Level Output Current vs.

Ambient Temperature

Fig. 16 Low Level Output Voltage vs.

Ambient Temperature

V

F

– FORWARD VOLTAGE (V)

0.91.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7

I

F

– FORWARD CURRENT (mA)

T

A

= 85°C

T

A

= 100°C

T

A

= 25°C

T

A

= 0°C

T

A

= -40°C

0.8

0.001

0.01

0.1

1

10

100

ITH – INPUT THRESHOLD CURRENT (mA)

TA – AMBIENT TEMPERATURE (°C)

-40 -20 0 20 40 60 80 100

0.0

0.5

1.0

1.5

2.0

2.5

V

CC

= 5.5V

V

O

= 0.6V

R

L

= 1kΩ

R

L

= 350Ω

R

L

= 4kΩ

-40 -20 0 20 40 60 80 100

IOH –

HIGH LEVEL OUTPUT CURRENT (nA)

0

4

8

12

16

20

V

O

= V

CC

= 5.5V

V

E

= 2V (Single Channel Only)

I

F

= 250 μA

-40 -20 0 20 40 60 80 100

I

OL

– LOW LEVEL OUTPUT CURRENT (mA)

10

15

20

25

30

35

40

VCC = 5.5V

VE = 2V (Single Channel Only)

VOL = 0.6V

IF = 5 – 15mA

-40 -20 0 20 40 60 80 100

V

OL

– LOW LEVEL OUTPUT VOLTAGE (V)

0.0

0.1

0.2

0.3

0.4

0.5

0.6

V

CC

= 5.5V

V

E

= 2V (Single Channel Only)

I

F

= 5mA

I

O

= 6.4mA I

O

= 9.6mA

I

O

= 12.8mA I

O

= 16mA

Fig. 17 Pulse Width Distortion vs.

Ambient Temperature

-40 -20 0 20 40 60 80 100

PWD – PULSE WIDTH DISTORTION (ns)

0

10

20

30

40

50

60

70

VCC = 5V

IF = 7.5mA

RL = 1kΩ

RL = 350Ω

RL = 4kΩ

TA – AMBIENT TEMPERATURE (°C)

HCPL06XX Rev. 1.0.9 10

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only)

Fig. 18 Propagation Delay vs.

Ambient Temperature

Fig. 19 Rise and Fall Times vs.

Ambient Temperature

T

A

– AMBIENT TEMPERATURE (°C) T

A

– AMBIENT TEMPERATURE (°C)

-40 -20 0 20 40 60 80 100

0

20

40

60

80

100

120

VCC = 5V

IF = 7.5mA

tPHL

RL = 350Ω, 1kΩ, 4kΩ

tPLH

RL = 350Ω

tPLH

RL = 1kΩ

tPLH

RL = 4kΩ

T

P

– PROPAGATION DELAY (ns)

-40 -20 0 20 40 60 80

100

t

r

– RISE TIME (ns)

0

50

100

150

200

250

300

350

t

f

– FALL TIME (ns)

0

1

2

3

4

5

6

7

V

CC

= 5V

I

F

= 7.5mA

t

f

– RL = 350Ω, 1kΩ, 4kΩ

t

r

– RL = 350Ω

t

r

– RL = 1kΩ

t

r

– RL = 4kΩ

HCPL06XX Rev. 1.0.9 11

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

PHL

t

F

I = 7.5 mA

1.5 V

90%

10%

7.5 mA

+5V

1.5 V

3.0 V

1.5 V

3

2

1

4

8

7

6

5

PLH

t

I = 3.75 mA

F

Output

O

(V )

Input

(I )

F

Output

(V )

O

f

t

r

t

O

Z = 50Ω

Pulse

Generator

tr = 5ns

(V )

E

Input

Monitor

GND

V

CC

O

(V )

Output

L

R

L

C

(V )

Output

O

Input

(V )

E

EHL

t

ELH

bypass

.1μf

Fig. 20 Test Circuit and Waveforms for tPLH, tPHL, trand tf.

Fig. 21 Test Circuit tEHL and tELH.

t

1

2

3

4

1

2

3

4

8

7

6

5GND

VCC 8

7

6

5

Dual Channel

Pulse Gen.

ZO = 50 Ω

tf = tr = 5 ns

Pulse Gen.

tf = tr = 5 ns

ZO = 50 Ω

+5 V

IF

VCC

RM

RL

.1μf

Bypass

CL

+5V

47Ω

RL

Input

Monitoring

Node

Input

Monitor

(IF)

Output

(VO)

Output VO

Monitoring

Node

0.1μF

Bypass

CL*

GND

Test Circuit for HCPL0600,

HCPL0601 and HCPL0611

Test Circuit for HCPL0637,

HCPL0638 and HCPL0639

HCPL06XX Rev. 1.0.9 12

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

+5V

Peak

3

2

1

4

8

7

6

5

GND

V

CC

O

(V )

Output

350Ω

V

CM

FF

V

A

B

Pulse Gen

I

F

CM

V

0V

O

V

5V Switching Pos. (A), I = 0

F

O

V (Max)

CM

0.5 V

O

VSwitching Pos. (B), I = 7.5 mA

F

H

CM

L

V (Min)

O

bypass

0.1

μf

Fig. 22 Test Circuit Common Mode Transient Immunity

Test Circuit for HCPL0600, HCPL0601, and HCPL0611

(HCPL0600, HCPL0601 and HCPL0611)

HCPL06XX Rev. 1.0.9 13

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Peak

CM

V

0V

O

V

3.3V Switching Pos. (A), I = 0

F

O

V (Max)

CM

0.5 V

O

VSwitching Pos. (B), I = 7.5 mA

F

H

CM

L

V (Min)

O

Fig. 23 T

(HCPL0637, HCPL0638 and HCPL0639)

est Circuit Common Mode Transient Immunity

1

2

3

4

8

B

A

7

6

5

Dual Channel

+3.3V

IF

VCC

VCM

Pulse

Generator

ZO = 50 Ω

+–

RL

VFF

Output VO

Monitoring

Node

0.1μF

Bypass

GND

Test Circuit for HCPL0637, HCPL0638 and HCPL0639

HCPL06XX Rev. 1.0.9 14

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

8-Pin Small Outline

0.024 (0.61)

0.050 (1.27)

0.155 (3.94)

0.275 (6.99)

0.060 (1.52)

HCPL06XX Rev. 1.0.9 15

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Ordering Information

*Available for HCPL0600, HCPL0601, HCPL0611 only.

Marking Information

Option Order Entry Identiﬁer Description

No Sufﬁx HCPL0600 Shipped in tubes (50 units per tube)

V* HCPL0600V IEC60747-5-2 approval

R2 HCPL0600R2 Tape and Reel (2500 units per reel)

R2V* HCPL0600R2V IEC60747-5-2 approval, Tape and Reel (2500 units per reel)

1

2

6

43 5

Deﬁnitions

1 Fairchild logo

2 Device number

3 VDE mark indicates IEC60747-5-2 approval

(Note: Only appears on parts ordered with VDE option –

See order entry table)

4 One digit year code, e.g., ‘3’

5 Two digit work week ranging from ‘01’ to ‘53’

6 Assembly package code

600

SYYXV

HCPL06XX Rev. 1.0.9 16

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Carrier Tape Speciﬁcations

4.0 ± 0.10

Ø1.5 MIN

User Direction of Feed

2.0 ± 0.05

1.75 ± 0.10

5.5 ± 0.05

12.0 ± 0.3

8.0 ± 0.10

0.30 MAX

8.3 ± 0.10

3.50 ± 0.20

0.1 MAX 6.40 ± 0.20

5.20 ± 0.20

Ø1.5 ± 0.1/-0

HCPL06XX Rev. 1.0.9 17

HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers

Reﬂow Proﬁle

Proﬁle Freature Pb-Free Assembly Proﬁle

Temperature Min. (Tsmin) 150°C

Temperature Max. (Tsmax) 200°C

Time (tS) from (Tsmin to Tsmax) 60–120 seconds

Ramp-up Rate (tL to tP) 3°C/second max.

Liquidous Temperature (TL) 217°C

Time (tL) Maintained Above (TL) 60–150 seconds

Peak Body Package Temperature 260°C +0°C / –5°C

Time (tP) within 5°C of 260°C 30 seconds

Ramp-down Rate (TP to TL) 6°C/second max.

Time 25°C to Peak Temperature 8 minutes max.

Time (seconds)

Temperature (°C)

Time 25°C to Peak

260

240

220

200

180

160

140

120

100

80

60

40

20

0

TL

ts

tL

tP

TP

Tsma x

Tsmi n

120

Preheat Area

Max. Ramp-up Rate = 3°C/S

Max. Ramp-down Rate = 6°C/S

240 360

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