LTC6102 LTC6102-1/LTC6102HV Precision Zero Drift Current Sense Amplifier DESCRIPTION FEATURES n n n n n n n n n n n Supply Range: 4V to 60V, 70V Maximum (LTC6102) 5V to 100V, 105V Maximum (LTC6102HV) 10V Input Offset Maximum 50nV/C Input Offset Drift Maximum Fast Response: 1s Step Response Gain Configurable with Two Resistors Low Input Bias Current: 3nA Maximum PSRR 130dB Minimum Output Currents up to 1mA Operating Temperature Range: -40C to 125C Disable Mode (LTC6102-1 Only): 1A Maximum Available in 8-Lead MSOP and 3mm x 3mm DFN Packages The LTC(R)6102/LTC6102HV are versatile, high voltage, highside current sense amplifiers. Their high supply voltage rating allows their use in many high side applications, while the low drift and offset ensure accuracy across a wide range of operating conditions. The LTC6102-1 is a version of the LTC6102 that includes a low power disable mode to conserve system standby power. The LTC6102/LTC6102HV monitor current via the voltage across an external sense resistor (shunt resistor). Internal circuitry converts input voltage to output current, allowing a small sense signal on a large common mode voltage to be translated to a ground-referred signal. Low DC offset allows the use of very low shunt resistor values and large gain-setting resistors. As a result, power loss in the shunt is reduced. APPLICATIONS n n n n n n The wide operating supply and high accuracy make the LTC6102 ideal for a large array of applications, from automotive, to industrial and power management. A maximum input sense voltage of 2V allows a wide range of currents and voltages to be monitored. Fast response makes the LTC6102 the perfect choice for load current warnings and shutoff protection control. Current Shunt Measurement Battery Monitoring Remote Sensing Load Protection Motor Control Automotive Controls All versions of the LTC6102 are available in 8-lead MSOP and 3mm x 3mm DFN packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 10A Current Sense with 10mA Resolution and 100mW Maximum Dissipation 110 + RIN 20 - 100 +IN -INS + 105V L O A D V- - V+ 0.1F VREG LTC6102 RSENSE = 100m Max VSENSE = 1V 90 -INF 1F 5V 80 70 RSENSE = 10m Max VSENSE = 100V 60 50 40 VOUT OUT DYNAMIC RANGE (dB) VSENSE 1m + 5V TO Dynamic Current Measurement Range DYNAMIC RANGE RELATIVE TO 10V OFFSET VOLTAGE 30 ROUT 4.99k LTC2433-1 TO P 20 0.0001 0.001 0.01 0.1 MAXIMUM SENSE VOLTAGE (V) 1 6102 TA01b 6102 TA01 VOUT = ROUT * VSENSE = 249.5VSENSE RIN *PROPER SHUNT SELECTION COULD ALLOW MONITORING OF CURRENTS IN EXCESS OF 1000A 6102fd 1 LTC6102 LTC6102-1/LTC6102HV ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V-): LTC6102/LTC6102-1 .............................................70V LTC6102HV .........................................................105V Input Voltage Range -INF, -INS ................................ (V+ - 4V to V+ + 0.3V) +IN ............................................ (V+ - 20V to V+ + 1V) EN ............................................ (V- - 0.3V to V- + 9V) Differential (-INS - +IN), 1 Second ......................60V Output Voltage Range LTC6102/LTC6102HV ............... (V- - 0.3V to V- + 9V) LTC6102-1 ............................. (V- - 0.3V to V- + 15V) Input Current -INF, -INS ........................................................10mA +IN ...................................................................-10mA EN ....................................................................10mA Output Current .......................................(+1mA, -10mA) Output Short Circuit Duration........................... Indefinite Operating Temperature Range: (Note 2) LTC6102C/LTC6102C-1/LTC6102HVC .. -40C to 85C LTC6102I/LTC6102I-1/LTC6102HVI...... -40C to 85C LTC6102H/LTC6102H-1 LTC6102HVH...................................... -40C to 125C Specified Temperature Range: (Note 2) LTC6102C/LTC6102C-1/LTC6102HVC ...... 0C to 70C LTC6102I/LTC6102I-1/LTC6102HVI...... -40C to 85C LTC6102H/LTC6102H-1 LTC6102HVH...................................... -40C to 125C Storage Temperature Range................... -65C to 150C PIN CONFIGURATION TOP VIEW -INS 1 V 3 OUT 4 -INS -INF V-/EN* OUT + -INF 2 -/EN* TOP VIEW 8 +IN 7 V 9 6 VREG 5 V- 1 2 3 4 8 7 6 5 +IN V+ VREG V- MS8 PACKAGE 8-LEAD PLASTIC MSOP DD PACKAGE 8-LEAD (3mm s 3mm) PLASTIC DFN TJMAX = 150C, JA = 43C/W EXPOSED PAD (PIN 9) IS V-, MUST BE SOLDERED TO PCB *V- FOR THE LTC6102/LTC6102HV, EN FOR THE LTC6102-1 TJMAX = 150C, JA = 200C/W *V- FOR THE LTC6102/LTC6102HV, EN FOR THE LTC6102-1 ORDER INFORMATION LEAD FREE FINISH LTC6102CDD#PBF LTC6102IDD#PBF LTC6102HDD#PBF LTC6102CDD-1#PBF LTC6102IDD-1#PBF LTC6102HDD-1#PBF LTC6102HVCDD#PBF LTC6102HVIDD#PBF LTC6102HVHDD#PBF LTC6102CMS8#PBF LTC6102IMS8#PBF TAPE AND REEL LTC6102CDD#TRPBF LTC6102IDD#TRPBF LTC6102HDD#TRPBF LTC6102CDD-1#TRPBF LTC6102IDD-1#TRPBF LTC6102HDD-1#TRPBF LTC6102HVCDD#TRPBF LTC6102HVIDD#TRPBF LTC6102HVHDD#TRPBF LTC6102CMS8#TRPBF LTC6102IMS8#TRPBF PART MARKING* LCKH LCKH LCKH LDYB LDYB LDYB LCVC LCVC LCVC LTCKJ LTCKJ PACKAGE DESCRIPTION 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead Plastic MSOP 8-Lead Plastic MSOP SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C -40C to 125C 0C to 70C -40C to 85C -40C to 125C 0C to 70C -40C to 85C -40C to 125C 0C to 70C -40C to 85C 6102fd 2 LTC6102 LTC6102-1/LTC6102HV ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6102HMS8#PBF LTC6102HMS8#TRPBF LTCKJ 8-Lead Plastic MSOP -40C to 125C LTC6102CMS8-1#PBF LTC6102CMS8-1#TRPBF LTDXZ 8-Lead Plastic MSOP 0C to 70C LTC6102IMS8-1#PBF LTC6102IMS8-1#TRPBF LTDXZ 8-Lead Plastic MSOP -40C to 85C LTC6102HMS8-1#PBF LTC6102HMS8-1#TRPBF LTDXZ 8-Lead Plastic MSOP -40C to 125C LTC6102HVCMS8#PBF LTC6102HVCMS8#TRPBF LTCVB 8-Lead Plastic MSOP 0C to 70C LTC6102HVIMS8#PBF LTC6102HVIMS8#TRPBF LTCVB 8-Lead Plastic MSOP -40C to 85C LTC6102HVHMS8#PBF LTC6102HVHMS8#TRPBF LTCVB 8-Lead Plastic MSOP -40C to 125C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6102CDD LTC6102CDD#TR LCKH 8-Lead (3mm x 3mm) Plastic DFN 0C to 70C LTC6102IDD LTC6102IDD#TR LCKH 8-Lead (3mm x 3mm) Plastic DFN -40C to 85C LTC6102HDD LTC6102HDD#TR LCKH 8-Lead (3mm x 3mm) Plastic DFN -40C to 125C LTC6102CDD-1 LTC6102CDD-1#TR LDYB 8-Lead (3mm x 3mm) Plastic DFN 0C to 70C LTC6102IDD-1 LTC6102IDD-1#TR LDYB 8-Lead (3mm x 3mm) Plastic DFN -40C to 85C LTC6102HDD-1 LTC6102HDD-1#TR LDYB 8-Lead (3mm x 3mm) Plastic DFN -40C to 125C LTC6102HVCDD LTC6102HVCDD#TR LCVC 8-Lead (3mm x 3mm) Plastic DFN 0C to 70C LTC6102HVIDD LTC6102HVIDD#TR LCVC 8-Lead (3mm x 3mm) Plastic DFN -40C to 85C LTC6102HVHDD LTC6102HVHDD#TR LCVC 8-Lead (3mm x 3mm) Plastic DFN -40C to 125C LTC6102CMS8 LTC6102CMS8#TR LTCKJ 8-Lead Plastic MSOP 0C to 70C LTC6102IMS8 LTC6102IMS8#TR LTCKJ 8-Lead Plastic MSOP -40C to 85C LTC6102HMS8 LTC6102HMS8#TR LTCKJ 8-Lead Plastic MSOP -40C to 125C LTC6102CMS8-1 LTC6102CMS8-1#TR LTDXZ 8-Lead Plastic MSOP 0C to 70C LTC6102IMS8-1 LTC6102IMS8-1#TR LTDXZ 8-Lead Plastic MSOP -40C to 85C LTC6102HMS8-1 LTC6102HMS8-1#TR LTDXZ 8-Lead Plastic MSOP -40C to 125C LTC6102HVCMS8 LTC6102HVCMS8#TR LTCVB 8-Lead Plastic MSOP 0C to 70C LTC6102HVIMS8 LTC6102HVIMS8#TR LTCVB 8-Lead Plastic MSOP -40C to 85C LTC6102HVHMS8 LTC6102HVHMS8#TR LTCVB 8-Lead Plastic MSOP -40C to 125C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 6102fd 3 LTC6102 LTC6102-1/LTC6102HV ELECTRICAL CHARACTERISTICS (LTC6102, LTC6102-1) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. RIN = 10, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for details), V+ = 12V, V- = 0V, VEN = 2.2V unless otherwise noted. SYMBOL V+ VOS PARAMETER Supply Voltage Range Input Offset Voltage (Note 3) Input Offset Voltage (Note 4) VOS/T Input Offset Voltage Drift (Note 3) IB Input Bias Current (Note 5) PSRR Power Supply Rejection Ratio CONDITIONS VSENSE = 100V 6V V+ 60V V+ = 4V VSENSE = 100V 6V V+ 60V V+ = 4V VSENSE = 100V LTC6102C, LTC6102I, LTC6102C-1, LTC6102I-1 LTC6102H, LTC6102H-1 RIN = 40k, VSENSE = 2mV LTC6102C, LTC6102I, LTC6102C-1, LTC6102I-1 LTC6102H, LTC6102H-1 VSENSE = 100V, V+ = 6V to 60V VSENSE = 100V, V+ = 4V to 60V VSENSE(MAX) Input Sense Voltage Full Scale (V+ - VIN+) VOUT Maximum Output Voltage (LTC6102) Maximum Output Voltage (LTC6102-1) Error <1%, RIN = 10k, ROUT = 10k 6V V+ 60V V+ = 4V VSENSE = 2mV, ROUT = 100k 12V V+ 60V V+ = 6V V+ = 4V VSENSE = 2mV, ROUT = 100k V+ = 60V V+ = 12V V+ = 4V 6V V+ 60V, RIN = 1k, ROUT = 1k, VSENSE = 1.1V V+ = 4V, RIN = 10, ROUT = 1k, VSENSE = 11mV IOUT Maximum Output Current tr Input Step Response (to 2.5V on VSENSE = 100mV Transient, 6V V+ 60V, RIN = 100, a 5V Output Step) ROUT = 4.99k, IOUT = 100A V+ = 4V Signal Bandwidth IOUT = 200A, RIN = 100, ROUT = 4.99k IOUT = 1mA, RIN = 100, ROUT = 4.99k Input Noise Voltage 0.1Hz to 10Hz Supply Current V+ = 4V, IOUT = 0, RIN = 10k, ROUT = 100k BW eN IS V+ = 6V, IOUT = 0, RIN = 10k, ROUT = 100k V+ = 12V, IOUT = 0, RIN = 10k, ROUT = 100k IDIS VENL Supply Current in Disable Mode (LTC6102-1 Only) Enable Input Voltage Low (LTC6102-1 Only) V+ = 60V, IOUT = 0, RIN = 10k, ROUT = 100k LTC6102C, LTC6102I, LTC6102C-1, LTC6102I-1 LTC6102H, LTC6102H-1 VEN = 0.8V, V+ = 12V VEN = 0.8V, V+ = 60V MIN 4 l l l l TYP MAX 60 3 5 10 25 V V 3 5 35 50 V V 25 25 60 50 75 nV/C nV/C pA nA nA dB dB dB dB 3 20 l 130 125 120 115 l l 2 0.8 V V l l l 8 3 1 V V V l l l 14 11.7 3.8 1 0.5 l l l 150 UNITS V 140 V V V mA mA s 1 l l l l l l l l l 1.5 140 200 2 275 290 300 420 400 475 425 500 450 525 575 650 675 1 18 0.8 s kHz kHz VP-P A A A A A A A A A A A V 6102fd 4 LTC6102 LTC6102-1/LTC6102HV ELECTRICAL CHARACTERISTICS (LTC6102, LTC6102-1) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. RIN = 10, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for details), V+ = 12V, V- = 0V, VEN = 2.2V unless otherwise noted. SYMBOL VENH tON PARAMETER Enable Input Voltage High (LTC6102-1 Only) Enable Input Pin Current (LTC6102-1 Only) Turn-On Time (LTC6102-1 Only) tOFF Turn-Off Time (LTC6102-1 Only) fS Sampling Frequency IBEN CONDITIONS l VEN = 0V to 9V MIN 2.2 TYP l MAX 8 VEN = 2.2V, VSENSE = 1mV, Output Settles to Within 1% of Final Value VEN = 0.8V, VSENSE = 1mV, Supply Current Drops to Less Than 10% of Nominal Value UNITS V A 500 s 100 s 10 kHz ELECTRICAL CHARACTERISTICS (LTC6102HV) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. RIN = 10, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for details), V+ = 12V, V- = 0V unless otherwise noted. SYMBOL PARAMETER V+ Supply Voltage Range CONDITIONS VOS Input Offset Voltage (Note 3) VSENSE = 100V 6V V+ 100V V+ = 5V Input Offset Voltage (Note 4) VSENSE = 100V 6V V+ 100V V+ = 5V Input Offset Voltage Drift (Note 3) VSENSE = 100V LTC6102HVC, LTC6102HVI LTC6102HVH IB Input Bias Current (Note 5) Power Supply Rejection Ratio TYP MAX UNITS 100 V 3 5 10 25 V V 3 5 35 50 V V 25 25 50 75 nV/C nV/C 3 20 pA nA nA 5 VOS/T PSRR MIN RIN = 40k, VSENSE = 2mV LTC6102HVC, LTC6102HVI LTC6102HVH VSENSE = 100V, V+ = 6V to 100V VSENSE = 100V, V+ = 5V to 100V l l 60 l l l 130 125 l 120 115 150 140 dB dB dB dB VSENSE(MAX) Input Sense Voltage Full Scale (V+ - V+IN) Error <1%, RIN = 10k, ROUT = 10k 6V V+ 100V V+ = 5V l l 2 1 V V VOUT VSENSE = 2mV, ROUT = 100k 12V V+ 100V V+ = 5V l l 8 3 V V 6V V+ 100V, RIN = 1k, ROUT = 1k, VSENSE = 1.1V V+ = 5V, RIN = 10, ROUT = 1k, VSENSE = 11mV l l 1 0.5 Maximum Output Voltage IOUT Maximum Output Current tr Input Step Response (to 2.5V on a VSENSE = 100mV Transient, 6V V+ 100V, 5V Output Step) RIN = 100, ROUT = 4.99k, IOUT = 100A 1 s V+ = 5V 1.5 s 140 200 kHz kHz BW Signal Bandwidth IOUT = 200A, RIN = 100, ROUT = 4.99k IOUT = 1mA, RIN = 100, ROUT = 4.99k eN Input Noise Voltage 0.1Hz to 10Hz mA mA 2 VP-P 6102fd 5 LTC6102 LTC6102-1/LTC6102HV ELECTRICAL CHARACTERISTICS (LTC6102HV) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. RIN = 10, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for details), V+ = 12V, V- = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IS Supply Current V+ = 5V, IOUT = 0, RIN = 10k, ROUT = 100k MIN V+ = 6V, IOUT = 0, RIN = 10k, ROUT = 100k V+ = 12V, IOUT = 0, RIN = 10k, ROUT = 100k l l l V+ = 100V, IOUT = 0, RIN = 10k, ROUT = 100k fS TYP MAX UNITS 275 400 475 A A 280 425 500 A A 290 450 525 A A 575 A LTC6102HVC, LTC6102HVI l 650 A LTC6102HVH l 675 A Sampling Frequency Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. In addition to the Absolute Maximum Ratings, the output current of the LTC6102 must be limited to ensure that the power dissipation in the LTC6102 does not allow the die temperature to exceed 150C. See the Applications Information "Output Current Limitations Due to Power Dissipation" for further information. Note 2: The LTC6102C/LTC6102C-1/LTC6102HVC are guaranteed to meet specified performance from 0C to 70C. The LTC6102C/LTC6102C-1/ LTC6102HVC are designed, characterized and expected to meet specified performance from -40C to 85C but are not tested or QA sampled at these temperatures. LTC6102I/LTC6102I-1/LTC6102HVI are guaranteed 420 10 kHz to meet specified performance from -40C to 85C. The LTC6102H/ LTC6102H-1/LTC6102HVH are guaranteed to meet specified performance from -40C to 125C. Note 3: These Parameters are guaranteed by design and are not 100% tested. Thermocouple effects preclude measurements of these voltage levels during automated testing. Note 4: Limits are fully tested. Limit is determined by high speed automated test capability. Note 5: IB specification is limited by practical automated test resolution. Please refer to the Typical Performance Characteristics section for more information regarding actual typical performance. For tighter specifications, please contact LTC Marketing. 6102fd 6 LTC6102 LTC6102-1/LTC6102HV TYPICAL PERFORMANCE CHARACTERISTICS Input VOS vs Supply Voltage 15 15 10 10 VS = 4V 5 0 VS = 12V -5 0 -5 -10 -15 -15 0 TA = -40C TA = 0C TA = 25C TA = 70C TA = 85C TA = 125C -20 20 40 60 80 100 120 TEMPERATURE (C) 0 0 VS = 100V VS = 12V VS = 6V VS = 5V -20 0 20 40 60 80 100 120 TEMPERATURE (C) 35 VS = 12V 30 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -40 VS = 6V VS = 5V VS = 4V -20 IOUT = 1mA DC 10000 IOUT = 200A DC 5 TA = 25C V+ = 12V -5 RIN = 100 ROUT = 4.99k -10 10k 1k 0 20 40 60 80 100 120 TEMPERATURE (C) VS = 100V VS = 60V VS = 12V VS = 6V VS = 5V 1000 100 0 6102 G07 VS = 60V 6102 G06 BIAS CURRENT (pA) 10 120 Input Bias Current vs Temperature 20 15 100 VS = 12V 100000 25 VS = 100V 20 40 60 80 100 120 TEMPERATURE (C) 60 80 VSUPPLY (V) 6102 G03 Gain vs Frequency VS = 5V 40 LTC6102/LTC6102-1: IOUT Maximum vs Temperature 40 VS = 6V 20 6102 G05 GAIN (dB) MAXIMUM IOUT (mA) 0.5 MAXIMUM IOUT (mA) MAXIMUM VOUT (V) MAXIMUM VOUT (V) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -40 LTC6102HV: IOUT Maximum vs Temperature 0 1.0 LTC6102HV: VOUT Maximum vs Temperature 6102 G04 -20 1.5 6102 G02 LTC6102: VOUT Maximum vs Temperature 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -40 2.0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 SUPPLY VOLTAGE (V) 6102 G01 15 14 13 VS = 60V 12 11 V S = 12V 10 9 8 7 VS = 6V 6 5 4 VS = 4V 3 2 VS = 5V 1 0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) TA = 25C 2.5 5 -10 -20 -40 -20 Input Sense Range 3.0 MAXIMUM VSENSE (V) 20 INPUT OFFSET (V) INPUT OFFSET (V) Input VOS vs Temperature 20 100k 1M FREQUENCY (Hz) 10M 6102 G09 10 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 6102 G10 6102fd 7 LTC6102 LTC6102-1/LTC6102HV TYPICAL PERFORMANCE CHARACTERISTICS LTC6102: Supply Current vs Supply Voltage LTC6102HV: Supply Current vs Supply Voltage 600 400 300 TA = 25C 200 TA = 0C TA = -40C TA = 70C 500 TA = 125C 100 V+ - 10mV TA = 125C 400 0.5V 300 TA = 25C V+ = 12V RIN = 100 ROUT = 4.99k VSENSE+ = V+ TA = 25C 200 TA = -40C TA = 0C 100 VIN = 0 RIN = 2M 0 VIN = 0 RIN = 2M 0 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 SUPPLY VOLTAGE (V) 0 TIME (10s/DIV) 6102 G13 Step Response 100mV V+ VSENSE- V+ - 20mV V+ - 100mV 1V 5V TA = 25C V+ = 12V RIN = 100 ROUT = 4.99k VSENSE+ = V+ 0.5V Step Response Rising Edge VSENSE- VSENSE- = 100mV 5.5V 5V CLOAD = 10pF CLOAD = 1000pF 0V VOUT TA = 25C V+ = 12V RIN = 100 ROUT = 4.99k VSENSE+ = V+ 0.5V 0V IOUT = 100A VOUT TIME (500ns/DIV) TIME (10s/DIV) 6102 G14 6102 G17 6102 G15 Step Response Falling Edge Input Referred Noise 0.1Hz to 10Hz PSRR vs Frequency 5 160 VSENSE- = 100mV TA = 25C V+ = 12V RIN = 10 ROUT = 1k VSENSE = 2mV 4 140 3 IOUT = 100A 120 100 80 60 IOUT = 0 40 0.5V 0V 2 NOISE (V) PSRR (dB) TA = 25C V+ = 12V RIN = 100 ROUT = 4.99k VSENSE+ = V+ V+ = 12V RIN = 100 ROUT = 4.99k AV = 49.9 IOUT = 500A 20 0.1 TIME (500ns/DIV) 6102 G18 TA = 25C V+ = 12V RIN = 100 ROUT = 4.99k VSENSE+ = V+ IOUT = 0 VOUT TIME (10s/DIV) VOUT VOUT 6102 G12 Step Response 10mV to 20mV V+ - 10mV 0V 8 16 24 32 40 48 56 64 72 80 88 96 SUPPLY VOLTAGE (V) 6102 G11 5.5V 5V VSENSE- V+ TA = 85C TA = 70C SUPPLY CURRENT (A) TA = 85C 500 SUPPLY CURRENT (A) Step Response 0mV to 10mV 600 1 10 1 0 -1 -2 -3 -4 -5 100 1k 10k 100k FREQUENCY (Hz) 1M 6102 G19 0 1 2 3 4 5 6 TIME (s) 7 8 9 10 6102 G20 6102fd 8 LTC6102 LTC6102-1/LTC6102HV TYPICAL PERFORMANCE CHARACTERISTICS LTC6102-1: Supply Current vs Supply Voltage Noise Spectral Density 200 600 14 SUPPLY CURRENT (A) TA = 125C 400 VEN = 0.8V 16 TA = 85C SUPPLY CURRENT (A) 100 18 VEN = 2V VSENSE = -0.1V 500 300 TA = 25C 200 TA = -40C 100 12 TA = 25C 10 8 6 TA = -40C 4 2 0 1k 10k 100k FREQUENCY (Hz) 1M TA = 125C -100 0 10 40 30 50 20 VOLTAGE SUPPLY (V) 60 -2 70 0 10 30 40 50 20 SUPPLY VOLTAGE (V) LTC6102-1: Supply Current vs Enable Voltage 60 70 6102 G23 6102 G22 LTC6102-1: Enable Pin Current vs Enable Voltage 6 450 TA = 25C V+ = 12V V+ = 60V 400 5 300 ENABLE PIN CURRENT (A) 350 V+ = 12V 250 200 150 TURN OFF (12V) 100 50 1 0 2 3 4 5 6 7 ENABLE VOLTAGE (V) 8 9 4 3 2 1 0 TA = 25C VSENSE = 0V 0 -50 TA = 85C 0 6102 G21 SUPPLY CURRENT (A) -1 10 0 1 7 8 3 4 5 6 ENABLE VOLTAGE (V) 2 6102 G24 LTC6102-1: Turn-On Time 8 6 4.0 3.5 3.0 5 2.5 4 3 EN 2 TA = 25C V+ = 12V VSENSE = 1mV EN 2.0 1.5 OUT 1.0 OUT 1 0.5 0 -1 -200 10 LTC6102-1: Turn-Off Time TA = 25C V+ = 12V VSENSE = 1mV 7 9 6102 G25 VOLTAGE (V) 0 100 VOLTAGE (V) VOLTAGE NOISE DENSITY (nV/Hz) GAIN = 10 LTC6102-1: Supply Current vs Supply Voltage when Disabled 0 0 200 400 TIME (s) 600 800 6102 G26 -0.5 -20 -15 -10 -5 0 5 10 15 20 25 30 TIME (s) 6102 G27 6102fd 9 LTC6102 LTC6102-1/LTC6102HV PIN FUNCTIONS -INS (Pin 1): Amplifier Inverting Input. When tied to -INF, the internal sense amplifier will drive -INS to the same potential as +IN. -INF (Pin 2): Force Input. This pin carries the input current from RIN and must be tied to -INS near RIN. A resistor (RIN) tied from V+ to -INF sets the output current IOUT = VSENSE/RIN. VSENSE is the voltage across the external RSENSE. V- (Pin 3, LTC6102/LTC6102HV Only): Negative Supply. EN (Pin 3, LTC6102-1 Only): Enable Pin, Referenced to the Negative Supply. When the enable pin is pulled high, the LTC6102-1 is active. When the enable pin is pulled low or left floating, the LTC6102-1 is disabled. OUT (Pin 4): Open-Drain Current output. OUT will source a current that is proportional to the sense voltage into an external resistor. IOUT is the same current that enters -INF. V- (Pin 5): Negative Supply. VREG (Pin 6): Internal Regulated Supply. A 0.1F (or larger) capacitor should be tied from VREG to V+. VREG is not designed to drive external circuits. V+ (Pin 7): Positive Supply. Supply current is drawn through this pin. +IN (Pin 8): Amplifier Noninverting Input. Must be tied to the system load end of the sense resistor. The +IN pin has an internal 5k series resistor designed to allow large input voltage transients or accidental disconnection of the sense resistor. This pin can be held up to 20V below the -INS pin indefinitely, or up to 60V below the -INS pin for up to one second (see Absolute Maximum Ratings). Exposed Pad (Pin 9, DFN Only): V-. The Exposed Pad must be soldered to PCB. 6102fd 10 LTC6102 LTC6102-1/LTC6102HV BLOCK DIAGRAM VBATTERY 0.1F + VSENSE RSENSE - ILOAD RIN V+ 10V -INF L O A D -INS 10V 5V 5V VREG - 5k +IN + IOUT OUT 5k VOUT = VSENSE * ROUT RIN ROUT EN* V- V- 6102 BD *LTC6102-1 ONLY VENABLE Figure 1. Block Diagram and Typical Connection 6102fd 11 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION The LTC6102 high side current sense amplifier (Figure 1) provides accurate monitoring of current through a userselected sense resistor. The sense voltage is amplified by a user-selected gain and level shifted from the positive power supply to a ground-referred output. The output signal is analog and may be used as is or processed with an output filter. Theory of Operation An internal sense amplifier loop forces -INS to have the same potential as +IN. Connecting an external resistor, RIN, between -INS and V+ forces a potential across RIN that is the same as the sense voltage across RSENSE. A corresponding current, VSENSE/RIN, will flow through RIN. The high impedance inputs of the sense amplifier will not conduct this input current, so it will flow through the -INF pin and an internal MOSFET to the output pin. The output current can be transformed into a voltage by adding a resistor from OUT to V-. The output voltage is then VO = V- + IOUT * ROUT. Useful Gain Configurations GAIN RIN ROUT VSENSE AT VOUT = 5V 200 49.9 10k 25mV 500 20 10k 10mV 1000 10 10k 5mV 4990 1 4.99k 1mV Selection of External Current Sense Resistor The external sense resistor, RSENSE, has a significant effect on the function of a current sensing system and must be chosen with care. First, the power dissipation in the resistor should be considered. The system load current will cause both heat dissipation and voltage loss in RSENSE. As a result, the sense resistor should be as small as possible while still providing the input dynamic range required by the measurement. Note that input dynamic range is the difference between the maximum input signal and the minimum accurately reproduced signal, and is limited primarily by input DC offset of the internal amplifier of the LTC6102. In addition, RSENSE must be small enough that VSENSE does not exceed the maximum sense voltage specified by the LTC6102 or the sense resistor, even under peak load conditions. As an example, an application may require that the maximum sense voltage be 100mV. If this application is expected to draw 20A at peak load, RSENSE should be no more than 5m. Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or dynamic range required. The minimum signal that can be accurately represented by this sense amp is limited by the input offset. As an example, the LTC6102 has a typical input offset of 3V. If the minimum current is 1mA, a sense resistor of 3m will set VSENSE to 3V. This is the same value as the input offset. A larger sense resistor will reduce the error due to offset by increasing the sense voltage for a given load current. For this example, choosing a 5m RSENSE will maximize the dynamic range and provide a system that has 100mV across the sense resistor at peak load (20A), while input offset causes an error equivalent to only 0.6mA of load current. Peak dissipation is 2W. If a 0.5m sense resistor is employed, then the effective current error is 6mA (0.03% of full-scale), while the peak sense voltage is reduced to 10mV at 20A, dissipating only 200mW. The low offset and corresponding large dynamic range of the LTC6102 make it more flexible than other solutions in this respect. The 3V typical offset gives 100dB of dynamic range for a sense voltage that is limited to 300mV max, and over 116dB of dynamic range if a maximum of 2V is allowed. The previous example assumes that a large output dynamic range is required. For circuits that do not require large dynamic range, the wide input range of the LTC6102 may be used to reduce the size of the sense resistor, reducing power loss and increasing reliability. For example, in a 100A circuit requiring 60dB of dynamic range, the input offset and drift of most current-sense solutions will require that the shunt be chosen so that the sense voltage is at least 100mV at full scale so that the minimum input is greater than 100V. This will cause power dissipation in excess of 10W at full scale! That much power loss can put 6102fd 12 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION a significant load on the power supply and create thermal design headaches. In addition, heating in the sense resistor can reduce its accuracy and reliability. In contrast, the large dynamic range of the LTC6102 allows the use of a much smaller sense resistor. The LTC6102 allows the minimum sense voltage to be reduced to less than 10V. The peak sense voltage would then be 10mV, dissipating only 1W at 100A in a 100 sense resistor! With a specialized sense resistor, the same system would allow peak currents of more than 1000A without exceeding the input range of the LTC6102 or damaging the shunt. Dynamic Range vs Maximum Power Dissipation in RSENSE 110 100 high-current paths, this error can be reduced by orders of magnitude. A sense resistor with integrated Kelvin sense terminals will give the best results. Figure 2 illustrates the recommended method. Note that the LTC6102 has a Kelvin input structure such that current flows into -INF. The -INS and -INF pins should be tied as close as possible to RIN. This reduces the parasitic series resistance so that RIN may be as low as 1, allowing high gain settings to be used with very little gain error. V+ TIE AS CLOSE TO RIN AS POSSIBLE RIN- RSENSE RIN+ +IN RSENSE = 100m RSENSE = 10m DYNAMIC RANGE (dB) - -INF LOAD RSENSE = 1 V- 90 80 -INS + V+ 100dB: MAX VSENSE = 1V 0.1F VREG 70 40dB: MAX VSENSE = 1mV 60 50 VOUT ROUT RSENSE = 10 40 30 OUT LTC6102 RSENSE = 100 RSENSE = 1m 20 0.001 0.01 0.1 RSENSE* 1 10 V+ 100 LOAD MAXIMUM POWER DISSIPATION (W) DYNAMIC RANGE RELATIVE TO 10V, MINIMUM VSENSE MAX ISENSE = 1A MAX ISENSE = 10A MAX ISENSE = 100A RIN- RIN+ 6102 AI01 Sense Resistor Connection Kelvin connection of +IN and -INS to the sense resistor should be used in all but the lowest power applications. Solder connections and PC board interconnections that carry high current can cause significant error in measurement due to their relatively large resistances. One 10mm x 10mm square trace of one-ounce copper is approximately 0.5m. A 1mV error can be caused by as little as 2A flowing through this small interconnect. This will cause a 1% error in a 100mV signal. A 10A load current in the same interconnect will cause a 5% error for the same 100mV signal. An additional error is caused by the change in copper resistance over temperature, which is in excess of 0.4%/C. By isolating the sense traces from the CREG V- OUTPUT LTC6102 ROUT V- *VISHAY VCS1625 SERIES WITH 4 PAD KELVIN CONNECTION 6102 F02 Figure 2. Kelvin Input Connection Preserves Accuracy with Large Load Current and Large Output Current Selection of External Input Resistor, RIN The external input resistor, RIN, controls the transconductance of the current sense circuit, IOUT = VSENSE/RIN. For example, if RIN = 100, then IOUT = VSENSE/100 or IOUT = 1mA for VSENSE = 100mV. RIN should be chosen to provide the required resolution while limiting the output current. At low supply voltage, IOUT may be as much as 1mA. By setting RIN such that 6102fd 13 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION the largest expected sense voltage gives IOUT = 1mA, then the maximum output dynamic range is available. Output dynamic range is limited by both the maximum allowed output current (Note 1) and the maximum allowed output voltage, as well as the minimum practical output signal. If less dynamic range is required, then RIN can be increased accordingly, reducing the output current and power dissipation. If small sense currents must be resolved accurately in a system that has very wide dynamic range, a smaller RIN may be used if the max current is limited in another way, such as with a Schottky diode across RSENSE (Figure 3). This will reduce the high current measurement accuracy by limiting the result, while increasing the low current measurement resolution. This approach can be helpful in cases where occasional large burst currents may be ignored. V+ RSENSE DSENSE 6102 F03 LOAD Figure 3. Shunt Diode Limits Maximum Input Voltage to Allow Better Low Input Resolution Without Overranging Care should be taken when designing the PC board layout for RIN, especially for small RIN values. All trace and interconnect impedances will increase the effective RIN value, causing a gain error. It is important to note that the large temperature drift of copper resistance will cause a change in gain over temperature if proper care is not taken to reduce this effect. To further limit the effect of trace resistance on gain, maximizing the accuracy of these circuits, the LTC6102 has been designed with a Kelvin input. The inverting terminal (-INS) is separate from the feedback path (-INF). During operation, these two pins must be connected together. The design of the LTC6102 is such that current into -INS is input bias current only, which is typically 60pA at 25C. Almost all of the current from RIN flows into -INF, through the LTC6102, and into ROUT via the OUT pin. In order to minimize gain error, -INS should be routed in a separate path from -INF to a point as close to RIN as possible. In addition, the higher potential terminal of RIN should be connected directly to the positive terminal of RSENSE (or any input voltage source). For the highest accuracy, RIN should be a four-terminal resistor if it is less than 10. Selection of External Output Resistor, ROUT The output resistor, ROUT , determines how the output current is converted to voltage. VOUT is simply IOUT * ROUT . In choosing an output resistor, the max output voltage must first be considered. If the circuit that is driven by the output does not have a limited input voltage, then ROUT must be chosen such that the max output voltage does not exceed the LTC6102 max output voltage rating. If the following circuit is a buffer or ADC with limited input range, then ROUT must be chosen so that IOUT(MAX) * ROUT is less than the allowed maximum input range of this circuit. In addition, the output impedance is determined by ROUT. If the circuit to be driven has high enough input impedance, then almost any output impedance will be acceptable. However, if the driven circuit has relatively low input impedance, or draws spikes of current, such as an ADC might do, then a lower ROUT value may be required in order to preserve the accuracy of the output. As an example, if the input impedance of the driven circuit is 100 times ROUT , then the accuracy of VOUT will be reduced by 1% since: VOUT = IOUT * ROUT * RIN(DRIVEN) ROUT + RIN(DRIVEN) = IOUT * ROUT * 100 = 0.99 * IOUT * ROUT 101 Error Sources The current sense system uses an amplifier and resistors to apply gain and level shift the result. The output is then dependent on the characteristics of the amplifier, such as gain and input offset, as well as resistor matching. 6102fd 14 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION Ideally, the circuit output is: VOUT = VSENSE * ROUT ;V = RSENSE * ISENSE RIN SENSE In this case, the only error is due to resistor mismatch, which provides an error in gain only. Output Error, EOUT, Due to the Amplifier DC Offset Voltage, VOS Note that in applications where RSENSE RIN, IB(+) causes a voltage offset in RSENSE that cancels the error due to IB(-) and EOUT(IBIAS) 0. In applications where RSENSE < RIN, the bias current error can be similarly reduced if an external resistor RIN(+) = (RIN - RSENSE) is connected as shown in Figure 5. Under both conditions: EOUT(IBIAS) = ROUT * IOS; IOS = IB(+) - IB(-) EOUT(VOS) = VOS * (ROUT/RIN) The DC offset voltage of the amplifier adds directly to the value of the sense voltage, VSENSE. This error is very small (3V typ) and may be ignored for reasonable values of RIN. See Figure 4. For very high dynamic range, this offset can be calibrated in the system due to its extremely low drift. 100 For instance if IBIAS is 1nA and ROUT is 10k, the output error is -10V. VIN = 10MV Adding RIN+ as described will maximize the dynamic range of the circuit. For less sensitive designs, RIN+ is not necessary. V+ RIN- RSENSE OUTPUT ERROR (%) 10 1 RIN+ +IN -INS + FOR A 500M7 SHUNT VIN = 100mV, ISHUNT = 200A ERROR DUE TO VOS IS 6mA - -INF LOAD V- V+ 0.1 0.1F VREG 0.01 LTC6102 0.001 OUT VOUT ROUT 0.0001 0.00001 0.0001 0.001 0.01 0.1 1 RIN+ = RIN- - RSENSE 6102 F05 INPUT VOLTAGE (V) 6102 F04 Figure 4. LTC6102 Output Error Due to Typical Input Offset vs Input Voltage Output Error, EOUT, Due to the Bias Currents, IB(+) and IB(-) The input bias current of the LTC6102 is vanishingly small. However, for very high resolution, or at high temperatures where IB increases due to leakage, the current may be significant. The bias current IB(+) flows into the positive input of the internal op amp. IB(-) flows into the negative input. EOUT(IBIAS) = ROUT((IB(+) * (RSENSE/RIN) - IB(-)) Since IB(+) IB(-) = IBIAS, if RSENSE << RIN then, EOUT(IBIAS) -ROUT * IBIAS Figure 5. Second Input R Minimizes Error Due to Input Bias Current Clock Feedthrough, Input Bias Current The LTC6102 uses auto-zeroing circuitry to achieve an almost zero DC offset over temperature, sense voltage, and power supply voltage. The frequency of the clock used for auto-zeroing is typically 10kHz. The term clock feedthrough is broadly used to indicate visibility of this clock frequency in the op amp output spectrum. There are typically two types of clock feedthrough in auto zeroed amps like the LTC6102. The first form of clock feedthrough is caused by the settling of the internal sampling capacitor and is input referred; that is, it is multiplied by the internal loop gain 6102fd 15 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION of the amp. This form of clock feedthrough is independent of the magnitude of the input source resistance or the magnitude of the gain setting resistors. The LTC6102 has a residue clock feedthrough of less then 1VRMS input referred at 10kHz. The second form of clock feedthrough is caused by the small amount of charge injection occurring during the sampling and holding of the amp's input offset voltage. The current spikes are multiplied by the impedance seen at the input terminals of the amp, appearing at the output multiplied by the internal loop gain of the internal op amp. To reduce this form of clock feedthrough, use smaller valued gain setting resistors and minimize the source resistance at the input. Input bias current is defined as the DC current into the input pins of the op amp. The same current spikes that cause the second form of clock feedthrough described above, when averaged, dominate the DC input bias current of the op amp below 70C. As temperature increases, the leakage of the ESD protection diodes on the inputs increases the input bias currents of both inputs in the positive direction, while the current caused by the charge injection stays relatively constant. At temperatures above 70C, the leakage current dominates and both the negative and positive pins' input bias currents are in the positive direction (into the pins). At maximum supply and maximum output current, the total power dissipation can exceed 100mW. This will cause significant heating of the LTC6102 die. In order to prevent damage to the LTC6102, the maximum expected dissipation in each application should be calculated. This number can be multiplied by the JA value listed in the package section on page 2 to find the maximum expected die temperature. This must not be allowed to exceed 150C or performance may be degraded. As an example, if an LTC6102 in the MSOP package is to be biased at 55V 5V supply with 1mA output current at 80C: PQ(MAX) = IDD(MAX) * V+(MAX) = 39mW POUT(MAX) = IOUT * V+(MAX) = 60mW TRISE = JA * PTOTAL(MAX) TMAX = TAMBIENT + TRISE TMAX must be < 125C PTOTAL(MAX) 99mW and the max die temp will be 100C Output Current Limitations Due to Power Dissipation If this same circuit must run at 125C, the max die temp will increase to 145C. (Note that supply current, and therefore PQ, is proportional to temperature. Refer to Typical Performance Characteristics section.) Note that the DD package has a smaller JA than the MSOP package, which will substantially reduce the die temperature at similar power levels. The LTC6102 can deliver more than 1mA continuous current to the output pin. This current flows through RIN and enters the current sense amp via the -INF pin. The power dissipated in the LTC6102 due to the output current is: The LTC6102HV can be used at voltages up to 105V. This additional voltage requires that more power be dissipated for a given level of current. This will further limit the allowed output current at high ambient temperatures. POUT = (V-INF - VOUT) * IOUT Since V-INF V+, POUT (V+ - VOUT) * IOUT There is also power dissipated due to the quiescent supply current: PQ = IS * V+ It is important to note that the LTC6102 has been designed to provide at least 1mA to the output when required, and can deliver more depending on the conditions. Care must be taken to limit the maximum output current by proper choice of sense and input resistors and, if input fault conditions are likely, an external clamp. The total power dissipated is the output current dissipation plus the quiescent dissipation: PTOTAL = POUT + PQ 6102fd 16 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION Output Filtering VBAT The output voltage, VOUT, is simply IOUT * ZOUT. This makes filtering straightforward. Any circuit may be used which generates the required ZOUT to get the desired filter response. For example, a capacitor in parallel with ROUT will give a low pass response. This will reduce unwanted noise from the output, and may also be useful as a charge reservoir to keep the output steady while driving a switching circuit such as a mux or ADC. This output capacitor in parallel with an output resistor will create a pole in the output response at: f -3dB = RIN RSENSE +IN -INS + - (V V- 0.1F VREG OUT LTC6102 VOUT ROUT 6102 F06 2 * * ROUT * COUT Figure 6. V+ Powered Separately from Load Supply (VBAT) Useful Equations VBAT Input Voltage: VSENSE =ISENSE * RSENSE Current Gain: V+ V+ 1 Voltage Gain: -INF LOAD + - 2V) TO V+ VOUT ROUT = VSENSE RIN IOUT ISENSE Transconductance: Transimpedance: = ISENSE -INS + LOAD V- - -INF V+ VREG IOUT 1 = VSENSE RIN = RSENSE * RIN +IN RSENSE RIN VOUT RSENSE LTC6102 ROUT RIN OUT 0.1MF VOUT ROUT 6102 F07 Input Sense Range The inputs of the LTC6102 can function from V+ to (V+ - 2V). Not only does this allow a wide VSENSE range, it also allows the input reference to be separate from the positive supply (Figure 6). Note that the difference between VBAT and V+ must be no more than the input sense voltage range listed in the Electrical Characteristics table. Monitoring Voltages Above V+ and Level Translation The LTC6102 may be configured to monitor voltages that are higher than its supply, provided that the negative terminal of the input voltage is within the input sense range of the LTC6102. Figure 7 illustrates a circuit in which the LTC6102 has its supply pin tied to the lower potential terminal of the sense resistor instead of the higher potential terminal. The Figure 7. LTC6102 Supply Current Monitored with Load operation of the LTC6102 is such that the -INS and -INF pins will servo to within a few microvolts of +IN, which is shorted to V+. Since the input sense range of the LTC6102 includes V+, the circuit will operate properly. The voltage across RSENSE will be held across RIN by the LTC6102, causing current VSENSE/RIN to flow to ROUT. In this case, the supply current of the LTC6102 is also monitored, as it flows through RSENSE. Because the voltage across RSENSE is not restricted to the sense range of the LTC6102 in this circuit, VSENSE can be large compared to the allowed sense voltage. This facilitates the sensing of very large voltages, provided that RIN is chosen so that VSENSE/RIN does not exceed 6102fd 17 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION the allowed output current. The gain is still controlled by ROUT/RIN, so either gain or attenuation may be applied to the input signal as it is translated to the output. Finally, the input may be a voltage source rather than a sense resistor, as shown in Figure 8. This circuit allows the translation of a wide variety of input signals across the entire supply range of the LTC6102 with only a tiny offset error while retaining simple gain control set by ROUT/RIN. Again, very large voltages may be sensed as long as RIN is chosen so that IOUT does not exceed the allowed output current. For example, VIN may be as large as 1V with RIN = 1k, or as large as 10V with RIN = 10k. For a 10V maximum input and a 5V maximum output, RIN = 10k and ROUT = 5k will allow the LTC6102HV to translate VIN to VOUT with a common mode voltage of up to 100V. For the case where a large input resistor is used, a similar resistor in series with +IN will reduce error due to input bias current. V+ LTC6102 by effectively reducing the supply voltage to the part by VD. In addition, if the output of the LTC6102 is wired to a device that will effectively short it to high voltage (such as through an ESD protection clamp) during a reverse supply condition, the LTC6102's output should be connected through a resistor or Schottky diode (Figure 10). Response Time The LTC6102 is designed to exhibit fast response to inputs for the purpose of circuit protection or signal transmission. This response time will be affected by the external circuit in two ways, delay and speed. RSENSE +IN VBATT V- RIN -INS + VCM V- - 0.1F OUT LTC6102 R2 4.99k D1 V+ VREG V+ VREG -INF R1 100 -INF + - L O A D VIN +IN -INS 0.1F 6102 F09 Figure 9. Schottky Prevents Damage During Supply Reversal LTC6102 OUT VOUT ROUT VBATT RSENSE 6102 F08 VOUT = VIN * ROUT RIN Figure 8. Voltage Level-Shift Circuit +IN L O A D -INS + - V- -INF V+ VREG Reverse Supply Current Some applications may be tested with reverse-polarity supplies due to an expectation of this type of fault during operation. The LTC6102 is not protected internally from external reversal of supply polarity. To prevent damage that may occur during this condition, a Schottky diode should be added in series with V- (Figure 9). This will limit the reverse current through the LTC6102. Note that this diode will limit the low voltage performance of the LTC6102 D1 R1 100 OUT 0.1F R3 1k ADC R2 4.99k 6102 F10 Figure 10. Additional Resistor R3 Protects Output During Supply Reversal 6102fd 18 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION If the output current is very low and an input transient occurs, there may be a delay before the output voltage begins changing. This can be reduced by increasing the minimum output current, either by increasing RSENSE or decreasing RIN. The effect of increased output current is illustrated in the step response curves in the Typical Performance Characteristics section of this datasheet. Note that the curves are labeled with respect to the initial output currents. The speed is also affected by the external circuit. In this case, if the input changes very quickly, the internal amplifier will slew the gate of the internal output FET (Figure 1) in order to close the internal loop. This results in current flowing through RIN and the internal FET. This current slew rate will be determined by the amplifier and FET characteristics as well as the input resistor, RIN. Using a smaller RIN will allow the output current to increase more quickly, decreasing the response time at the output. This will also have the effect of increasing the maximum output current. Using a larger ROUT will also decrease the response time, since VOUT = IOUT * ROUT. Reducing RIN and increasing ROUT will both have the effect of increasing the voltage gain of the circuit. Bandwidth For applications that require higher bandwidth from the LTC6102, care must be taken in choosing RIN. For a general-purpose op-amp, the gain-bandwidth product is used to determine the speed at a given gain. Gain is determined by external resistors, and the gain-bandwidth product is an intrinsic property of the amplifier. The same is true for the LTC6102, except that the feedback resistance is determined by an internal FET characteristic. The feedback impedance is approximately 1/gm of the internal MOSFET. The impedance is reduced as current into -INF is increased. At 1mA, the impedance of the MOSFET is on the order of 10k. RIN sets the closed-loop gain of the internal loop as 1/(RIN * gm). The bandwidth is then limited to GBW * (RIN * gm), with a maximum bandwidth of around 2MHz. This is illustrated in the characteristic curves, where gain vs frequency for two input conditions is shown. The exact impedance of the MOSFET is difficult to determine, as it is a function of input current, process, and capacitance, and has a very different characteristic for low currents vs high currents. However, it is clear that smaller values of RIN and smaller values of IOUT will generally result in lower closed-loop bandwidth. VSENSE and RIN should be chosen to maximize both IOUT and closed-loop gain for highest speed. Theoretically, maximum bandwidth would be achieved for the case where VIN = 10VDC and RIN = 10k, giving IOUT = 1mA and a closed-loop gain near 1. However, this may not be possible in a practical application. Note that the MOSFET gm is determined by the average or DC value of IOUT, not the peak value. Adding DC current to a small AC input will help increase the bandwidth. VREG Bypassing The LTC6102 has an internally regulated supply near V+ for internal bias. It is not intended for use as a supply or bias pin for external circuitry. A 0.1F capacitor should be connected between the VREG and V+ pins. This capacitor should be located very near to the LTC6102 for the best performance. In applications which have large supply transients, a 6.8V zener diode may be used in parallel with this bypass capacitor for additional transient suppression. Enable Pin Operation The LTC6102-1 includes an enable pin which can place the part into a low power disable state. The enable pin is a logic input pin referenced to V- and accepts standard TTL logic levels regardless of the V+ voltage. When the enable pin is driven high, the part is active. When the enable pin is floating or pulled low, then the part is disabled and draws very little supply current. When driven high, the enable pin draws a few microamps of input bias current. If there is no external logic supply available, the enable pin can be pulled to the V+ supply through a large value resistor. The voltage at the enable pin will be clamped by the built-in ESD protection structure (which acts like a zener diode). The resistor should be sized so that the current through the resistor is a few milliamps or less to prevent any reduction in long-term reliability. For practical purposes, the current through the resistor should be minimized to save power. The resistor value is limited by the input bias current requirements of the enable 6102fd 19 LTC6102 LTC6102-1/LTC6102HV APPLICATIONS INFORMATION input resistor RIN) to flow into the output resistor and/or the output limiting ESD structure in the LTC6102. This is a temporary condition which will cease when the LTC6102 amplifier settles into normal closed-loop operation. V+ RIN- RSENSE RIN+ +IN -INS + - -INF LOAD RBIAS 2.7M V- V+ EN VREG LTC6102-1 0.1F OUT VOUT ROUT RIN+ = RIN- - RSENSE 6102 F11 Figure 11 pin. Figure 11 shows the LTC6102-1 with a 2.7M pull-up resistor to limit the current to less than 20A with a 60V supply, which is enough to satisfy the input bias current requirement. When the LTC6102-1 is disabled, the internal amplifier is also shut down, which means that the discharge rate of the 0.1F capacitor is very low. This is significant when the LTC6102-1 is disabled to save power, because the recharging of the 0.1F capacitor is a significant portion of the overall power consumed in startup. Figure 12 shows the discharge rate of the 0.1F capacitor after the LTC6102-1 is shut down at room temperature. In a system where the LTC6102-1 is disabled for short periods, the start-up power (and therefore the average power) can be reduced since the VREG bypass capacitor is never significantly discharged. The time required to charge the VREG capacitor will also be reduced, allowing the LTC6102-1 to start-up more quickly. 2.25 Start-Up Current 2.00 ENABLE VOLTAGE (V) 1.75 8.3 8.2 8.1 1.50 8.0 VREG 1.25 7.9 1.00 7.8 EN 0.75 7.7 0.50 7.6 0.25 7.5 0 VREG VOLTAGE (V) The start-up current of the LTC6102 when the part is powered on or enabled (LTC6102-1) consists of three parts: the first is the current necessary to charge the VREG bypass capacitor, which is nominally 0.1F. Since the VREG voltage charges to approximately 4.5V below the V+ voltage, this can require a significant amount of start-up current. The second source is the active supply current of the LTC6102 amplifier, which is not significantly greater during start-up than during normal operation. The third source is the output current of the LTC6102, which upon start-up may temporarily drive the output high. This could cause milliamps of output current (limited mostly by the TA = 25C V+ = 12V 7.4 -2 0 2 4 6 8 10 TIME (ms) 12 14 16 6102 F12 Figure 12. LTC6102-1 VREG Voltage During Bypass Capacitor Discharge when Disabled 6102fd 20 LTC6102 LTC6102-1/LTC6102HV TYPICAL APPLICATIONS Bidirectional Current Sense Circuit with Separate Charge/Discharge Output ICHARGE IDISCHARGE RSENSE CHARGER RIN C 100 RIN D 100 +IN VBATT V- RIN D 100 RIN C 100 -INS -INF + - -INS -INF V+ - + V+ VREG 0.1F 0.1F OUT LTC6102 +IN VREG OUT + ROUT C 4.99k + VOUT C VOUT D - - V- L O A D LTC6102 ROUT D 4.99k 6102 TA02 DISCHARGING: VOUT D = IDISCHARGE * RSENSE CHARGING: VOUT C = ICHARGE * RSENSE ( ( ) ROUT D WHEN IDISCHARGE 0 RIN D ) ROUT C WHEN ICHARGE 0 RIN C LTC6102 Monitors Its Own Supply Current RSENSE R1 100 +IN VBATT L O A D ILOAD ISUPPLY -INS + - V- -INF V+ VREG LTC6102 0.1F OUT + R2 4.99k VOUT = 49.9 * RSENSE (ILOAD + ISUPPLY) VOUT - 6102 TA03 6102fd 21 LTC6102 LTC6102-1/LTC6102HV TYPICAL APPLICATIONS 16-Bit Resolution Unidirectional Output into LTC2433 ADC + 4V TO 60V VSENSE +IN - L O A D ILOAD RIN 100 -INS -INF + - V- V+ VREG 0.1F 1F 5V 2 1 EN POWER ENABLE OUT VOUT LTC6102-1 4 IN+ REF+ VCC LTC2433-1 ROUT 4.99k 5 8 SDD IN- TO P 7 CC REF- GND 3 ROUT VOUT = * VSENSE = 49.9VSENSE RIN 9 SCK FO 6 10 ADC FULL-SCALE = 2.5V 6102 TA05 Intelligent High-Side Switch with Current Monitor 10F 63V VLOGIC 14V 47k FAULT OFF ON 3 4 0.1F 100 1% 8 OUT LTC6102 6 2 VREG -INS -INF RS LT1910 V+ 100 1F 1 VO +IN 4.99k V- 5 SUB85N06-5 L O A D VO = 49.9 * RS * IL IL FOR RS = 5m, VO = 2.5V AT IL = 10A (FULL SCALE) 6102 TA06 6102fd 22 LTC6102 LTC6102-1/LTC6102HV TYPICAL APPLICATIONS Input Overvoltage Protection V+ RIN- DZ 1k 3W RSENSE 1k +IN -INS + - -INF LOAD V- V+ 0.1F VREG OUT LTC6102 ROUT DZ: CENTRAL SEMICONDUCTOR CMZ5931B 18V 1.5W ZENER DIODE 6102 TA07 Simple 500V Current Monitor DANGER! Lethal Potentials Present -- Use Caution 500V + VSENSE RSENSE - ISENSE L O A D +IN V- -INS RIN 100 -INF + - DANGER!! HIGH VOLTAGE!! V+ VREG 0.1F OUT LTC6102 51V BZX884-C51 M1 BAT46 VOUT M1 AND M2 ARE FQD3P50 TM ROUT VOUT = * VSENSE = 49.9 VSENSE RIN M2 ROUT 4.99k 2M 6102 TA08 6102fd 23 LTC6102 LTC6102-1/LTC6102HV PACKAGE DESCRIPTION DD Package 8-Lead Plastic DFN (3mm x 3mm) (Reference LTC DWG # 05-08-1698 Rev C) R = 0.125 TYP 5 0.40 0.10 8 0.70 0.05 3.5 0.05 1.65 0.05 2.10 0.05 (2 SIDES) 3.00 0.10 (4 SIDES) PACKAGE OUTLINE 1.65 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 0509 REV C 0.75 0.05 0.200 REF 0.25 0.05 4 0.25 0.05 0.50 BSC 2.38 0.05 1 0.50 BSC 2.38 0.10 BOTTOM VIEW--EXPOSED PAD 0.00 - 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 3.00 p 0.102 (.118 p .004) (NOTE 3) 0.889 p 0.127 (.035 p .005) 0.254 (.010) 8 7 6 5 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) DETAIL "A" 0.52 (.0205) REF 0o - 6o TYP GAUGE PLANE 5.23 (.206) MIN 1 0.53 p 0.152 (.021 p .006) 3.20 - 3.45 (.126 - .136) DETAIL "A" 0.42 p 0.038 (.0165 p .0015) TYP 0.65 (.0256) BSC 1.10 (.043) MAX 2 3 4 0.86 (.034) REF 0.18 (.007) RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 0.65 (.0256) BSC 0.1016 p 0.0508 (.004 p .002) MSOP (MS8) 0307 REV F 6102fd 24 LTC6102 LTC6102-1/LTC6102HV REVISION HISTORY REV DATE DESCRIPTION D 8/10 Updated graph 21 (Revision history begins at Rev D) PAGE NUMBER 8 6102fd Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 25 LTC6102 LTC6102-1/LTC6102HV TYPICAL APPLICATION Remote Current Sense with Simple Noise Filter V+ RSENSE TIE AS CLOSE TO RIN AS POSSIBLE RIN- +IN -INS - + fC = 1 2 * P * ROUT * COUT -INF LOAD V- V+ VREG OUT LTC6102 6102 TA09 0.1F LONG WIRE ADC ROUT COUT REMOTE ADC RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT 1636 Rail-to-Rail Input/Output, Micropower Op Amp VCM Extends 44V above VEE, 55A Supply Current, Shutdown Function LT1637/LT1638/ LT1639 Single/Dual/Quad, Rail-to-Rail, Micropower Op Amp VCM Extends 44V above VEE, 0.4V/s Slew Rate, >1MHz Bandwidth, <250A Supply Current per Amplifier LT1787/LT1787HV Precision, Bidirectional, High Side Current Sense Amplifier 2.7V to 60V Operation, 75V Offset, 60A Current Draw LTC1921 Dual -48V Supply and Fuse Monitor 200V Transient Protection, Drives Three Optoisolators for Status LT1990 High Voltage, Gain Selectable Difference Amplifier 250V Common Mode, Micropower, Pin Selectable Gain = 1, 10 LT1991 Precision, Gain Selectable Difference Amplifier 2.7V to 18V, Micropower, Pin Selectable Gain = -13 to 14 (R) LTC2050/LTC2051/ Single/Dual/Quad Zero-Drift Op Amp LTC2052 3V Offset, 30nV/C Drift, Input Extends Down to V- LTC4150 Coulomb Counter/Battery Gas Gauge Indicates Charge Quantity and Polarity LT6100 Gain-Selectable High Side Current Sense Amplifier 4.1V to 48V Operation, Pin-Selectable Gain: 10, 12.5, 20, 25, 40, 50V/V LTC6101/ LTC6101HV High Voltage High Side Current Sense Amplifier in SOT-23 4V to 60V/5V to 100V Operation, External Resistor Set Gain LTC6103 Dual High Side Precision Current Sense Amplifier 4V to 60V, Gain Configurable, 8-Pin MSOP LTC6104 Bidirectional High Side Precision Current Sense Amplifier 4V to 60V, Gain Configurable, 8-Pin MSOP LT6105 Precision Rail-to-Rail Input Current Sense Amplifier Input VCM Extends 44V Above and 0.3V Below V-, 2.85V to 36V Operation LT6106 Low Cost, High Side Precision Current Sense Amplifier 2.7V to 36V, Gain Configurable, SOT23 LT6107 High Temperature High Side Current Sense Amplifier 2.7V to 36V, Fully Tested at -55C and 150C in SOT-23 6102fd 26 Linear Technology Corporation LT 0810 REV D * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2007