M74HC4040 12 STAGE BINARY COUNTER HIGH SPEED : fMAX = 70 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4040 DESCRIPTION The M74HC4040 is an high speed CMOS 12 STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. A clear input is used to reset the counter to the all low level state. A high level on CLEAR accomplishes the reset function. A negative DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC4040B1R M74HC4040M1R T&R M74HC4040RM13TR M74HC4040TTR transition on the CLOCK input increments the counter by one. For M74HC4040 each division stage has an output; the final frequency is 1/4096 fIN. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HC4040 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 9, 7, 6, 5, 3, 2, 4, 13, 12, 14, 15, 1 Q1 to Q12 10 CLOCK 11 8 16 CLEAR GND Vcc NAME AND FUNCTION Parallel Outputs Clock Input (LOW to HIGH, Edge Triggered) Reset Inputs Ground (0V) Positive Supply Voltage TRUTH TABLE CLOCK CLEAR OUTPUT STATE X H ALL OUTPUTS = "L" L NO CHANGE L ADVANCE TO NEXT STATE LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 M74HC4040 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Supply Voltage Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current 20 mA IOK DC Output Diode Current 20 mA IO DC Output Current 25 mA 50 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 500(*) mW -65 to +150 C 300 C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 C; derate to 300mW by 10mW/C from 65C to 85C RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Supply Voltage Unit 2 to 6 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 C Input Rise and Fall Time tr, tf VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns 3/11 M74HC4040 DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II ICC 4/11 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85C -55 to 125C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 V 0.5 1.35 1.8 2.0 IO=-20 A 1.9 2.0 1.9 1.9 4.5 IO=-20 A 4.4 4.5 4.4 4.4 6.0 IO=-20 A 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 5.68 Unit V V 6.0 IO=-5.2 mA 2.0 IO=20 A 0.0 0.1 0.1 0.1 4.5 IO=20 A 0.0 0.1 0.1 0.1 6.0 IO=20 A 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND 0.1 1 1 A 6.0 VI = VCC or GND 4 40 80 A 5.8 5.63 5.60 V M74HC4040 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (Qn - Qn+1) tPLH tPHL Propagation Delay Time (CLOCK Q1) tPHL Propagation Delay Time (CLEAR - Qn) fMAX Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CLOCK) tW(H) Minimum Pulse Width (CLEAR) tREM Minimum Removal Time Value TA = 25C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 6.0 30 35 Typ. Max. 30 8 7 20 5 4 48 17 13 56 18 15 15 65 70 40 8 7 70 19 16 75 15 13 50 10 9 145 29 25 140 28 24 -40 to 85C -55 to 125C Min. Min. Max. 95 19 16 65 13 11 180 36 31 175 35 30 4.8 24 28 75 15 13 175 35 30 25 5 5 Max. 110 22 19 75 15 13 220 44 38 210 42 36 4 20 24 95 19 16 220 44 37 30 6 5 Unit ns ns ns ns MHz 110 22 19 265 53 45 40 8 7 ns ns ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25C Typ. Max. CIN Input Capacitance 5.0 Min. 5 10 CPD Power Dissipation Capacitance (note 1) 5.0 34 -40 to 85C -55 to 125C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + I CC/2 (per FLIP/ FLOP) 5/11 M74HC4040 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50) WAVEFORM 1: MINIMUM PULSE WIDTH (CLEAR) AND REMOVAL TIME (CLEAR TO CLOCK) (f=1MHz; 50% duty cycle) 6/11 M74HC4040 WAVEFORM 2 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) WAVEFORM 3 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CLOCK)(f=1MHz; 50% duty cycle) 7/11 M74HC4040 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 8/11 M74HC4040 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 (max.) PO13H 9/11 M74HC4040 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0 L 0.45 A 0.60 0.0256 BSC 8 0 0.75 0.018 8 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 10/11 M74HC4040 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com 11/11