Advance Information PE4309 50 RF Digital Attenuator 6-bit, 31.5 dB, DC-4.0 GHz Product Description Features * Best in class 2.0 kV HBM ESD tolerance This product is a high linearity, 6-bit RF Digital Step Attenuator (DSA) covering a 31.5 dB attenuation range in 0.5 dB steps. The Peregrine 50 RF DSA provides a parallel CMOS control interface and it operates on 3-volt to 5-volt supply. It maintains high attenuation accuracy over frequency and temperature and exhibits very low insertion loss and low power consumption. This Peregrine DSA is available in a 4x4 mm 24 lead QFN footprint with an exposed ground paddle. * Low Insertion Loss: 1.6 dB typical * Attenuation: 0.5 dB steps to 31.5 dB * High Linearity: Typical 52 dB IP3 * Best in Class Attenuation accuracy * Parallel programming interface The PE4309 is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. * Single supply, 3V to 5V operation * Standard 3V or 5V CMOS control logic independent of supply voltage * Very low power consumption * RoHS-compliant 24-lead 4x4 mm QFN Figure 1. Functional Schematic Diagram Figure 2. Package Type 4x4 mm 24-Lead QFN Switched Attenuator Array RF Input Parallel Control RF Output 6 Control Logic Interface Table 1. Electrical Specifications @ +25C, VDD = 3.0 V - 5.0 V Parameter Test Conditions Frequency Operation Frequency Any Bit or Bit Combination Two-tone inputs +18 dBm Switching Speed Units 4000 MHz dB dB - 1.6 2.2 DC 1.0 GHz 1.0 < 2.8 GHz 2.8 - 3.8 GHz - - (0.10 + 3% of atten setting) (0.15 + 4% of atten setting) (0.20 + 5% of atten setting) dB dB dB 32 30 - dBm dBm 1 MHz - 2.2 GHz - DC - 2.2 GHz 2.2 - 4.0 GHz Return Loss Maximum DC - 2.2 GHz 2.2 - 4.0 GHz 1 MHz - 2.2 GHz 2.2 - 4.0 GHz 1 dB Compression2 Input IP31 Typical DC Insertion Loss Attenuation Accuracy Minimum 50% of control voltage to 90% of final attenuation level - 52 dBm 20 15 - dB dB - 1 s Notes: 1. Device Linearity will begin to degrade below 1 Mhz 2. Note Absolute Maximum in Table 4. Document No. 70-0218-01 www.psemi.com (c)2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 6 PE4309 Advance Information C16 VDD Power Supply Voltage 3 16 N/C RF1 4 15 RF2 N/C 5 14 N/C ACG 6 13 ACG GND ACG ACG ACG ACG Symbol Pin Name N/C3 No Connect 2 VDD Power supply pin 3 N/C3 No Connect 4 RF1 RF port 5 N/C3 Description No Connect 6 ACG 4 AC Ground connection 7 ACG4 AC Ground connection 8 ACG4 AC Ground connection 9 ACG4 AC Ground connection 4 AC Ground connection Max Units 2.7 3.0 5.5 V 100 150 A Parameter/Conditions Min Max Units Power supply voltage -0.3 6.0 V VI Voltage on any DC input -0.3 6.0 V TST Storage temperature range -65 150 C TOP Operating temperature range -40 85 C PIN Input power (50) 34 dBm VDD Table 2. Pin Descriptions 1 Typ Table 4. Absolute Maximum Ratings Exposed Ground Paddle Pin No. Min IDD Power Supply Current 12 N/C 11 N/C 10 N/C 17 9 18 8 1 2 7 N/C VDD ACG Table 3. Operating Ranges Parameter 19 C8 C4 21 20 C2 22 C1 23 24 C 0.5 Figure 3. Pin Configuration (Top View) ESD voltage (Human Body Model) VESD 2000 Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESDsensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rate specified in Table 4. 10 ACG 11 ACG4 AC Ground connection Latch-Up Avoidance 12 GND Ground connection. 13 ACG4 AC Ground connection Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. 14 N/C3 No Connect 15 RF2 RF port 16 N/C3 No Connect 17 N/C3 No Connect 18 N/C3 No Connect 19 C16 Attenuation control bit, 16 dB 20 C8 Attenuation control bit, 8 dB 21 C4 Attenuation control bit, 4 dB 22 C2 Attenuation control bit, 2 dB 23 C1 Attenuation control bit, 1 dB 24 C0.5 Paddle GND Table 5. Control Voltage State Bias Condition Low 0 to +1.0 Vdc at 2 A (typ) High +2.0 to +5 Vdc at 10 A (typ) Table 6. Truth Table C16 C8 C4 C2 C1 Attenuation control bit, 0.5 dB 1 1 1 1 1 1 Reference Loss (IL) Ground for proper operation 1 1 1 1 1 0 0.5 dB 1 1 1 1 0 1 1 dB 1 1 1 0 1 1 2 dB 1 1 0 1 1 1 4 dB 1 0 1 1 1 1 8 dB 0 1 1 1 1 1 16 dB 0 0 0 0 0 0 31.5 dB Notes: 3. For improved RF performance No Connect pins can be connected to RF ground. 4. Pins can either be grounded directly or through coupling capacitors Exposed Solder Pad Connection The exposed solder pad on the bottom of the package must be grounded for proper device operation. (c)2006 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 6 V C0.5 Attenuation State Document No. 70-0218-01 UltraCMOSTM RFIC Solutions PE4309 Advance Information Evaluation Kit The Digital Attenuator Evaluation Kit board was designed to ease customer evaluation of the PE4309 Digital Step Attenuator. Connect J2 by mini clip to Vdd to power the IC. Connect J8 by mini clip to power the evaluation board support circuits. The control bits for the six parallel data inputs (C0.5 to C16) are controlled using S2-S7 to select bits or bit combinations. This allows any attenuation setting to be specified as shown in Table 6. Figure 4. Evaluation Board Layout Peregrine Specification 101/0299 The de-embed trace (J6 to J7) estimates the PCB insertion loss for removal from the evaluation board measurement data. To evaluate using customer software, J1 can be installed using a standard 0.100 IDC header (some circuit modification required, see schematic). The ability to supply different voltages for the Control circuitry (using J8) and IC Vdd (using J2) circuits allows for evaluation of circuits using different control vs. supply voltages. Figure 5. Evaluation Board Schematic Peregrine Specification 102/0366 Document No. 70-0218-01 www.psemi.com (c)2006 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 6 PE4309 Advance Information Figure 6. Package Drawing QFN 4x4 mm A MAX 0.900 NOM 0.850 MIN 0.800 (c)2006 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 6 Document No. 70-0218-01 UltraCMOSTM RFIC Solutions PE4309 Advance Information Figure 7. Tape and Reel Drawing Figure 8. Marking Specifications 4309 YYWW ZZZZZ YYWW = Date Code ZZZZZ = Last five digits of Lot Number Table 7. Ordering Information Order Code Part Marking Description Package Shipping Method 4309-00 PE4309-EK PE4309-24QFN 4x4mm-EK Evaluation Kit 1 / Box 4309-51 4309 PE4309G-24QFN 4x4mm-75A Green 24-lead 4x4mm QFN 75 units / Tube 4309-52 4309 PE4309G-24QFN 4x4mm-3000C Green 24-lead 4x4mm QFN 3000 units / T&R Document No. 70-0218-01 www.psemi.com (c)2006 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 6 PE4309 Advance Information Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9450 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Space and Defense Products Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). (c)2006 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 6 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0218-01 UltraCMOSTM RFIC Solutions