April 2002
2000 Fairc hild Semiconduct or Cor por ation FDS4559 Rev C1(W)
FDS4559
60V Complementary Pow e rTrench
MOSFET
General Description
This complementary MOSFET device is produced using
Fairchild’s advanced PowerTrench process that has
been especially tailored to minimize the on-state
resistance and yet maintain low gate charge for
superior switching perform ance.
Applications
• DC/DC convert er
• Power managem ent
• LCD backlight inverter
Features
• Q1: N-Channel
4.5 A, 60 V RDS(on) = 55 mΩ @ VGS = 10V
RDS(on) = 75 mΩ @ VGS = 4. 5V
• Q2: P-Channel
–3.5 A, –60 V RDS(on) = 105 mΩ @ VGS = –10V
R
DS(on) = 135 mΩ @ V GS = –4.5V
S
D
S
S
SO-8
D
D
D
G
D1 D1 D2 D2
S1G1S2G2
Pin 1
SO-8
4
3
2
1
5
6
7
8
Q1
Q2
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter Q1 Q2 Units
VDSS Drain-Source Voltage 60 –60 V
VGSS Gate-Source Voltage ±20 ±20 V
ID Drain Current - Continuous (Note 1a) 4.5 –3.5 A
- Pulsed 20 –20
PD Power Dissipation for Dual Operati on 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1.2
(Note 1c) 1
TJ, TSTG Operating and St orage Junction Temperature Range -55 to +175 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistanc e, Juncti on-to-Case (Note 1) 40 °C/W
Package Marking and Ordering Information
Device Marki ng Device Reel Siz e Tape width Quantity
FDS4559 FDS4559 13” 12mm 2500 units
FDS4559
http://store.iiic.cc/
FDS4559 Rev C1(W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Avalanche Ratings (Note 1)
WDSS Single Pulse Drain-Source
Avalanche E nergy VDD = 30 V, ID = 4.5 A Q1 90 mJ
IAR Maximum Drain-Source
Avalanche Current Q1 4.5 A
Off Characteristics
BVDSS Drain-Sourc e Breakdown
Voltage VGS = 0 V , I D = 250 µ A
VGS = 0 V, ID = –250 µA Q1
Q2 60
–60 V
∆BVDSS
∆TJ Breakdown Voltage
Temperat ure Coef ficient ID = 250 µA, Ref erenced to 25°C
ID = –250 µA, Ref erenced to 25°C Q1
Q2
58
–49 mV/°C
IDSS Zero Gate Volt age Drai n
Current VDS = 48 V, VGS = 0 V
VDS = –48 V, VGS = 0 V Q1
Q2
1
–1 µA
IGSS Gate-Body Leakage VGS = +20 V, VDS = 0 V
VGS = +20 V, VDS = 0 V Q1
Q2 +
100
+100 nA
On Characteristics (Note 2)
VGS(th) Gate Thres hol d V ol tage VDS = VGS, ID = 250 µA
VDS = VGS, ID = –250 µA Q1
Q2 1
–1 2.2
–1.6 3
–3 V
∆VGS(th)
∆TJ Gate Threshold Vol tage
Temperature Coefficient ID = 250 µA, Referenced to 25°C
ID = –250 µA, Ref erenced to 25°C Q1
Q2 –5.5
4 mV/°C
Q1 42
72
55
55
94
75
RDS(on) St atic Drain-Source
On-Resistance VGS = 10 V, I D = 4.5 A
VGS = 10 V, ID = 4.5 A , T J = 125°C
VGS = 4.5 V, ID = 4 A
VGS = –10 V, ID = –3.5 A
VGS = –10 V, ID = –3.5 A , T J = 125°C
VGS = –4.5 V, ID = –3. 1 A
Q2 82
130
105
105
190
135
mΩ
ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V
VGS = –10 V, VDS = –5 V Q1
Q2 20
–20 A
gFS Forward Transconductance VDS = 10 V, I D = 4. 5 A
VDS = –5 V, ID = –3 5 A Q1
Q2 14
9 S
Dynamic Characteristics
Ciss Input Capacitance Q1
Q2 650
759 pF
Coss Output Capacitance Q1
Q2 80
90 pF
Crss Reverse Transfer
Capacitance
Q1
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Q2
VDS = –30 V, VGS = 0 V,
f = 1.0 MHz Q1
Q2 35
39 pF
Switching Characteristics (Note 2)
td(on) Turn-On Delay Time
Q1
Q2 11
7 20
14 ns
tr Turn-On Rise Time
Q1
Q2 8
10 18
20 ns
td(off) Turn-Off Delay Time
Q1
Q2 19
19 35
34 ns
tf Turn-Off Fall Time
Q1
VDD = 30 V, ID = 1 A,
VGS = 10V, RGEN = 6 Ω
Q2
VDD = –30 V, ID = –1 A,
VGS = –10 V, RGEN = 6 Ω Q1
Q2 6
12 15
22 ns
Qg Total Gate Charge
Q1
Q2 12.5
15 18
21 nC
Qgs Gate-Source Charge
Q1
Q2 2.4
2.5 nC
Qgd Gate-Drain Charge
Q1
VDS = 30 V, ID = 4. 5 A , VGS = 10 V
Q2
VDS = –30 V, ID = –3. 5 A , VGS = –10V Q1
Q2 2.6
3.0 nC
FDS4559
http://store.iiic.cc/
FDS4559 Rev C1(W)
Electrical Characteristics (continued) TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Cont i nuous Drain-Source Diode Forward Current Q1
Q2 1.3
–1.3 A
VSD Drain-Source Diode Forward
V
oltage VGS = 0 V, IS = 1.3 A (Note 2)
VGS = 0 V, IS = –1.3 A (Note 2) Q1
Q2 0.8
–0.8 1.2
–1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a
0.5 in2 pad of 2 oz
copper
b) 125°C/W when
mounted on a .02 in2
pad of 2 oz copper
c) 135°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycl e < 2.0%
FDS4559
http://store.iiic.cc/
FDS4559 Rev C1(W)
Typical Characteristics: Q2
0
3
6
9
12
15
012345
-VDS, DRAIN-SOUR CE V O LTAGE (V)
-I
D
, DRAIN CURRENT (A
)
-6.0V
-5.0V
-4.5V
-3.5V
VGS = -10V
-4.0V
-2.5V
-3.0V
0.8
1
1.2
1.4
1.6
1.8
0246810
-ID, DRAIN CURRE NT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -3.5V
-5.0V
-6.0V -7.0V -8.0V -10V
-4.5V
-4.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-50 -25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMP E RATURE (oC)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANC
E
ID = -3.5A
VGS = -10V
0
0.1
0.2
0.3
0.4
246810
-VGS, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
ID = -1.5A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
3
6
9
12
15
12345
-VGS, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
TA = -55 oC25oC
125oC
VDS = -5V
0.001
0.01
0.1
1
10
100
0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VSD, BODY DIO DE FO RWARD VOLTAG E (V )
-I
S
, REVERSE DRAIN CURRENT (A
)
VGS = 0V
TA = 125oC
25oC
-55oC
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4559
http://store.iiic.cc/
FDS4559 Rev C1(W)
Typical Characteristics: Q2
0
2
4
6
8
10
0481216
Qg, GATE CHARGE (nC)
-V
GS
, GATE-SOURCE VOLTAGE (V)
ID = -3.0A VDS = 10V 20V
30V
0
200
400
600
800
1000
1200
0 102030405060
-VDS, DRAIN TO SOURCE VO LTAG E (V )
CAPACITANCE (pF)
CISS
COSS
CRSS
f = 1 M H z
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
DC10s1s
100ms
100µs
RDS(ON) LIMIT
VGS = -10V
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
10ms
0
10
20
30
40
0.01 0.1 1 10 100 1000
t1, TIME (s e c )
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
FDS4559
http://store.iiic.cc/
FDS4559 Rev C1(W)
Typical Characteristics: Q1
0
4
8
12
16
20
01234
VDS, DRAIN-SOURCE VOL TAGE ( V)
I
D
, DRAIN-SOURCE CURRENT (A
)
VGS = 10V
6.0V
5.0V
4.5V
4.0V
3.5V
0.8
1
1.2
1.4
1.6
1.8
0 4 8 12 16 20
ID, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 4.0V
10V
5.0V
4.5V
6.0V 8.0V
Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
-50 -25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (oC)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANC
E
ID = 4.5A
VGS = 10V
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
246810
VGS, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
ID = 2.3A
TA = 125oC
TA = 25oC
Figure 13. On-Resistance Variation with
Temperature. Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
0
4
8
12
16
20
123456
VGS, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A
)
TA = -55 oC25oC
125oC
VDS = 5V
0.0001
0.001
0.01
0.1
1
10
100
0 0.2 0.4 0.6 0.8 1 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
I
S
, REVERSE DRAIN CURRENT (A
)
TA = 125oC
25oC
-55oC
VGS = 0V
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4559
http://store.iiic.cc/
FDS4559 Rev C1(W)
Typical Characteristics: Q1
0
2
4
6
8
10
02468101214
Qg, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
ID = 4.5A VDS = 10V
20V
30V
0
100
200
300
400
500
600
700
800
900
0 102030405060
VDS, DRAIN TO SOURCE VOL TAG E (V)
CAPACITANCE (pF)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1 1 10 100
VDS, DRAIN-SOURCE V O LTAGE (V)
I
D
, DRAIN CURRENT (A
)
DC 1s
100ms10ms 1m
100µs
VGS= 10V
SINGLE PULSE
RθJA= 135oC/W
TA= 25oC
RDS(ON) LIMIT
0
10
20
30
40
0.01 0.1 1 10 100 1000
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
RθJA(t) = r(t) + RθJA
RθJA = 135°C/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P
(p
k
)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS4559
http://store.iiic.cc/
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
MICROWIRE
OPTOLOGIC
OPTOPLANAR
PACMAN
POP
Power247
PowerTrench
QFET
QS
QT Optoelectronics
Quiet Series
FAST
FASTr
FRFET
GlobalOptoisolator
GTO
HiSeC
I2C
ISOPLANAR
LittleFET
MicroFET
MicroPak
Rev. H5
â
ACEx
Bottomless
CoolFET
CROSSVOLT
DenseTrench
DOME
EcoSPARK
E2CMOSTM
EnSignaTM
FACT
FACT Quiet Series
SILENT SWITCHER
SMART START
SPM
STAR*POWER
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
TinyLogic
TruTranslation
ââ
â
STAR*POWER is used under license
UHC
UltraFET
VCX
â
http://store.iiic.cc/