DC2093A-A - Linear Technology

LT4321

4321f

For more information www.linear.com/LT4321

Typical applicaTion

FeaTures DescripTion

PoE Ideal Diode Bridge

Controller

The LT

4321 is a dual ideal diode bridge controller that

enables a Power over Ethernet (PoE) powered device

(PD) to receive power in either voltage polarity from

RJ-45 data pairs, spare pairs, or both. The LT4321 and

eight N-channel MOSFETs replace the eight diodes in a

passive PoE rectifier bridge. The LT4321 eases thermal

design and increases delivered power.

An internal charge pump allows an all-NMOS bridge

eliminating larger and more costly PMOS switches. The

LT4321 works with 2-pair and 4-pair applications. High

impedance input sense pins prevent reverse current on

unused pairs. If the power source fails or is shorted, a

fast turn-off minimizes reverse current transients. Unlike

discrete ideal bridge solutions, the LT4321 will operate

through transients without enabling the MOSFETs on

unpowered pairs.

Powered Device for PoE (to 13W), PoE+ (to 25.5W), or Linear LTPoE++ (to 90W) Systems

applicaTions

L, LT, LTC , LT M, Linear Technology and the Linear logo are registered trademarks and

PowerPath and LTPoE++ are trademarks of Linear Technology Corporation. All other trademarks

are the property of their respective owners.

n Reduces Heat, Eliminates Thermal Design Problems

n Maximizes Power Efficiency

n Less than 800µA Quiescent Operating Current

n Fully Compatible with IEEE 802.3 Detection and

Classification

n IEEE 802.3 Compliant When Paired with a Powered

Device (PD) Controller

n Works with 2-Pair and 4-Pair PoE Applications

n Compatible with PoE, PoE+, and LTPoE++™

n 100V Absolute Maximum Voltage

n H-Grade Version Operates Up to 125°C

n 16-Lead 4mm × 4mm QFN Package

n PoE/PoE+/ LTPoE++ Powered Devices

n DC Polarity Correction and Ideal Diode-ORing of

Telecom Supplies

4321 TA01

LT4321

TG36BG12 BG36

IN36

IN45

IN78

IN12

DATA

PAIRS

SPARE

PAIRS

OUTN

OUTP

VPORT

PWRGD

HSGATE

LT4275

GND

TG12

BG78TG45 TG78BG45

HSSRC

10µF

ISOLATED

POWER

SUPPLY

GND

RUN

VOUT

VIN

0.1µF SMAJ60A

–

LT4321

4321f

For more information www.linear.com/LT4321

pin conFiguraTionabsoluTe MaxiMuM raTings

OUTP-OUTN ............................................. –0.3V to 100V

IN12, IN36, IN45, IN78 ....................... –2V to OUTP + 2V

BG12, BG36, BG45, BG78 Voltages .......... –0.3V to 100V

TG12, TG36, TG45, TG78

Voltages ....................................... –0.3V to OUTP + 12V

TG12-IN12 Voltage ......................................–0.3V to 12V

TG36-IN36 Voltage .....................................–0.3V to 12V

TG45-IN45 Voltage .....................................–0.3V to 12V

TG78-IN78 Voltage ......................................–0.3V to 12V

EN, EN, ..................................................... –0.3V to 100V

Operating Ambient Temperature Range

LT4321I ................................................ –40°C to 85°C

LT4321H ............................................. –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

(Notes 1, 2)

16 15 14 13

5678

TOP VIEW

OUTN

UF PACKAGE

16-LEAD (4mm ×

4mm) PLASTIC QFN

TG36

IN36

IN45

TG45

OUTP

OUTN

TG12

IN12

BG12

BG36

TG78

IN78

BG78

BG45

TJMAX = 125°C, θJC = 4.5°C/W

EXPOSED PAD (PIN 17) IS OUTN, MUST BE SOLDERED TO PCB

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT4321IUF#PBF LT4321IUF#TRPBF 4321 16-Lead 4mm × 4mm Plastic QFN –40°C to 85°C

LT4321HUF#PBF LT4321HUF#TRPBF 4321 16-Lead 4mm × 4mm Plastic QFN –40°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC Marketing for information on nonstandard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

LT4321

4321f

For more information www.linear.com/LT4321

elecTrical characTerisTics

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Operating Supply Range |IN12-IN36|, |IN45-IN78|, OUTP l20 80 V

VUVLO Undervoltage Lockout OUTP-OUTN l15 17 18 V

IS(DET) Total Supply Current in Detect Region OUTP < 10V l0.8 5 µA

IS(OFF) Total Supply Current in Shutdown OUTP > 12V, EN < VIL and EN > VIH l32 60 µA

IS(ON) Total Operating Supply Current EN > VIH or EN < VIL, OUTP > 20V l0.5 0.8 mA

Top Gate Drive INn = OUTP + ∆VSD(MAX) + 5mV, 10µA Out of

TGn (Note 3)

l7.7 9.5 11 V

VBG Bottom Gate Drive 10µA Out of BGn (Note 3) l10 11.5 13 V

Top Gate Pull-Up Current TGn = INn (Note 3) l50 120 250 µA

Top Gate Pull-Down Current INn = OUTP – 0.25V; TGn – INn = 5V l1.25 mA

Bottom Gate Pull-Up Current BGn < VBG (Note 3) l15 30 45 µA

Bottom Gate Pull-Down Current BGn = 5V l3 mA

EN Pull-Up Resistance (Active Low) OUTP = 55V l160 250 310 kΩ

EN Pull-Down Resistance (Active High) OUTP = 55V l160 250 310 kΩ

VIH Digital Input High EN, EN l2.6 V

VIL Digital Input Low EN, EN l0.5 V

VENOC EN Open Circuit Voltage OUTP = 55V l2 2.5 3 V

∆VSD Topside Forward Regulation Voltage INn - OUTP l2 10 18 mV

Bottom Comparator Turn-On Threshold INn - OUTN l–30 –15 0 mV

Bottom Comparator Turn-Off Threshold INn - OUTN l2 15 30 mV

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C, OUTP = 20V to 80V unless otherwise noted.

Note 2: Referenced with respect to OUTN unless otherwise specified.

Note 3: All conditions for external MOSFET turn on must be met. See

Table 1 and Table 2.

LT4321

4321f

For more information www.linear.com/LT4321

Typical perForMance characTerisTics

Input Pin Current EN Open Circuit Voltage BGn Pull-Down Strength

BGn Pull-Up Strength TG Pull-Down Strength TG Pull-Up Strength

Total Supply Current in Shutdown

Total Supply Current in Ideal

Bridge Mode, 2-Pair

Total Supply Current in Ideal

Bridge Mode, 4-Pair

VIN (V)

CURRENT (µA)

20 40 50

4321 G01

10 30 60 70

–40°C

25°C

100°C

125°C

IN12 = IN45 = VIN

IN36 = IN78 = 0V

VIN (V)

CURRENT (µA)

200

300

400

700

500

20 40 50

4321 G03

100

600

10 30 60 70

–40°C

25°C

100°C

125°C

IN12 = IN45 = VIN

IN36 = IN78 = 0

EN = EN = 0

OUTP (V)

ENOC

(V)

1.5

1.0

2.0

0.5

3.0

2.5

20 30 4010

4321 G05

6050 70 80

–40°C

25°C

100°C

125°C

VIN (V)

CURRENT (µA)

200

300

400

700

500

20 40 50

4321 G02

100

600

10 30 60 70 80

–40°C

25°C

100°C

125°C

IN12 = VIN

IN36 = 0

FLOAT IN45, IN78

EN = EN = 0

VBGn (V)

IBGn (mA)

4 62

4321 G06

8 10 12

∆VTGATE (V)

ITG12 (mA)

2.5

1.5

2.0

1.0

0.5

3.5

3.0

62 4

4321 G08

8 10

OUTP = 20V

OUTP = 80V

IN45 = IN78 = FLOAT

EN = OUTP

IN12 = OUTP –250mV

IN36 = OUTN –50mV

VBGn (V)

IBGn (mA)

4 62

4321 G07

8 10 12

INn (V)

CURRENT (µA)

–1.0

0.0

–0.5

1.0

0.5

4321 G04

40 60 80

–40°C

25°C

100°C

125°C

OUTP = 80V

∆VTGATE (V)

ITG12 (µA)

140

100

120

180

160

62 4

4321 G09

8 10

IN12 – IN36 = 20V

IN12 – IN36 = 30V

IN12 – IN36 = 80V

IN45 = IN78 = FLOAT

EN = OUTP

LT4321

4321f

For more information www.linear.com/LT4321

pin FuncTions

IN12: Data Pair Input 1. In a PoE system, IN12 connects

to the center tap of the transformer connected to pins 1

and 2 on an RJ45 connector.

IN36: Data Pair Input 2. In a PoE system, IN36 connects

to the center tap of the transformer connected to pins 3

and 6 on an RJ45 connector.

IN45: Spare Pair Input 1. In a PoE system, IN45 connects

to the center tap of the transformer connected to pins 4

and 5 on an RJ45 connector.

IN78: Spare Pair Input 2. In a PoE system, IN78 connects

to the center tap of the transformer connected to pins 7

and 8 on an RJ45 connector.

TG12: Top-Side Gate Driver Output. TG12 pin pulls high

with respect to IN12 when IN12 is greater than OUTP and

IN36 is less than OUTN.

TG36: Top-Side Gate Driver Output. TG36 pin pulls high

with respect to IN36 when IN36 is greater than OUTP and

IN12 is less than OUTN.

TG45: Top-Side Gate Driver Output. TG45 pin pulls high

with respect to IN45 when IN45 is greater than OUTP and

IN78 is less than OUTN.

TG78: Top-Side Gate Driver Output. TG78 pin pulls high

with respect to IN78 when IN78 is greater than OUTP and

IN45 is less than OUTN.

BG12: Bottom-Side Gate Driver Output. BG12 pin pulls

high with respect to OUTN when IN36 is greater than OUTP

and IN12 is less than OUTN.

BG36: Bottom-Side Gate Driver Output. BG36 pin pulls

high with respect to OUTN when IN12 is greater than OUTP

and IN36 is less than OUTN.

BG45: Bottom-Side Gate Driver Output. BG45 pin pulls

high with respect to OUTN when IN78 is greater than OUTP

and IN45 is less than OUTN.

BG78: Bottom-Side Gate Driver Output. BG78 pin pulls

high with respect to OUTN when IN45 is greater than OUTP

and IN78 is less than OUTN.

EN: Enable, Active Low. Pull down to OUTN to enable ideal

diode bridge mode. EN is internally pulled up to VENOC.

Tie to OUTP if the application circuit uses the EN pin to

enable ideal bridge mode.

EN: Enable, Active High. Pull up to enable ideal diode

bridge mode. EN is internally pulled down to OUTN. Tie

to OUTN if the application circuit uses the EN pin to enable

ideal bridge mode.

OUTP: Positive Output Voltage. OUTP is the rectified

voltage from which the LT4321 draws power.

OUTN: Negative Output Voltage. OUTN is the negative

rectified voltage.

EXPOSED PAD: The exposed pad must be electrically

connected to the OUTN pin.

LT4321

4321f

For more information www.linear.com/LT4321

OVERVIEW

The LT4321 is a dual ideal diode bridge controller designed

to rectify two independent DC channels into a single

output. The LT4321 senses the greater of the two input

channels, |IN12-IN36| or |IN45-IN78|, and connects them

to the output with the correct polarity. Smooth crossover

between channels is guaranteed by the enforced dropout

voltage, ∆VSD.

A very common application is an IEEE 802.3 powered device

which is required to accept voltage in either polarity at its

RJ-45 input. Polarity correction devices allow the PD to

work equally well with standard or cross-over cables and

endspan or midspan PSEs. They also prevent the PD from

back feeding current into the Ethernet cable.

PD polarity correction is commonly done with a traditional

diode bridge, but this results in an efficiency loss due to

the forward drop generated across two conducting diodes.

This voltage drop reduces the available supply voltage and

dissipates significant power.

The LT4321 uses actively driven MOSFETs to nearly elimi-

nate the forward voltage drop. By maximizing available

voltage and reducing power dissipation (Figure 1), the

LT4321 simplifies PD design and reduces power supply

cost. It can also eliminate thermal design problems, costly

heat sinks, and reduce PC board area.

Some designs use ideal diode bridge circuits implemented

with discrete components. These bridges often suffer from

a trade-off between quiescent current and tolerance to

transients and leakage. With quiescent current properly

tuned for PoE, stray PCB leakage between bridge compo-

nents can be enough to cause accidental turn-on, latchup,

and destruction of the circuit.

The LT4321 offers significant improvements over discrete

solutions. The integrated bridge controller allows for

sophisticated sensing and control of the PowerPath™

MOSFETs, ensuring that MOSFETs that are supposed to

be off, stay off. An ideal bridge controlled by the LT4321 is

tolerant to hot-plugs, input short-circuits, common mode

shift, and PCB leakage in the application circuit.

applicaTions inForMaTion

OPERATING MODES

Ideal Diode Bridge Mode

In ideal bridge mode the LT4321 saves power by activat-

ing MOSFETs in place of power path diodes. The LT4321

enters ideal bridge mode when OUTP is greater than VUVLO

and either EN or EN is asserted.

When the LT4321 is enabled, it senses the inputs with

respect to the output to decide which external MOSFETs

to turn on. Inputs are grouped into pairs, IN12/IN36 and

IN45/IN78. Within each pair, one input voltage must be

greater than OUTP and one must be less than OUTN before

the external MOSFETs related to that pair are enabled. For

example, if IN36 is greater than OUTP and IN12 is less than

OUTN, TG36 and BG12 will turn on. Table 1 and Table 2

outline the conditions that activate the ideal diode bridge.

Shutdown Mode

Shutdown mode is intended to keep the LT4321 quiescent

current from interfering with detection and classification

in a PoE system (Figure 2). The LT4321 is always in

shutdown mode when OUTP < VUVLO. It can be held in

shutdown mode over the full operating voltage range by

deasserting both the EN and EN pins.

Figure 1. Power Dissipation vs Load Current

CURRENT (mA)

POWER DISSIPATION (W)

0.8

1.0

1.2

1.8

1.4

600

4321 F01

0.6

0.4

0.2

1.6

200 400 800 1000

IN12 = 55V

IN36 = 0V

IN45 = FLOAT

IN78 = FLOAT

LT4321 (50mΩ FETs)

DIODES (S2B)

POWER

SAVED

LT4321

4321f

For more information www.linear.com/LT4321

applicaTions inForMaTion

Shutting down the LT4321 does not disconnect the load.

The external MOSFETs are shorted gate to source and

bridge current is carried by the MOSFETs’ body diodes.

The eight body diodes will act like two traditional diode

bridges.

At light load, the power dissipated in the forward drop of

the body diodes will be less than the power dissipated by

the LT4321 quiescent current. In applications with a low

power sleep mode, the LT4321 can optionally be shut

down to save power if the load current is less than 20mA.

EXTERNAL INTERFACE AND COMPONENT SELECTION

Bypass Capacitance

A 0.1μF ceramic capacitor must be placed across the

OUTP and OUTN pins.

In PD applications, the IEEE 802.3 standard limits the

port capacitance at the PD interface (CPD) to 0.12μF. The

LT4321 and the PD interface controller both need local

bypass capacitance, but they can share the same 0.1μF

capacitor. If the LT4321 and the PD interface controller

cannot both be positioned next to a shared bypass capaci-

tor, split the CPD capacitance between the two chips by

placing a 0.047μF ceramic close to the LT4321 and another

0.047μF ceramic close to the PD interface controller.

A 10μF or greater capacitance must be connected across

OUTP and OUTN pins when the LT4321 is enabled. In

PoE applications it is sufficient for the CPORT capacitor to

be connected by the PD interface controller’s hot swap

FET. In non PoE applications the CPORT capacitor may be

permanently connected between OUTP and OUTN.

Figure 2. Leakage Current at 125°C

Table 1. Conditions for Ideal Bridge Mode on IN12/IN36

PoE MODE OUTP EN | EN IN12 IN36 IN45 IN78 TG12 TG36 BG12 BG36

Detect/Class < VUVLO XX X X X OFF

Class/Inrush

> VUVLO

Power ON

> OUTP < OUTN

X X

ON OFF OFF ON

< OUTN > OUTP OFF ON ON OFF

|IN12 – IN36| <

OUTP – OUTN

> OUTN OFF

< OUTP

Table 2. Conditions for Ideal Bridge Mode on IN45/IN78

PoE MODE OUTP EN | EN IN12 IN36 IN45 IN78 TG45 TG78 BG45 BG78

Detect/Class < VUVLO XX X X X OFF

Class/Inrush

> VUVLO

Power ON

1 X X

> OUTP < OUTN ON OFF OFF ON

< OUTN > OUTP OFF ON ON OFF

|IN45 – IN78| <

OUTP – OUTN

> OUTN OFF

< OUTP

VIN (V)

CURRENT (µA)

150

200

300

4321 F02

100

250

510 20

LT4321 SHUTDOWN MODE

B2100 SCHOTTKY BRIDGE

LT4321

4321f

For more information www.linear.com/LT4321

applicaTions inForMaTion

Transient Voltage Suppressor

The LT4321 specifies an absolute maximum voltage of

100V and is designed to tolerate brief overvoltage events.

However, pins that interface to Ethernet cables or remote

telecom supplies can routinely see excessive peak voltages.

To protect the LT4321, install a unidirectional transient

voltage suppressor (TVS) such as an SMAJ60A between

OUTP and OUTN. This TVS must be mounted as close as

possible to the LT4321.

For extremely high cable discharge and surge protection

contact Linear Technology Applications.

MOSFET Selection

Select external MOSFETs that have a drain-source break-

down voltage higher than the maximum input voltage.

For PoE systems the drain-source breakdown should be

at least 100V. For all applications the gate threshold must

be a minimum of 2V.

The amount of power saved by the LT4321 depends on the

channel resistance, RDS(ON), of the external MOSFETs. To

maximize performance and power savings select RDS(ON)

such that the forward voltage drop, VF, is between 20mV

and 70mV. Given the average output load current, IAVG:

RDS(ON) = VF/IAVG

For example, a PoE+ class 4 PD’s maximum average cur-

rent, IAVG, is 600mA. Choosing a MOSFET forward voltage

drop of 40mV reduces power consumption to 1/15th that

of a B2100 Schottky diode bridge.

RDS(ON) = 40mV/600mA = 66mΩ

Enable Pins

When OUTP is greater than VUVLO, the enable pins EN

and EN will control whether the LT4321 is in shutdown

mode or ideal bridge mode (Table 1 and Table 2). EN and

EN may be driven by a 3.3V or 5V logic signal, or with an

open drain or collector.

The EN pin is pulled up to the internally generated voltage

VENOC by an internal 250kΩ resistor. The EN pin is pulled

down to OUTN by an internal 250kΩ resistor. When OUTP

is less than 12V the enable pins are high impedance to

prevent these resistors from corrupting PoE detection.

The enable pins tolerate 100V (absolute maximum) and

may be tied directly to the OUTP or OUTN pins as needed.

Figure 3 and Figure 4 show how to interface the enable

pins to a PD interface controller. In these configurations,

the LT4321 PoE ideal bridge will be enabled after detec-

tion and classification are complete and before the PD is

consuming a significant amount of current.

LT4321

4321f

For more information www.linear.com/LT4321

applicaTions inForMaTion

Figure 3. PD Interface Using the EN Pin

Figure 4. PD Interface Using the EN Pin

4321 F03

LT4321

OUTN

OUTP

VPORT

PWRGD

HSGATE

LT4275

GND

HSSRC

10µF

ISOLATED

POWER

SUPPLY

GND

RUN

VOUT

VIN

0.1µF

100k

–

4321 F04

LT4321

OUTN VIN

OUTP

PWRGD

VOUT

PWRGD

LTC4265

GND

ISOLATED

POWER

SUPPLY

RTN

RUN

VOUT

VIN

0.1µF

100k

–

100k

10µF

LT4321

4321f

For more information www.linear.com/LT4321

Typical applicaTions

High Efficiency 25W PD Solution with 12VDC and 24VAC Auxiliary Input

4321 TA02

LT4321

TG36BG12

PSMN075-100MSE ×4

BSZ110N06NS3 ×4

PSMN075-100MSE ×4

WÜRTH 749022017

BG36

IN36

IN45

IN78

IN12

DATA

PAIRS

SPARE

PAIRS

OUTN

OUTP SMAJ60A

VPORT

158k

931k

PWRGD

AUX

IEEEUVLO

RCLASS

HSGATE

PSMN075-100MSE

VAUX

9V TO 57VDC

OR 24VAC

MMSD4148

×3

LT4275B

GND

TG12

BG78TG45 TG78BG45

HSSRC

ISOLATED

POWER

SUPPLY

GND

RUN

VOUT

VIN

0.1µF

150nF

680µF

–

34.8Ω

3.3k

BG1

BG2

IN2

IN1

TG1

TG2 OUTP

OUTN

LT4320

100k

1µF

0.1µF

LT4321

4321f

For more information www.linear.com/LT4321

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

4.00 ±0.10

(4 SIDES)

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

PIN 1

TOP MARK

(NOTE 6)

0.55 ±0.20

1615

BOTTOM VIEW—EXPOSED PAD

2.15 ±0.10

(4-SIDES)

0.75 ±0.05 R = 0.115

TYP

0.30 ±0.05

0.65 BSC

0.200 REF

0.00 – 0.05

(UF16) QFN 10-04

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

0.72 ±0.05

0.30 ±0.05

0.65 BSC

2.15 ±0.05

(4 SIDES)

2.90 ±0.05

4.35

±0.05

PACKAGE OUTLINE

PIN 1 NOTCH R = 0.20 TYP

OR 0.35 × 45° CHAMFER

UF Package

16-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1692 Rev Ø)

LT4321

4321f

For more information www.linear.com/LT4321

 LINEAR TECHNOLOGY CORPORATION 2013

LT 0913 • PRINTED IN USA

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT4321

relaTeD parTs

PART NUMBER DESCRIPTION COMMENTS

LTC4265 IEEE 802.3at PD Interface Controller Internal 100V, 1A Switch, 2-Event Classification Recognition

LTC4266/LTC4266A/

LTC4266C Quad PoE PSE Controller IEEE 802.3at, LTPoE++, IEEE 802.3af Power Levels

LTC4269-1/

LTC4269-2 IEEE 802.3af PD Interface with

Switching Regulator LTC4269-1 for Flyback, LTC4269-2 for Forward Regulator

LTC4270/LTC4271 12-Port PoE/PoE+/LTPoE++ PSE

Controller Transformer Isolation, Supports IEEE 802.3af, IEEE 802.3at and LTPoE++ PDs

LTC4274/LTC4274A/

LTC4274C Single PoE PSE Controller IEEE 802.3at, LTPoE++ 90W, IEEE 802.3af Power Levels

LT4275A/LT4275B/

LT4275C LTPoE++/PoE+/PoE PD Controller External Switch, LTPoE++ Support

LTC4278 IEEE 802.3af PD Interface with

Integrated Flyback Switching

Regulator

2-Event Classification, Programmable Class, Synchronous No-Opto Flyback Controller,

50kHz to 250kHz, 12V Aux Support

LTC4290/LTC4271 8-Port PoE/PoE+/LTPoE++ PSE

Controller Transformer Isolation, Supports IEEE 802.3af, IEEE 802.3at and LTPoE++ PDs

LT4320 Ideal Diode Bridge Controller 9V to 72V, DC to 600Hz, N-Channel Ideal Diode Bridge

LTC4354 Negative Voltage Diode-OR Controller

and Monitor Controls Two N-Channel MOSFETs, 1.2µs Turn-Off, –80V Operation

LTC4355 Positive Voltage Diode-OR Controller

and Monitor Controls Two N-Channel MOSFETs, 0.4µs Turn-Off, 9V to 80V Operation

LTC4359 Ideal Diode Controller with Reverse

Input Protection N-Channel, 4V to 80V, MSOP-8 and DFN-6 Packages

Typical applicaTion

LTPoE++ 70W Powered Device

4321 TA03

LT4321

TG36BG12

PSMN075-100MSE ×4

WÜRTH 749022016

BG36

IN36

IN45

IN78

IN12

DATA

PAIRS

SPARE

PAIRS

OUTN

OUTP SMAJ60A

VPORT

PWRGD

AUX IEEEUVLO

RCLASS

RCLASS++

HSGATE

PSMN040-100MSE

LT4275

GND

TG12

BG78TG45 TG78BG45

HSSRC

ISOLATED

POWER

SUPPLY

GND

RUN

VOUT

VIN

0.1µF

22µF

–

76.8Ω

64.9Ω

47nF

3.3k

100k