HCPL-M456 Small Outline, 5 Lead Intelligent Power Module Optocoupler Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description Features The HCPL-M456 consists of a GaAsP LED optically coupled to an integrated high gain photo detector. Minimized propagation delay difference between devicesmake these optocouplers excellent solutions for improving inverter efficiency through reduced switching dead time. * Performance specified for common IPM applications over industrial temperature range: -40C to 100C * Fast maximum propagation delays tPHL = 400 ns, tPLH = 490ns * Minimized Pulse Width Distortion (PWD = 370 ns) * Very high Common Mode Rejection (CMR): 15 kV/s at VCM = 1500V * CTR > 44% at IF = 10mA * Safety approval UL recognized per UL1577 (file no. E55361) - 3750Vms for 1 minute * Lead free option "-000E" Specifications and performance plots are given for typical IPM applications. Schematic Diagram 1 6 5 3 4 SHIELD Applications * IPM isolation * Isolated IGBT/MOSFET gate drive * AC and brushless dc motor drives * Industrial inverters Truth Table LED ON OFF V HCPL-M456 pkg O L H The connection of a 0.1 F bypass capacitor between pins 4 and 6 is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Ordering Information HCPL-M456 is UL Recognized with 3750 Vrms for 1 minute per UL1577. Part number Option RoHS Non RoHS Compliant Compliant HCPL-M456 Package Surface Mount -000E No option X -500E #500 X -060E -060 -560E -560 SO-5 Tape & Reel IEC/EN/DIN EN 60747-5-2 Quantity 100 per tube X 1500 per reel X X X X 100 per tube X 1500 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: HCPL-M456-560E to order product of SO-5 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant. Example 2: HCPL-M456 to order product of SO-5 Surface Mount package in tube packaging and non RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Remarks: The notation `#XXX' is used for existing products, while (new) products launched since 15th July 2001 and RoHS compliant option will use `-XXXE`. HCPL-M456 Outline Drawing Pin Location (for reference only) ANODE MXXX XXX 4.4 0.1 (0.173 0.004) 6 1 7.0 0.2 (0.276 0.008) VCC 5 VOUT CATHODE 3 4 GND TYPE NUMBER (LAST 3 DIGITS) DATE CODE 3.6 0.1* (0.142 0.004) 2.5 0.1 (0.098 0.004) 0.4 0.05 (0.016 0.002) 0.102 0.102 (0.004 0.004) 1.27 BSC (0.050) 7 MAX. 0.71 MIN (0.028) DIMENSIONS IN MILLIMETERS (INCHES) * MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006) NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. 0.15 0.025 (0.006 0.001) MAX. LEAD COPLANARITY = 0.102 (0.004) Land Pattern Recommendation 4.4 (0.17) 1.3 (0.05) 2.5 (0.10) 2.0 (0.080) 8.27 (0.325) 0.64 (0.025) DIMENSION IN MILLIMETERS (INCHES) Figure 1. 5 Pin SOIC Package (JEDEC MO-155) Device Outline Drawing. Absolute Maximum Ratings Parameter Symbol Min. Max. Storage Temperature TS -55 125 Operating Temperature TA -40 100 [1] Average Input Current IF(avg)25 [2] Peak Input Current IF(peak) 50 (50% duty cycle, <1 ms pulse width) Peak Transient Input Current IF(tran) 1.0 (<1 s pulse width, 300 pps) Reverse Input Voltage (Pin 3-1) VR 5 Average Output Current (Pin 5) IO(avg) 15 Output Voltage (Pin 5-4) VO -0.5 30 Supply Voltage (Pin 6-4) VCC -0.5 30 [3] Output Power Dissipation PO 100 [4] Total Power Dissipation PT 145 Infrared and Vapor Phase Reflow Temperature See Reflow Thermal Profile below. Units C C mA mA A Volts mA Volts Volts mW mW Solder Reflow Thermal Profile TEMPERATURE (C) 300 PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. 200 PEAK TEMP. 245C PEAK TEMP. 240C 2.5C 0.5C/SEC. SOLDERING TIME 200C 30 SEC. 160C 150C 140C 30 SEC. 3C + 1C/-0.5C 100 PEAK TEMP. 230C PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 0 50 100 150 200 250 TIME (SECONDS) Note: Non-halide flux should be used. Recommended Pb-Free IR Profile tp TEMPERATURE Tp TL Tsmax 260 +0/-5 C 217 C RAMP-UP 3 C/SEC. MAX. 150 - 200 C TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 20-40 SEC. RAMP-DOWN 6 C/SEC. MAX. Tsmin ts PREHEAT 60 to 180 SEC. 25 tL 60 to 150 SEC. NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 C, Tsmin = 150 C t 25 C to PEAK TIME Note: Non-halide flux should be used. Recommended Operating Conditions Parameter Symbol Min. Max. Units Power Supply Voltage VCC 4.5 30 Volts Output Voltage VO 0 30 Volts mA Input Current (ON) IF(on) 1020 Input Voltage (OFF) VF(off ) -5 0.8 V TA -40 100 C Operating Temperature Insulation Related Specifications Parameter Symbol Value Units Conditions Minimum External Air Gap L(101) 5 mm External Clearance Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking L(102) 5 mm External Creepage Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap 0.08 mm Internal Clearance Insulation thickness between emitter and detector; also known as distance through insulation. Tracking Resistance DIN IEC 112/VDE 0303 Part 1 CTI200 Isolation Group Volts IIIa Material Group DIN VDE 0110 Regulatory Notes * The HCPL-M456 is recognized under the component program of U.L. (File No. 55361) for dielectric withstand proof voltages of 2500 VRMS, 1 minute. Electrical Specifications Over recommended operating conditions unless otherwise specified: TA = -40C to +100C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20mA, VF(off ) = -5 V to 0.8 V Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note Current Transfer Ratio CTR 44 90 % IF = 10 mA, VO = 0.6 V Low Level Output Current IOL 4.4 9.0 mA IF = 10 mA, VO = 0.6 V2,3 Low Level Output Voltage VOL 0.3 0.6 V Input Threshold Current ITH 1.5 5.0 mA VO = 0.8 V, IO = 0.75 mA2 High Level Output Current IOH 5 50 A VF = 0.8 V High Level Supply Current ICCH 0.6 1.3 mA VF = 0.8 V, VO = Open 9 Low Level Supply Current ICCL 0.6 1.3 mA IF = 10 mA, VO = Open 9 Input Forward Voltage VF 1.5 1.8 V Temperature Coefficient of Forward Voltage VF /TA Input Reverse Breakdown Voltage BVR Input Capacitance CIN -1.6 5 60 5 IO = 2.4 mA IF = 10 mA 9 4 5 mV/C IF = 10 mA V IR = 10 A pF f = 1 MHz, VF = 0 V Input-Output VISO 3750 VRMS Insulation Voltage RH < 50%, t = 1 min, TA = 25C 6, 7 Resistance (Input - Output) RI-O 1012 VI-O = 500 Vdc 6 Capacitance (Input - Output) CI-O 0.6 pF f = 1 MHz 6 *All typical values at 25C, VCC = 15 V. Switching Specifications (RL= 20 k) Over recommended operating conditions unless otherwise specified: TA = -40C to +100C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20mA, VF(off ) = -5 V to 0.8 V Parameter Symbol Min. Typ.* Max. Units Test Conditions Propagation Delay tPHL 30200 400 ns CL = 100 pF Time to Low 100 ns CL = 10 pF Output Level Propagation Delay tPLH 270 400 550 ns Time to High 130 Output Level CL = 100 pF Pulse Width Distortion Propagation Delay Difference Between Any 2 Parts CL = 10 pF IF(on) = 10 mA, VF(off ) = 0.8 V, VCC = 15.0 V, VTHLH = 2.0 V, VTHHL = 1.5 V Fig. Note 6, 8-12 8, 9 PWD200 450 ns CL = 100 pF 13 tPLH-tPHL -150200 450 ns 10 Output High Level |CMH| 15 30 kV/s IF = 0 mA, Common Mode VO > 3.0 V Transient Immunity Output Low Level |CML| 15 30 kV/s Common Mode Transient Immunity VCC = 15.0 V, CL = 100 pF, VCM = 1500 VP-P, 7 11 TA = 25C IF = 10 mA, VO < 1.0 V 12 *All typical values at 25C, VCC = 15 V. Notes: 1. Derate linearly above 90C free-air temperature at a rate of 0.8 mA/C. 2. Derate linearly above 90C free-air temperature at a rate of 1.6 mA/C. 3. Derate linearly above 90C free-air temperature at a rate of 3.0 mW/C. 4. Derate linearly above 90C free-air temperature at a rate of 4.2 mW/C. 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current (IO) to the forward LED input current (IF) times 100. 6. Device considered a two-terminal device: Pins 1 and 3 shorted together and Pins 4, 5 and 6 shorted together. 7. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second (leakage detection current limit, II-O 5A). 8. Pulse: f = 20 kHz, Duty Cycle = 10%. 9. Use of a 0.1 F bypass capacitor connected between pins 4 and 6 can improve performance by filtering power supply line noise. 10. The difference between tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) 11. Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0V ). 12. Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0V ). 13. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device. LED Drive Circuit Considerations For Ultra High CMR Performance Without a detector shield, the dominant cause of optocoupler CMR failure is capacitive coupling from the input side of the optocoupler, through the package, to the detector IC as shown in Figure 14. The HCPL-M456 improves CMR performance by using a detector IC with an optically transparent Faraday shield, which diverts the capacitively coupled current away from the sensitive IC circuitry. However, this shield does not eliminate the capacitive coupling between the LED and the optocoupler output pin and output ground as shown in Figure 15. This capacitive coupling causes perturbations in the LED current during common mode transients and becomes the major source of CMR failures for a shielded optocoupler. The main design objective of a high CMR LED drive circuit becomes keeping the LED in the proper state (on or off ) during common mode transients. For example, the recommended application circuit (Figure 13), can achieve 15kV/s CMR while minimizing component complexity. Note that a CMOS gate is recommended in Figure 13 to keep the LED off when the gate is in the high state. Another cause of CMR failure for a shielded optocoupler is direct coupling to the optocoupler output pins through CLEDO1 in Figure 15. Many factors influence the effect and magnitude of the direct coupling including: the position of the LED current setting resistor and the value of the capacitor at the optocoupler output (CL). Techniques to keep the LED in the proper state and minimize the effec t of the direc t coupling are discussed in the next two sections. CMR With The LED On (CMRL) A high CMR LED drive circuit must keep the LED on during common mode transients. This is achieved by overdriving the LED current beyond the input threshold so that it is not pulled below the threshold during a transient. The recommended minimum LED current of 10mA provides adequate margin over the maximum ITH of 4.0mA (see Figure 2) to achieve 15kV/s CMR. The placement of the LED current setting resistor effects the ability of the drive circuit to keep the LED on during transients and interacts with the direct coupling to the optocoupler output. For example, the LED resistor in Figure 16 is connected to the anode. Figure 17 shows the AC equivalent circuit for Figure 16 during common mode transients. During a +dVCM /dt in Figure 17, the current available at the LED anode (Itotal) is limited by the series resistor. The LED current (IF) is reduced from its DC value by an amount equal to the current that flows through CLEDP and CLEDO1. The situation is made worse because the current through CLEDO1 has the effect of trying to pull the output high (toward a CMR failure) at the same time the LED current is being reduced. For this reason, the recommended LED drive circuit (Figure 13) places the current setting resistor in series with the LED cathode. Figure 18 is the AC equivalent circuit for Figure 13 during common mode transients. In this case, the LED current is not reduced during a +dVCM /dt transient because the current flowing through the package capacitance is supplied by the power supply. During a dVCM/dt transient, however, the LED current is reduced by the amount of current flowing through CLEDN. But, better CMR performance is achieved since the current flowing in CLEDO1 during a negative transient acts to keep the output low. CMR With The LED Off (CMRH) A high CMR LED drive circuit must keep the LED off (VFVF(OFF)) during common mode transients. For example, during a +dVCM /dt transient in Figure 18, the current flowing through CLEDN is supplied by the parallel combination of the LED and series resistor. As long as the voltage developed across the resistor is less than VF(OFF) the LED will remain off and no common mode failure will occur. Even if the LED momentarily turns on, the 100pF capacitor from pins 5-4 will keep the output from dipping below the threshold. The recommended LED drive circuit (Figure 13) provides about 10V of margin between the lowest optocoupler output voltage and a 3V IPM threshold during a 15kV/s transient with VCM=1500V. Additional margin can be obtained by adding a diode in parallel with the resistor, as shown by the dashed line connection in Figure 18, to clamp the voltage across the LED below VF(OFF). Since the open collector drive circuit, shown in Figure 19, cannot keep the LED off during a +dVCM /dt transient, it is not desirable for applications requiring ultra high CMRH performance. Figure 20 is the AC equivalent circuit for Figure 19 during common mode transients. Essentially all the current flowing through CLEDN during a +dVCM/dt transient must be supplied by the LED. CMRH failures can occur at dv/dt rates where the current through the LED and CLEDN exceeds the input threshold . Figure 21 is an alternative drive circuit which does achieve ultra high CMR performance by shunting the LED in the off state. IPM Dead Time and Propagation Delay Specifications turn on LED2 is delayed by (tPLH max - tPHL min) from the LED1 turn off. Note that the propagation delays used to calculate PDD are taken at equal temperatures since the optocouplers under consideration are typically mounted in close proximity to each other. (Specifically, tPLHmax and tPHLmin in the previous equation are not the same as the tPLHmax and tPHLmin, over the full operating tempera ture range, specified in the data sheet.) This delay is the maximum value for the propagation delay difference specification which is specified at 370ns for the HCPL-M456 over an operating temperature range of -40C to 100C. The HCPL-M456 includes a Propagation Delay Difference specification intended to help designers minimize "dead time" in their power inverter designs. Dead time is the time period during which both the high and low side power transistors (Q1 and Q2 in Figure 22) are off. Any overlap in Q1 and Q2 conduction will result in large currents flowing through the power devices between the high and low voltage motor rails. To minimize dead time the designer must consider the propagation delay characteristics of the optocoupler as well as the characteristics of the IPM IGBT gate drive circuit. Considering only the delay characteristics of the optocoupler (the characteristics of the IPM IGBT gate drive circuit can be analyzed in the same way) it is important to know the minimum and maximum turn-on (tPHL) and turn-off (tPLH) propagation delay specifications, preferably over the desired operating temperature range. The limiting case of zero dead time occurs when the input to Q1 turns off at the same time that the input to Q2 turns on. This case determines the minimum delay between LED1 turn-off and LED2 turn-on, which is related to the worst case optocoupler propagation delay waveforms, as shown in Figure 23. A minimum dead time of zero is achieved in Figure 23 when the signal to 1.05 8 6 4 VO = 0.6 V 2 0 0 5 10 100 C 25 C -40 C 15 IF - FORWARD CURRENT - mA Figure 2. Typical Transfer Characteristics. HCPL-M456 fig 2 NORMALIZED OUTPUT CURRENT IO - OUTPUT CURRENT - mA 10 20 1.00 0.95 0.90 IF = 10 mA VO = 0.6 V 0.85 0.80 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C Figure 3. Normalized Output Current vs. Temperature. HCPL-M456 fig 3 IOH - HIGH LEVEL OUTPUT CURRENT - A Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time occurs in the highly unlikely case where one optocoupler with the fastest tPLH and another with the slowest tPHL are in the same inverter leg. The maximum dead time in this case becomes the sum of the spread in the tPLH and tPHL propagation delays as shown in Figure 24. The maximum dead time is also equivalent to the difference between the maximum and minimum propagation delay difference specifications. The maximum dead time (due to the optocouplers) for the HCPL-M456 is 520ns (= 370ns - (-150ns)) over an operating temperature range of 40C to100C. 2.0 VF = 0.8 V VCC = VO = 4.5 V OR 30 V 1.5 4.5 V 30 V 1.0 0.5 0 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE - C Figure 4. High Level Output Current vs. Temperature. HCPL-M456 fig 4 IF - FORWARD CURRENT - mA 1000 TA = 25C 100 IF + 10 VF - 1.0 0.1 0.01 0.001 1.10 1.20 1.30 1.40 1.50 1.60 VF - FORWARD VOLTAGE - VOLTS Figure 5. Input Current vs. Forward Voltage. HCPL-M456 fig 5 IF(ON) =10 mA 1 6 0.1 F + + VOUT - 5 - 3 C L* 4 SHIELD If 20 k tf VO VCC = 15 V VTHHL *TOTAL LOAD CAPACITANCE tr 90% 90% 10% 10% tPHL Figure 6. Propagation Delay Test Circuit. IF VFF + VCM 1 V = VCM t t 6 5 A 20 k VOUT + - VCC = 15 V OV 100 pF* 3 4 SHIELD *100 pF TOTAL CAPACITANCE - - + VCM = 1500 V Figure 7. CMR Test Circuit. tPLH HCPL-M456 fig 6 0.1 F B VTHLH t VO SWITCH AT A: IF = 0 mA VO SWITCH AT B: IF = 10 mA Typical CMR Waveform. HCPL-M456 fig 7a HCPL-M456 fig 7b VCC VOL 300 tPLH tPHL 200 100 -40 -20 0 20 40 60 80 IF = 10 mA VCC = 15 V CL = 100 pF TA = 25 C 600 tPLH tPHL 200 0 TA - TEMPERATURE - C 20 10 tP - PROPAGATION DELAY - ns tP - PROPAGATION DELAY - ns 500 tPLH tPHL 800 600 400 200 0 5 10 15 20 25 30 200 0 50 0 100 1 Figure 10. Propagation Delay vs. Load Capacitance. 100 0 5 10 15 20 HCPL-M456 fig 12 20 k 1 VOUT + - CLEDP VCC = 15 V 6 5 100 pF 4 *100 pF TOTAL CAPACITANCE 3 CLEDN 4 Figure 14. Optocoupler Input to Output Capacitance Model for Unshielded Optocouplers. HCPL-M456 fig 14 10 500 Figure 12. Propagation Delay vs. Input Current. 5 Figure 13. Recommended LED Drive Circuit. HCPL-M456 fig 13 400 tPLH tPHL 6 SHIELD 300 200 0.1 F 3 200 CL - LOAD CAPACITANCE - pF 300 HCPL-M456 fig 11 CMOS 400 IF - FORWARD LED CURRENT - mA Figure 11. Propagation Delay vs. Supply Voltage. 310 600 HCPL-M456 fig 10 VCC = 15 V CL = 100 pF RL = 20 k TA = 25C 400 VCC - SUPPLY VOLTAGE - V +5 V 800 HCPL-M456 fig 9 IF = 10 mA CL = 100 pF RL = 20 k TA = 25C 1000 40 Figure 9. Propagation Delay vs. Load Resistance. HCPL-M456 fig 8 1200 30 RL - LOAD RESISTANCE - K Figure 8. Propagation Delay with External 20 k RL vs. Temperature. 1400 1000 400 100 IF = 10 mA VCC = 15 V RL = 20 K TA = 25C tPLH tPHL 1200 tP - PROPAGATION DELAY - n 400 1400 800 IF = 10 mA VCC = 15 V CL = 100 pF RL = 20 K (EXTERNAL) tP - PROPAGATION DELAY - ns tP - PROPAGATION DELAY - ns 500 +5 V CLEDP 1 CLED01 6 1 310 6 20 k 0.1 F 5 5 VOUT + - VCC = 15 V 100 pF 3 3 4 CLEDN SHIELD CMOS Figure 15. Optocoupler Input to Output Capacitance Model for Shielded Optocouplers. 300 1 ICLEDP ICLED01 IF 1 6 CLED01 5 VOUT 20 k 100 pF 3 4 CLEDN SHIELD *100 pF TOTAL CAPACITANCE Figure 16. LED Drive Circuit with Resistor Connected to LED Anode (Not Recommended). HCPL-M456 fig 16 HCPL-M456 fig 15 ITOTAL* 4 SHIELD * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. + CLEDP CLED01 5 + VR** - 300 3 4 SHIELD - - + VCM Figure 17. AC Equivalent Circuit for Figure 16 during Common Mode Transients. HCPL-M456 fig 17 Figure 18. AC Equivalent Circuit for Figure 13 during Common Mode Transients. HCPL-M456 fig 18 1 CLEDP CLED01 +5 V 1 5 4 3 20 k 100 pF CLEDN SHIELD ICLEDN* VOUT 4 * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. + - SHIELD 6 5 6 Q1 Q1 20 k 100 pF CLEDN ICLEDN* VOUT * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. ** OPTIONAL CLAMPING DIODE FOR IMPROVED CMH PERFORMANCE. VR < VF (OFF) DURING +dVCM/dt. VCM 3 6 VCM Figure 19. Not Recommended Open Collector LED Drive Circuit. HCPL-M456 fig 19 +5 V 1 6 5 3 SHIELD 4 Figure 21. Recommended LED Drive Circuit for Ultra High CMR. HCPL-M456 fig 21 11 Figure 20. AC Equivalent Circuit for Figure 19 during Common Mode Transients. HCPL-M456 fig 20 I +5 V LED1 1 HCPL-M456 IPM 6 VCC1 20 k 0.1 F 5 310 Q1 3 CMOS I +5 V LED2 1 SHIELD HCPL-M456 6 VCC2 20 k 5 CMOS 3 VOUT2 HCPL-4506 HCPL-M456 HCPL-M456 4 SHIELD HCPL-M456 HCPL-M456 Figure 22. Typical Application Circuit. ILED1 VOUT1 VOUT2 ILED2 HCPL-M456 fig 22 Q1 OFF Q1 ON Q2 OFF Q2 ON tPLH MAX. tPHL MIN. PDD* MAX. = (tPLH-tPHL) MAX. = tPLH MAX. - tPHL MIN. *PDD = PROPAGATION DELAY DIFFERENCE NOTE: THE PROPAGATION DELAYS USED TO CALCULATE PDD ARE TAKEN AT EQUAL TEMPERATURES. Figure 23. Minimum LED Skew for Zero Dead Time. HCPL-M456 fig 23 ILED1 VOUT1 VOUT2 ILED2 Q1 OFF Q1 ON Q2 OFF Q2 ON tPLH MIN. tPLH MAX. PDD* MAX. M 4 0.1 F 310 +HV VOUT1 tPHL MIN. tPHL MAX. MAX. DEAD TIME MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = (tPLH MAX. - tPLH MIN.) + (tPHL MAX. - tPHL MIN.) = (tPLH MAX. - tPHL MIN.) - (tPLH MIN. - tPHL MAX.) = PDD* MAX. - PDD* MIN. *PDD = PROPAGATION DELAY DIFFERENCE NOTE: THE PROPAGATION DELAYS USED TO CALCULATE THE MAXIMUM DEAD TIME ARE TAKEN AT EQUAL TEMPERATURES. Figure 24. Waveforms for Deadtime Calculation. HCPL-M456 fig 24 Q2 -HV For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright (c) 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2118EN AV01-0555EN July 16, 2007 13