USB3803 USB 2.0 High-Speed Hub Controller Optimized for Portable Applications Features * Integrated USB 2.0 Compatible 3-Port Hub * Advanced power saving features: - 1 A Typical Standby Current - Port goes into power saving state when no devices are connected downstream - Port is shut down when port is disabled - Digital core shutdown in Bypass and Standby Modes * Provides USB Battery Charger Detection for: - USB-IF Battery Charging 1.1 compliant Dedicated Charging Ports (DCP) - USB-IF Battery Charging 1.1 compliant Charging Downstream Port (CDP) - Standard Downstream Port (SDP); that is, USB host or downstream hub port - Downstream Hub Ports Support USB-IF Battery Charging 1.1 as Charging Downstream Port (CDP) * Supports either Single-TT or Multi-TT configurations for Full-Speed and Low-Speed connections (when connected to a High-Speed host) * Bypass Switch for low power single port operation - Battery charging detection using a PMIC - Stereo and mono/mic audio - USB1.1 Data * Enhanced configuration options available through serial I2C Slave Port - VID/PID/DID - String Descriptors - Configuration options for Hub * Internal Default configuration option when serial I2C host is not available * MultiTRAKTM - Dedicated Transaction Translator per port * PortMap - Configurable port mapping and disable sequencing * PortSwap - Configurable differential intra-pair signal swapping * PHYBoost - Programmable USB transceiver drive strength for recovering signal integrity 2014-2018 Microchip Technology Inc. * VariSenseTM - Programmable USB receiver sensitivity * flexPWR(R) Technology - Low current design ideal for battery powered applications - Internal supply switching provides low power modes * External 12, 19.2, 26, or 38.4 MHz clock input * Internal 3.3V & 1.2V Voltage Regulators for single supply operation - External VBAT and 1.8V dual supply input option * Internal Short Circuit protection of USB differential signal pins * 5kV HBM ESD Protection * 25-pin WLCS (1.95mm x 1.95mm Wafer Level Chip Scale) Package - 0.4mm ball pitch Target Applications The USB3803 is targeted for applications where more than one USB port is required. As mobile devices add more features and the systems become more complex, it is necessary to have more than one USB port to communicate with internal and peripheral devices. * * * * * * * * * * Mobile Phones Ultra Mobile PCs Tablet Computers Digital Still Cameras Digital Video Camcorders Gaming Consoles PDAs Portable Media Players GPS Personal Navigation Devices Media Players/Viewers DS00001691C-page 1 USB3803 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com. We welcome your feedback. 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To determine if an errata sheet exists for a particular device, please check with one of the following: * Microchip's Worldwide Web site; http://www.microchip.com * Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. DS00001691C-page 2 2014-2018 Microchip Technology Inc. USB3803 Table of Contents 1.0 General Description ........................................................................................................................................................................ 4 2.0 Acronyms and Definitions ............................................................................................................................................................... 7 3.0 USB3803 Pin Definitions ................................................................................................................................................................. 8 4.0 Modes of Operation ...................................................................................................................................................................... 15 5.0 Configuration Options ................................................................................................................................................................... 21 6.0 Serial Slave Interface .................................................................................................................................................................... 40 7.0 USB Descriptors ........................................................................................................................................................................... 44 8.0 Battery Charging ........................................................................................................................................................................... 63 9.0 Integrated Power Regulators ........................................................................................................................................................ 69 10.0 Specifications .............................................................................................................................................................................. 70 11.0 Application Reference ................................................................................................................................................................. 78 12.0 Package Outlines, Tape & Reel Drawings, Package Marking .................................................................................................... 82 Appendix A: Revision History .............................................................................................................................................................. 87 The Microchip Web Site ...................................................................................................................................................................... 88 Customer Change Notification Service ............................................................................................................................................... 88 Customer Support ............................................................................................................................................................................... 88 Product Identification System ............................................................................................................................................................. 89 2014-2018 Microchip Technology Inc. DS00001691C-page 3 USB3803 1.0 GENERAL DESCRIPTION The USB3803 is a family of low-power, USB 2.0 hub controllers with three downstream ports. "USB3803" is a generic term referring to the entire family, which includes the following devices: * USB3803C * USB3803Ci The USB3803 is available in two temperature ranges (commercial and industrial) and is recommended for new designs. The USB3803 device includes an integrated USB bypass switch. This device-specific feature is called out independently throughout the document. Table 1-1 provides a summary of the feature differences between USB3803C and USB3803Ci: TABLE 1-1: USB3803 FAMILY DIFFERENCES Part Number USB Bypass Switch 0C to +70C USB3803C X X USB3803Ci X -40C to +85C X The USB3803 can attach to an upstream port as a full-speed hub or as a full-/hi-speed hub and supports low-speed, full-speed, and hi-speed (if operating as a hi-speed hub) downstream devices on all of the enabled downstream ports. The USB3803 has been specifically optimized for mobile embedded applications. The pin-count has been reduced by optimizing the USB3803 for mobile battery-powered embedded systems where power consumption, small package size, minimal BOM, and battery charger detection capabilities are critical design requirements. Standby mode and Bypass mode power has been minimized. Instead of a dedicated crystal, reference clock inputs are aligned to mobile applications. Flexible integrated power regulators ease integration into battery powered devices. Automatic battery charger detection is available on the upstream port. All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors on D+ and D- pins and all required pull-down and pull-up resistors on D+ and D- pins. The integrated USB switch allows the USB3803 to bypass the USB Hub and directly connect the upstream and Port 3 downstream USB port for operational modes that do not require Hi-Speed media transfers. The bypass switch enables multiple connectivity options to the USB port while preserving the high speed signal quality in USB Hub Mode. The USB3803 integrated battery charger detection circuitry supports USB-IF 1.1 charger detection methods. These circuits are used to detect the attachment and type of a USB Charger and provide an interrupt output to the portable device indicating that charger information is available to be read from USB3803 status registers via the serial interface. The USB3803 includes programmable features such as: MultiTRAKTM Technology which utilizes a dedicated Transaction Translator (TT) per port to maintain consistent fullspeed data throughput regardless of the number of active downstream connections. MultiTRAKTM outperforms conventional USB 2.0 hubs with a single TT in USB full-speed data transfers. PortMap which provides flexible port mapping and disable sequences. The downstream ports of a USB3803 hub can be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any port that is disabled, the USB3803 hub controllers automatically reorder the remaining ports to match the USB host controller's port numbering scheme. PortSwap which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the PCB. PHYBoost which provides programmable levels of Hi-Speed USB signal drive strength in the upstream and downstream port transceivers. PHYBoost attempts to restore USB signal integrity in a compromised system environment. The graphic on the right shows an example of Hi-Speed USB eye diagrams before and after PHYBoost signal integrity restoration. VariSenseTM which controls the USB receiver sensitivity enabling programmable levels of USB signal receive sensitivity. This capability allows operation in a sub-optimal system environment, such as when a captive USB cable is used. DS00001691C-page 4 2014-2018 Microchip Technology Inc. USB3803 1.1 Customer Selectable Features A default configuration is available in the USB3803 following a reset. This configuration may be sufficient for most applications. The USB3803 hub may also be configured by an external microcontroller. When using the microcontroller interface, the hub appears as an I2C slave device. The USB3803 hub supports customer selectable features including: Optional customer configuration via I2C Compound devices on a port-by-port basis Customizable vendor ID, product ID, and device ID Configurable downstream port power-on time reported to the host Indication of the maximum current that the hub consumes from the USB upstream port Indication of the maximum current required for the hub controller Configurable as a Self-Powered and Bus-Powered Hub Custom string descriptors (up to 30 characters): - Product string - Manufacturer string - Serial number string * When available, I2C configurable options for default configuration may include: - Downstream ports as non-removable ports - Downstream ports as disabled ports - USB signal drive strength - USB receiver sensitivity - USB differential pair pin location * * * * * * * * 2014-2018 Microchip Technology Inc. DS00001691C-page 5 USB3803 1.1.1 BLOCK DIAGRAM FIGURE 1-1: USB3803 BLOCK DIAGRAM From PMIC/SOC BYPASS_N RESET_N Mode Control - Upstream Upstream PHY Standby Bypass Hub Mode To I2C Master USB VBAT VDD_CORE_REG VDD12_BYP VDD33_BYP 3.3V Reg Bypass Switch TT #1 TT #2 SCL INT_N Serial Interface 1.2V Reg SIE Repeater SDA Controller TT #3 Port Controller Routing & Port Re-Ordering Logic Upstream Battery Charger Detection PHY#3 PHY#2 PHY#1 PLL Bypass/ USB Data Downstream DS00001691C-page 6 USB Data USB Data Downstream Downstream REF_CLK HUB_CONNECT 2014-2018 Microchip Technology Inc. USB3803 2.0 ACRONYMS AND DEFINITIONS 2.1 Acronyms EP: Endpoint FS: Full-Speed HS: Hi-Speed 2 I C: Inter-Integrated Circuit LS: Low-Speed 2.2 Reference Documents 1. 2. 3. 4. USB Engineering Change Notice dated December 29th, 2004, UNICODE UTF-16LE For String Descriptors Universal Serial Bus Specification, Revision 2.0, Dated April 27th, 2000 Battery Charging Specification, Revision 1.1, Release Candidate 10, Dated Sept. 22, 2008 High-Speed Inter-Chip USB Electrical Specification, Version 1.0, Dated Sept. 23, 2007 2014-2018 Microchip Technology Inc. DS00001691C-page 7 USB3803 3.0 USB3803 PIN DEFINITIONS 3.1 Pin Configuration The illustration below shows the package diagram. FIGURE 3-1: USB3803 25-BALL PACKAGE 1 2 3 4 5 A B C D E TOP VIEW DS00001691C-page 8 2014-2018 Microchip Technology Inc. USB3803 3.2 Signal Definitions TABLE 3-1: WLCSP Pin SIGNAL DEFINITIONS Name Description E2 USBUP_DP Upstream D+ data pin of the USB Interface E1 USBUP_DM Upstream D- data pin of the USB Interface A5 BYPASS_N Control signal to select between HUB MODE and BYPASS MODE C4 I2C_ASEL0 I2C Address Select Bit 0 B4 I2C_ASEL1 I2C Address Select Bit 1 A1 USBDN1_DP USB downstream Port 1 D+ data pin B1 USBDN1_DM USB downstream Port 1 D- data pin C2 USBDN2_DP USB downstream Port 2 D+ data pin D2 USBDN2_DM USB downstream Port 2 D- data pin C1 USBDN3_DP USB downstream Port 3 D+ data pin D1 USBDN3_DM E5 SCL I2C clock input D5 SDA I2C bi-directional data pin E3 RESET_N B5 HUB_CONNECT C5 INT_N USB downstream Port 3 D- data pin Active low reset signal Hub Connect Active low interrupt signal D4 REF_SEL1 Reference Clock Select 1 input E4 REF_SEL0 Reference Clock Select 0 input B3 REFCLK Reference Clock input A4 RBIAS D3 VDD12_BYP 1.2V Regulator A2 VDD33_BYP 3.3V Regulator B2 VBAT A3 VDD_CORE_REG C3 VSS 2014-2018 Microchip Technology Inc. Bias Resistor pin Voltage input from the battery supply Power supply input to 1.2V regulator for digital logic core Ground DS00001691C-page 9 USB3803 3.3 Pin Descriptions This section provides a detailed description of each signal. The signals are arranged in functional groups according to their associated interface. The terms assertion and negation are used. This is done to avoid confusion when working with a mixture of "active low" and "active high" signal. The term "assert" or "assertion" indicates that a signal is active, independent of whether that level is represented by a high or low voltage. The term "negate" or "negation" indicates that a signal is inactive. 3.3.1 PIN DEFINITION TABLE 3-2: PIN DESCRIPTIONS Name Symbol Type USB Bus Data USBUP_DP USBUP_DM A-I/O Bypass Select for Analog Switch BYPASS_N I Description Upstream USB 2.0 / Bypass Interface These pins connect to the upstream USB bus data signals (Host port or upstream hub) Control signal to select between Hub Mode and Bypass Mode. When asserted low, the device transitions to Bypass Mode, connects the Bypass Port to the upstream USB Port, places Port 1 and Port 2 in high impedance state, and places the core logic in a reduced power state. When negated high, the device transitions to HUB MODE and enables operation as a USB hub. Downstream USB 2.0 / Bypass Interface High-Speed USB Data & Port Disable Strap Option USBDN_DP[2:1] & USBDN_DM[2:1] A-I/O HS USB Data & Bypass Port USBDN_DP[3] & USBDN_DM[3] A-I/O These pins connect to the downstream USB peripheral devices attached to the hub's ports Downstream Port Disable Strap option: This pin is sampled at RESET_N negation to determine if the port is disabled. Both USB data pins for the corresponding port must be tied to VDD33_BYP to disable the associated downstream port. When BYPASS_N is negated high, these pins connect to the downstream USB peripheral devices attached to the hub's ports. There is no downstream Port Disable Strap option on these ports. When BYPASS_N is asserted low, USBDN_DP[3] and USBDN_DM[3] respectively are connected through the analog switch to the upstream port USBUP_DP and USBUP_DM. PortSwap setting has no effect in Bypass Mode. Serial Port Interface Serial Data SDA I/OD Serial Clock SCL I DS00001691C-page 10 I2C Serial Data Serial Clock (SCL) 2014-2018 Microchip Technology Inc. USB3803 TABLE 3-2: PIN DESCRIPTIONS (CONTINUED) Name Symbol Type Description Interrupt INT_N OD Interrupt The function of this pin is determined by the setting in the CFGP.INTSUSP configuration register. When CFGP.INTSUSP = 0 (General Interrupt) A transition from high to low identifies when one of the interrupt enabled status registers has been updated. SOC must update the Serial Port Interrupt Status Register to reset the interrupt pin high. When CFGP.INTSUSP = 1 (Suspend Interrupt) Indicates USB state of the hub. `Asserted' low = Unconfigured or configured and in USB Suspend `Negated' high = Hub is configured, and is active (that is, not in suspend) The Suspend Interrupt can be used by the system to determine whether the full current based on the USB descriptor can be drawn on VBUS or whether a reduced current should be drawn in accordance with the USB specification for unconfigured or suspend mode. If unused, this pin must be tied to VDD33_BYP. Serial Address Select I2C_ASEL[1:0] I Address Select - the USB3803 has the ability to be programmed with four different I2C slave addresses as part of the configuration in order to provide flexibility. When sharing the serial bus in the system with another part that conflicts with one of the address settings, these pins may be used to change the selection to a non-conflicting I2C address. The customer should tie these pins to ground or VDD33_BYP. This input is latched during HUB.Init stage. I2C_ASEL[1] selects between the I2C addresses defined in registers I2CADD0 and I2CADD1. I2C_ASEL[0] determines the LSB of the I2C address. Misc Reference Clock Input REFCLK I Reference clock input. Reference Clock Select REF_SEL[1:0] I The reference select input must be set to correspond to the frequency applied to the REFCLK input. The customer should tie these pins to ground or VDD33_BYP. This input is latched during HUB.Init stage. Selects the input reference clock frequency per Table 3-4. RESET Input RESET_N I This active low signal is used by the system to reset the chip and hold the chip in low power STANDBY MODE. USB Transceiver Bias RBIAS A-I/O A 12.0 k (+/- 1%) resistor is attached from ground to this pin to set the transceiver's internal bias settings. 2014-2018 Microchip Technology Inc. DS00001691C-page 11 USB3803 TABLE 3-2: PIN DESCRIPTIONS (CONTINUED) Name Symbol Type Description Hub Connect HUB_CONNECT I Hub transitions to the Hub Communication Stage when this pin is asserted high. It can be used in three different ways: * Tied to Ground - Hub does not transition to the Hub Communication Stage until connect_n bit of the SP_ILOCK register is negated. * Tied to VDD33_BYP - Hub automatically transitions to the Hub Communication Stage regardless of the setting of the connect_n bit and without pausing for the SOC to reference status registers. * Transition from low to high - Hub transitions to the Hub Communication Stage after this pin transitions from low to high. HUB_CONNECT should never be driven high when USB3803 is in Standby mode. Power 1.2V VDD Power VDD12_BYP Power 1.2V Regulator. A 1.0 F (<1 ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the USB3803. 3.3V VDD Power VDD33_BYP Power 3.3V Regulator. A 4.7F (<1 ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the USB3803. Core Power Supply Input VDD_CORE_REG Power Power supply to 1.2V regulator This power pin should be connected to VDD33_BYP for single supply applications. Refer to Section 9.0, Integrated Power Regulators for power supply configuration options. Battery Power Supply Input VBAT Power Battery power supply Refer to Section 9.0 for power supply configuration options. VSS VSS Ground Ground 3.3.2 I/O TYPE DESCRIPTIONS TABLE 3-3: USB3803 I/O TYPE DESCRIPTIONS I/O Type I OD 3.3.3 Description Digital Input Digital Output, Open Drain I/O Digital Input or Output A-I/O Analog Input or Output Power DC input or Output Ground Ground REFERENCE CLOCK The REFCLK input can be driven with a square wave from 0V to VDD33_BYP. The USB3803 only uses the positive edge of the clock. The duty cycle is not critical. DS00001691C-page 12 2014-2018 Microchip Technology Inc. USB3803 The USB3803 is tolerant to jitter on the reference clock. The REFCLK jitter should be limited to a peak-to-peak jitter of less than 1 nS over a 10-S time interval. If this level of jitter is exceeded, the USB3803 high speed eye diagram may be degraded. To select the REFCLK input frequency, the REF_SEL pins must be set according to Table 3-4. TABLE 3-4: USB3803 REFERENCE CLOCK FREQUENCIES REF_SEL[1:0] Frequency (MHz) `00' 38.4 `01' 26.0 `10' 19.2 `11' 12.0 3.3.4 INTERRUPT The general interrupt pin (INT_N) is intended to communicate a condition change within the hub. The conditions which may cause an interrupt are captured within a register mapped to the serial port (Register E8h: Serial Port Interrupt Status - INT_STATUS.) The conditions which cause the interrupt to assert can be controlled through the use of an interrupt mask register (Register E9h: Serial Port Interrupt Mask - INT_MASK). The general interrupt and all interrupt conditions are functionally latched and event driven. Once the interrupt or any of the conditions have asserted, the status bit remains asserted until the SOC negates the bit using the serial port. The bits then remain negated until a new event condition occurs. The latching nature of the register causes the status to remain even if the condition that caused the interrupt ceases to be active. The event driven nature of the register causes the interrupt to only occur when a new event occurs - when a condition is removed and then is applied again. (For example, if the battery charger detection routine has completed and the SOC negates the interrupt status, it will not cause an interrupt just because the charger detection is still completed - a new charger detection routine has to run before its associated interrupt will assert again.) The function of the interrupt and the associated status and masking registers are illustrated in Figure 3-2. The registers and register bits shown in the figure are defined in Table 5-2, "Serial Interface Registers," on page 21 and Section 5.3, "Serial Interface Register Definitions," on page 23. FIGURE 3-2: INT_N OPERATION INT_STATUS<4:0> S R S R Port Power Register Updated (PrtPwr) S R Reserved S R Reserved S R CLR S ET CLR S ET CLR S ET CLR S ET CLR Suspended OR NOT Configured Q <4> Q Q Q Q Q Q Q Q INT_N <3> INT_STATUS <7> S <2> R SET CLR 2to1 MUX 1 0 Hub Configured by USB Host (HubConf) S ET Set Based on Edge Detection Hub in USB Suspend Mode (SuspInd) Q Q <1> <0> Q D S ET CLR Q Q CFGP.INTSUSP D SE T CLR Q Q INT_M ASK Serial Port W rite Logic SCL/SDA Figure 3-2 also shows an alternate configuration option (CFGP.INTSUSP) for a suspend interrupt. This option allows the user to change the behavior of the INT_N pin to become a direct level indication of configuration and suspend status. When selected, the INT_N indicates that the entire hub has entered the USB suspend state and that VBUS current consumption should be reduced in accordance with the USB specification. Selective suspend set by the host on downstream hub ports has no effect on this signal because there is no requirement to reduce the current consumption from 2014-2018 Microchip Technology Inc. DS00001691C-page 13 USB3803 the upstream VBUS. It can be used by the system to monitor INT_N to dynamically adjust how much current the PMIC draws from VBUS to charge the battery in the system during a USB session. Because it is a level indication, it asserts or negates to reflect the current status of suspend without any interaction through the serial port. When negated high this means no level suspend interrupt and device has been configured by the USB Host. The full configured current can be drawn from the USB VBUS pin on the USB connector for charging - up to 500 mA depending on the descriptor setting. When asserted low, this indicates a suspend interrupt or device not yet configured by the USB Host. The current draw can be limited by the system according to the USB specification. The USB specification limits the current to 100 mA before configuration, and up to 12.5 mA in USB suspend mode. Note: Because INT_N is driven low when active, care must be taken when selecting the external pull-up resistor value for this open drain output. A sufficiently large resistor must be selected to ensure suspend current requirements can be satisfied for the system. DS00001691C-page 14 2014-2018 Microchip Technology Inc. USB3803 4.0 MODES OF OPERATION The USB3803 has modes of operation - Standby Mode, Bypass Mode, and Hub Mode - that balance power consumption with functionality. The operating mode of the USB3803 is selected by setting the values on primary inputs according to the table below. TABLE 4-1: 4.1 CONTROLLING MODES OF OPERATION RESET_N input BYPASS_N Input Resulting Mode Summary 0 0 Standby Lowest Power Mode - No function other than monitoring RESET_N and BYPASS_N inputs to move to higher states. Switch Resistance is RSTDBY. All regulators are powered off. 1 0 Bypass Low Power Mode - Bypass Switch connects bypass port (downstream port 3) to upstream port with low switch resistance RON. 1 1 Hub Full Feature Mode - Operates as a configurable USB hub with battery charger detection. Switch is disabled and assumes high switch resistance ROFF. Power consumption based on how many ports are active, at what speeds they are running, and amount of data transferred (refer to Table 10-3 and Table 10-4). Operational Mode Flowchart The flowchart in Figure 4-1 shows the modes of operation. It also shows how the USB3803 traverses through the Hub mode stages (shown in bold.) The flow of control is dictated by control register bits shown in Italics as well as other events such as availability of reference clock. Refer to Section 5.3, "Serial Interface Register Definitions," on page 23 for the detailed definition of the control register bits. In this specification register bits are referenced using the syntax <Register>.<RegisterBit>. A summary of all registers can be found in Table 5-2, "Serial Interface Registers," on page 21. The remaining sections in this chapter provide more detail on each stage and mode of operation. 2014-2018 Microchip Technology Inc. DS00001691C-page 15 USB3803 FIGURE 4-1: DS00001691C-page 16 MODES OF OPERATION FLOWCHART 2014-2018 Microchip Technology Inc. USB3803 4.2 Standby Mode The Standby mode provides a very low power state for maximum power efficiency when no signaling is required. This is the lowest power state. In Standby mode, all internal regulators are powered off, the bypass switch resistance is unconstrained, the PLL is not running, and the core logic is powered down to reduce power. Because the core logic is powered off, no configuration settings are retained in this mode and must be re-initialized after RESET_N is negated high. 4.2.1 EXTERNAL HARDWARE RESET_N A valid hardware reset is defined as an assertion of RESET_N low for a minimum of 100 us after all power supplies are within the operating range. While reset is asserted, the Hub (and its associated external circuitry) enters STANDBY MODE and consumes extremely low current as defined in Table 10-3 and Table 10-4. Assertion of RESET_N (external pin) causes the following: * * * * * All downstream ports are disabled. The switch assumes resistance RSTDBY. All transactions immediately terminate; no states are saved. All internal registers return to the default state. The PLL is halted. After RESET_N is negated high in the Hub.Init stage, the Hub reads customer-specific data from the ROM. 4.3 Bypass Mode The Bypass mode combines low power operation with the function of an integrated bypass switch. This mode allows a bypass port (Downstream Port 3) to be electrically connected to the upstream port through the use of a pass gate as illustrated in Figure 1-1. Compliant full-speed USB signals may be successfully passed through the switch. There are several applications for this mode. The bypass port can be used to provide connectivity to a PMIC to implement battery charger detection. In this configuration any special signaling is replicated on the line as if the hub were not in series. Another application is for a downstream device on Port 3 to assume a full-speed host role for an application such as USB OTG or embedded USB host. It can also be used to provide audio signaling (must be offset to avoid negative signal swing.) To ensure that the Bypass mode is entered, RESET_N must be asserted and then deasserted prior to asserting BYPASS_N (refer to Table 4-1). In Bypass mode, the 1.2V regulator is powered off, PLL is not running, and the core logic is powered down to reduce power. Because the core logic is powered off, no configuration settings are retained in this mode and must be reinitialized when BYPASS_N is negated to a high value. 4.3.1 VOLTAGE RANGE The switch operates in a voltage range as specified by Vswitch in Table 10-9, "Analog Switch Characteristics," on page 75. Negative voltage swing is not supported. 4.3.2 SWITCH BANDWIDTH The switch supports compliant operation with an external full-speed USB Port and with external battery charger detection. Under certain conditions with short cables it may be possible to pass high-speed USB signals. However, due to physical design constraints, the switch is not necessarily intended to pass a fully compliant high-speed USB eye. 4.4 Hub Mode Hub mode provides functions of configuration, upstream battery charger detection, and high-speed USB hub operation including connection and communication. Upon entering Hub mode and initializing internal logic, the device passes through several sequential stages based on a fixed time interval. In Hub mode, the bypass switch is disabled. Note: 4.4.1 To adhere to the USB 2.0 Specification, the system must not consume more than 100 mA from the upstream VBUS until the Hub is configured by the host. HUB INITIALIZATION STAGE (HUB.INIT) The first stage is the initialization stage and occurs when Hub mode is entered based on the conditions in Table 4-1. In this stage, the 1.2V regulator is enabled and stabilizes, internal logic is reset, and the PLL locks if a valid REFCLK is supplied. Configuration registers are initialized to their default state and I2C_ASEL[1:0] and REF_SEL[1:0] input values 2014-2018 Microchip Technology Inc. DS00001691C-page 17 USB3803 are latched. The USB3803 completes initialization and automatically enters the next stage after Thubinit. Because the digital logic within the device is not yet stable, no communication with the device using the serial port is possible. Configuration registers are initialized to their default state. 4.4.2 HUB WAIT REFCLK STAGE (HUB.WAITREF) In this stage, the reference clock is checked for activity. If the reference clock is active, the part continues to the Hub configuration stage. If the reference clock is not active but the default ROM has enabled battery charger detection, the detection sequence begins while operating on an internal ring oscillator. If the PLL locks while battery charger detection is still in progress, the sequence is aborted until the battery charger detection stage is complete. If aborted, no results are captured. If battery charger detection completes, the results of the battery charger detection may be communicated through the INT_N pin. During this stage the serial port is not functional. If the reference clock is provided before entering Hub mode, the USB3803 transitions to the Hub Configuration stage without pausing in the Hub Wait RefClk stage. Otherwise, the USB3803 transitions to the Hub configuration stage once a valid reference clock is supplied and the PLL has locked. 4.4.3 HUB CONFIGURATION STAGE (HUB.CONFIG) The next stage is the configuration stage. In this stage, the SOC has an opportunity to control the configuration of the USB3803 and modify any of the default configuration settings specified in the integrated ROM such as USB device descriptors, or port electrical settings such as PHY BOOST, and control features such as battery charging detection. The SOC implements the changes using the serial slave port interface to write configuration and control registers. See Section 5.3.30, "Register E7h: Serial Port Interlock Control - SP_ILOCK," on page 32 for the definition of SP_ILOCK register and how it controls progress through hub stages. If the SP_ILOCK.config_n bit has its default asserted low and the bit is not written by the serial port, then the USB3803 completes configuration and automatically enters the Battery Charger Detection Stage after Thubconfig without any I2C intervention. If the SP_ILOCK.config_n bit has its default negated high or the SOC negates the bit high using the serial port during Thubconfig, the USB3803 remains in the Hub Configuration Stage indefinitely. This allows the SOC to update other configuration and control registers without any remaining time-out restrictions. Once the SP_ILOCK.config_n bit is asserted low by the SOC, the device transitions to the next stage. 4.4.4 HUB BATTERY CHARGER DETECTION STAGE (HUB.CHGDET) After configuration, the device enters Battery Charger Detection Stage. If the battery charger detection feature is disabled during the Hub Configuration Stage, the USB3803 immediately transitions to the Hub Connect Stage. If the battery charger detection feature remains enabled, the battery charger detection sequence is started automatically and the USB3803 transitions to the Hub Connect Stage after Thubchgdet. 4.4.5 HUB CONNECT STAGE (HUB.CONNECT) Next, the USB3803 enters the Hub Connect Stage. See Section 5.3.37, "Register EEh: Configure Portable Hub - CFGP," on page 35 and Section 5.3.30, "Register E7h: Serial Port Interlock Control - SP_ILOCK," on page 32 for the definition of control registers that affect how the device transitions through the hub stages. By using the appropriate controls, the USB3803 can be set to immediately transition, or instead to remain in the Hub Connect Stage indefinitely until one of the SOC handshake events occur. When set to wait on the handshake, the SOC may read or update any of the serial port registers. Once the SOC is finished accessing any registers and is ready for USB communication to start, it can perform one of the selected handshakes which causes the USB3803 to assert its pull-up on the USBUP_DP pin and connect within Thubconnect and transition to the Hub Communication Stage. 4.4.6 HUB COMMUNICATION STAGE (HUB.COM) Once it exits the Hub Connect Stage, the USB3803 enters Hub Communication Stage. In this stage, full USB operation is supported under control of the USB Host on the upstream port. The USB3803 remains in the Hub Communication Stage until the operating mode is changed by the system asserting RESET_N or BYPASS_N low. While in the Hub Communication Stage, communication over the serial port is no longer supported and the resulting behavior of the serial port if accessed is undefined. To re-enable the serial port interface, the device must exit Hub Communication Stage. Exiting this stage is only possible by entering the Standby or Bypass mode. DS00001691C-page 18 2014-2018 Microchip Technology Inc. USB3803 4.4.7 HUB MODE TIMING DIAGRAM Figure 4-2 shows the progression through the stages of Hub Mode and the associated timing parameters. FIGURE 4-2: TIMING DIAGRAM FOR HUB STAGES RESET_N and BYPASS_N T_CdStart T_HUBINIT Device Mode.Stage Standby or Bypass Hub.Init T_HUBCONFIG Hub.Config T_HUBCHGDET T_HUBCONNECT Hub.ChgDet T_DCD_TOUT Hub.Connect T_VDPSRC_ON Hub.Com T_VDPSRC_ON T_VDPSRC_HICRNT TCDSTART is the amount of time from entering Hub Mode to the end of the Hub Configuration stage and the start of Hub Charger Detection stage. It is not a unique parameter but is equivalent to the sum of the THUBINIT and THUBCONFIG. THUBCHGDET is the amount of time to perform the battery charger detection sequence. It is likewise a sum of several timing parameters defined in Section 8.0, "Battery Charging," on page 63. The following table lists the timing parameters associated with the stages of the Hub Mode. TABLE 4-2: TIMING PARAMETERS FOR HUB STAGES Characteristic Symbol Min Typ Max Units Conditions Hub Initialization Time THUBINIT -- 3 4 mS -- THUBCONFIG 399 400 401 mS -- TCDSTART THUBINIT THUBINIT + THUBCONFIG THUBINIT + THUBCONFIG mS -- THUBCHGDET TDCD_TOUT TDCD_TOUT + 2*TVDPSRC_ON + TVDPSRC_HICRNT -- -- See Table 8-2, "Battery Charging Timing Parameters". Data Contact Detect Time-out TDCD_TOUT -- See Table 8-2, "Battery Charging Timing Parameters". -- -- -- Vdat_src and Idat_sink Enable Time TVDPSRC_ON -- See Table 8-2, "Battery Charging Timing Parameters". -- -- -- Hub Configuration Time-out Charger Detection Start Time delay Hub Charger Detection Duration 2014-2018 Microchip Technology Inc. DS00001691C-page 19 USB3803 TABLE 4-2: TIMING PARAMETERS FOR HUB STAGES (CONTINUED) Characteristic Delay from Vdat_det to end of charger detection sequence Symbol Min Typ Max Units Conditions TVDPSRC_HICRNT -- See Table 8-2, "Battery Charging Timing Parameters". -- -- -- THUBCONNECT 0 1 10 uS -- Hub Connect Time DS00001691C-page 20 2014-2018 Microchip Technology Inc. USB3803 5.0 CONFIGURATION OPTIONS 5.1 Hub Configuration Options The Hub supports a number of features (some are mutually exclusive), and must be configured to correctly function when attached to a USB host controller. There are two principal ways to configure the hub: by writing to configuration registers using the serial slave port, or by internal default settings. Any configuration registers which are not written by the serial slave retain their default settings. 5.1.1 MULTI/SINGLE TT The USB 2.0 Hub is fully specification compliant to the Universal Serial Bus Specification Revision 2.0 April 27,2000 (12/7/2000 and 5/28/2002 Errata). Please reference Chapter 11 (Hub Specification) for general details regarding Hub operation and functionality. For performance reasons, the Hub provides 1 Transaction Translator (TT) per port (defined as Multi-TT configuration), and each TT has 1512 bytes of periodic buffer space and 272 Bytes of non-periodic buffer space (divided into 4 nonperiodic buffers per TT), for a total of 1784 bytes of buffer space for each Transaction Translator. When configured as a Single-TT Hub (required by USB 2.0 Specification), the Single Transaction Translator has 1512 bytes of periodic buffer space and 272 bytes of non-periodic buffer space (divided into 4 non-periodic buffers per TT), for a total of 1784 bytes of buffer space for the entire Transaction Translator. Each Transaction Translator's buffer is divided as shown in Table 5-1, "Transaction Translator Buffer Chart". TABLE 5-1: 5.1.2 TRANSACTION TRANSLATOR BUFFER CHART Periodic Start-Split Descriptors 256 Bytes Periodic Start-Split Data 752 Bytes Periodic Complete-Split Descriptors 128 Bytes Periodic Complete-Split Data 376 Bytes Non-Periodic Descriptors 16 Bytes Non-Periodic Data 256 Bytes Total for each Transaction Translator 1784 Bytes VBUS DETECT According to Section 7.2.1 of the USB 2.0 Specification, a downstream port can never provide power to its D+ or D- pullup resistors unless the upstream port's VBUS is in the asserted (powered) state. Depending on input tie-offs and values in the configuration registers, the USB3803 may automatically enable the D+ pull-up resistor once it enters the Hub.Connect stage of Hub Mode (after RESET_N and BYPASS_N are both negated high.) To fully adhere to the USB specification, the system should not cause the part to enter Hub.Com Hub Mode until VBUS has been detected on the upstream port and a connection is desired. 5.2 Default Serial Interface Register Memory Map The Serial Interface Registers are used to customize the USB3803 for specific applications. Reserved registers or reserved bits within a defined register should not be written to non-default values or undefined behavior may result. TABLE 5-2: SERIAL INTERFACE REGISTERS Reg Addr R/W 00h R/W 01h R/W 02h R/W 03h R/W 04h R/W 05h R/W 06h R/W 07h R/W Register Name Abbreviation Section VID LSB VIDL 5.3.1, page 23 VID MSB VIDM 5.3.2, page 23 PID LSB PIDL 5.3.3, page 23 PID MSB PIDM 5.3.4, page 23 DID LSB DIDL 5.3.5, page 23 DID MSB DIDM 5.3.6, page 23 Config Data Byte 1 CFG1 5.3.7, page 24 Config Data Byte 2 CFG2 5.3.8, page 25 2014-2018 Microchip Technology Inc. DS00001691C-page 21 USB3803 TABLE 5-2: Reg Addr SERIAL INTERFACE REGISTERS (CONTINUED) R/W Register Name Abbreviation Section 08h R/W Config Data Byte 3 CFG3 5.3.9, page 25 09h R/W Non-Removable Devices NRD 5.3.10, page 26 0Ah R/W Port Disable (Self) PDS 5.3.11, page 26 0Bh R/W Port Disable (Bus) PDB 5.3.12, page 27 0Ch R/W Max Power (Self) MAXPS 5.3.13, page 27 0Dh R/W Max Power (Bus) MAXPB 5.3.14, page 27 0Eh R/W Hub Controller Max Current (Self) HCMCS 5.3.15, page 28 0Fh R/W Hub Controller Max Current (Bus) HCMCB 5.3.16, page 28 10h R/W Power-on Time PWRT 5.3.17, page 28 11h R/W LANG_ID_H LANGIDH 5.3.18, page 28 12h R/W LANG_ID_L LANGIDL 5.3.19, page 28 13h R/W MFR_STR_LEN MFRSL 5.3.20, page 29 14h R/W PRD_STR_LEN PRDSL 5.3.21, page 29 15h R/W SER_STR_LEN SERSL 5.3.22, page 29 16h-53h R/W MFR_STR MANSTR 5.3.23, page 29 54h-91h R/W PROD_STR PRDSTR 5.3.24, page 29 92h-CFh R/W SER_STR SERSTR 5.3.25, page 29 D0h R/W Downstream Battery Charging BC_EN 5.3.26, page 30 D1-E1h R/W Reserved N/A -- 5.3.27, page 30 E2h R/W Upstream Battery Charger Detection BATT_CHG E3-E4h R/W Reserved N/A -- E5h R Port Power Status PRTPWR 5.3.28, page 31 E6h R/W Over Current Sense Control OCS 5.3.29, page 31 E7h R/W Serial Port Interlock Control SP_ILOCK 5.3.30, page 32 E8h R/W Serial Port Interrupt Status INT_STATUS 5.3.31, page 32 E9h R/W Serial Port Interrupt Mask INT_MASK 5.3.32, page 33 EAh R I2C Address 0 I2CADD0 5.3.33, page 34 EBh R I2C Address 1 I2CADD1 5.3.34, page 34 ECh R/W Battery Charger Mode BCHGMODE 5.3.35, page 34 EDh R/W Charger Detect Mask CHGDETMASK 5.3.36, page 34 EEh R/W Configure Portable Hub CFGP 5.3.37, page 35 EFh-F3h R Reserved N/A -- F4h R/W Varisense_Up3 VSNSUP3 5.3.38, page 35 F5h R/W Varisense_21 VSNS21 5.3.39, page 36 F6h R/W Boost_Up3 BSTUP3 5.3.40, page 36 F7h R/W Reserved N/A -- F8h R/W Boost_21 BST21 5.3.41, page 37 F9h R/W Reserved N/A -- FAh R/W Port Swap PRTSP 5.3.42, page 37 FBh R/W Port Remap 12 PRTR12 5.3.43, page 38 FCh R/W Port Remap 34 PRTR34 5.3.44, page 39 FDh R/W Reserved N/A -- FEh R/W Reserved N/A -- FFh R/W I2C Status/Command STCD 5.3.45, page 39 DS00001691C-page 22 2014-2018 Microchip Technology Inc. USB3803 5.3 Serial Interface Register Definitions 5.3.1 REGISTER 00H: VENDOR ID (LSB) - VIDL Default = 0x24h - Corresponds to MCHP Vendor ID. Bit Number Bit Name Description 7:0 VID_LSB Least Significant Byte of the Vendor ID. This is a 16-bit value that uniquely identifies the Vendor of the user device (assigned by USB-Interface Forum). This field is set by the customer using the serial interface options. 5.3.2 REGISTER 01H: VENDOR ID (MSB) - VIDM Default = 0x04h - Corresponds to MCHP Vendor ID. Bit Number Bit Name Description 7:0 VID_MSB Most Significant Byte of the Vendor ID. This is a 16-bit value that uniquely identifies the Vendor of the user device (assigned by USB-Interface Forum). This field is set by the customer using serial interface options. 5.3.3 REGISTER 02H: PRODUCT ID (LSB) - PIDL Default = 0x03h - Corresponds to MCHP USB part number for 3-port device. Bit Number Bit Name 7:0 PID_LSB 5.3.4 Description Least Significant Byte of the Product ID. This is a 16-bit value that the Vendor can assign that uniquely identifies this particular product (assigned by the customer). This field is set by the customer using the serial interface options. REGISTER 03H: PRODUCT ID (MSB) - PIDM Bit Number Bit Name 7:0 PID_MSB 5.3.5 Description Most Significant Byte of the Product ID. This is a 16-bit value that the Vendor can assign that uniquely identifies this particular product (assigned by the customer). This field is set by the customer using the serial interface options. REGISTER 04H: DEVICE ID (LSB) - DIDL Bit Number Bit Name Description 7:0 DID_LSB Least Significant Byte of the Device ID. This is a 16-bit device release number in BCD format (assigned by the customer). This field is set by the customer using the serial interface options. 5.3.6 REGISTER 05H: DEVICE ID (MSB) - DIDM Bit Number Bit Name Description 7:0 DID_MSB Most Significant Byte of the Device ID. This is a 16-bit device release number in BCD format (assigned by the customer). This field is set by the customer using the serial interface options. 2014-2018 Microchip Technology Inc. DS00001691C-page 23 USB3803 5.3.7 REGISTER 06H: CONFIG_BYTE_1 - CFG1 Bit Number 7 Bit Name Description SELF_BUS_PWR Self or Bus Power: Selects between Self- and Bus-Powered operation. The Hub is either Self-Powered (draws less than 2 mA of upstream bus power) or Bus-Powered (limited to a 100 mA maximum of upstream power prior to being configured by the host controller). When configured as a Bus-Powered device, the Microchip Hub consumes less than 100 mA of current prior to being configured. After configuration, the BusPowered Microchip Hub (along with all associated hub circuitry, any embedded devices if part of a compound device, and 100 mA per externally available downstream port) must consume no more than 500 mA of upstream VBUS current. The current consumption is system dependent, and the customer must ensure that the USB 2.0 specifications are not violated. When configured as a Self-Powered device, <1 mA of upstream VBUS current is consumed and all ports are available, with each port being capable of sourcing 500 mA of current. This field is set by the customer using the serial interface options. 0 = Bus-Powered operation 1 = Self-Powered operation 6 Reserved 5 HS_DISABLE Reserved High Speed Disable: Disables the capability to attach as either a High- or Fullspeed device, and forces attachment as Full-speed only (that is, no High-Speed support). 0 = High-/Full-Speed. 1 = Full-Speed-Only (High-Speed disabled!) 4 MTT_ENABLE Multi-TT enable: Enables one transaction translator per port operation. Selects between a mode where only one transaction translator is available for all ports (Single-TT), or each port gets a dedicated transaction translator (Multi-TT). (Note: The host may force Single-TT mode only.) 0 = Single TT for all ports 1 = One TT per port (multiple TT's supported) 3 EOP_DISABLE EOP Disable: Disables EOP generation of EOF1 when in Full-Speed mode. During FS operation only, this permits the Hub to send EOP if no downstream traffic is detected at EOF1. See Section 11.3.1 of the USB 2.0 Specification for additional details. Note: Generation of an EOP at the EOF1 point may prevent a Host controller (operating in FS mode) from placing the USB bus in suspend. 0 = An EOP is generated at the EOF1 point if no traffic is detected. 1 = EOP generation at EOF1 is disabled. (Note: This is normal USB operation.) Note: 2:1 CURRENT_SNS This is a rarely used feature in the PC environment; existing drivers may not have been thoroughly debugged with this feature enabled. It is included because it is a permitted feature in Chapter 11 of the USB specification. Over Current Sense: Selects current sensing on a port-by-port basis, all ports ganged, or none (only for bus-powered hubs). The ability to support current sensing on a port or ganged basis is hardware implementation dependent. 00 = Ganged sensing (all ports together) 01 = Individual port-by-port 1x = Over current sensing not supported (Must only be used with Bus- Powered configurations!) DS00001691C-page 24 2014-2018 Microchip Technology Inc. USB3803 Bit Number Bit Name 0 PORT_PWR Description Port Power Switching: Enables power switching on all ports simultaneously (ganged), or port power is individually switched on and off on a port- by-port basis (individual). The ability to support power enabling on a port or ganged basis is hardware implementation dependent. 0 = Ganged switching (all ports together) 1 = Individual port-by-port switching 5.3.8 REGISTER 07H: CONFIGURATION DATA BYTE 2 - CFG2 Bit Number Bit Name 7:4 Reserved 3 COMPOUND Description Reserved Compound Device: Allows the customer to indicate that the Hub is part of a compound (see the USB Specification for definition) device. The applicable port(s) must also be defined as having a "Non-Removable Device." 0 = No. 1 = Yes, Hub is part of a compound device. 2:0 5.3.9 Reserved Reserved REGISTER 08H: CONFIGURATION DATA BYTE 3 - CFG3 Bit Number Bit Name 7:4 Reserved 3 PRTMAP_EN Description Reserved Port Re-Mapping Enable: Selects the method used by the hub to assign port numbers and disable ports. `0' = Standard Mode. The following registers are used to define which ports are enabled, and the ports are mapped as Port "n" on the hub is reported as Port `n' to the host, unless one of the ports is disabled, then the higher numbered ports are remapped to report contiguous port numbers to the host. Section 5.3.11 Register 0A Section 5.3.12 Register 0B `1' = Port Re-Map mode. The mode enables remapping via the registers defined below. Section 5.3.43 Register FB Section 5.3.44 Register FC 2:1 Reserved 0 STRING_EN Reserved Enables String Descriptor Support `0' = String Support Disabled `1' = String Support Enabled 2014-2018 Microchip Technology Inc. DS00001691C-page 25 USB3803 5.3.10 REGISTER 09H: NON-REMOVABLE DEVICE - NRD Bit Number Bit Name Description 7:0 NR_DEVICE Non-Removable Device: Indicates which port(s) include non-removable devices. `0' = Port is removable. `1' = Port is non- removable. Informs the Host if one of the active physical ports has a permanent device that is undetachable from the Hub. (Note: The device must provide its own descriptor data.) Bit 7= Reserved Bit 6= Reserved Bit 5= Reserved Bit 4= Reserved Bit 3= Port 3 non-removable Bit 2= Port 2 non-removable Bit 1= Port 1 non removable Bit 0= Reserved 5.3.11 REGISTER 0AH: PORT DISABLE FOR SELF POWERED OPERATION - PDS Default = 0x00h Bit Number Bit Name 7:0 PORT_DIS_SP Description Port Disable Self-Powered: Disables 1 or more ports. `0' = Port is available. `1' = Port is disabled. During Self-Powered operation, when PRTMAP_EN = `0', this selects the ports that will be permanently disabled, and are not available to be enabled or enumerated by a Host Controller. The ports can be disabled in any order; the internal logic automatically reports the correct number of enabled ports to the USB Host, and reorders the active ports to ensure proper function. Bit 7= Reserved Bit 6= Reserved Bit 5= Reserved Bit 4= Reserved Bit 3= Port 3 Disable Bit 2= Port 2 Disable Bit 1= Port 1 Disable Bit 0= Reserved DS00001691C-page 26 2014-2018 Microchip Technology Inc. USB3803 5.3.12 REGISTER 0BH: PORT DISABLE FOR BUS POWERED OPERATION - PDB Default = 0x00h Bit Number Bit Name 7:0 PORT_DIS_BP Description Port Disable Bus-Powered: Disables one or more ports. `0' = Port is available. `1' = Port is disabled. During Bus-Powered operation, when PRTMAP_EN = `0', this selects the ports that will be permanently disabled, and are not available to be enabled or enumerated by a Host Controller. The ports can be disabled in any order; the internal logic automatically reports the correct number of enabled ports to the USB Host, and reorders the active ports to ensure proper function. Bit 7= Reserved Bit 6= Reserved Bit 5= Reserved Bit 4= Reserved Bit 3= Port 3 Disable Bit 2= Port 2 Disable Bit 1= Port 1 Disable Bit 0= Reserved 5.3.13 REGISTER 0CH: MAX POWER FOR SELF POWERED OPERATION - MAXPS Default = 0x01h Bit Number Bit Name Description 7:0 MAX_PWR_SP Max Power Self_Powered: Value in 2 mA increments that the Hub consumes from an upstream port (VBUS) when operating as a self-powered hub. This value includes the hub silicon along with the combined power consumption (from VBUS) of all associated circuitry on the board. This value also includes the power consumption of a permanently attached peripheral if the hub is configured as a compound device, and the embedded peripheral reports 0 mA in its descriptors. Example: A value of 8 mA would be written to this register as 0x04h. The USB 2.0 Specification does not permit this value to exceed 100 mA. 5.3.14 REGISTER 0DH: MAX POWER FOR BUS POWERED OPERATION - MAXPB Bit Number Bit Name Description 7:0 MAX_PWR_BP Max Power Bus_Powered: Value in 2 mA increments that the Hub consumes from an upstream port (VBUS) when operating as a bus-powered hub. This value includes the hub silicon along with the combined power consumption (from VBUS) of all associated circuitry on the board. This value also includes the power consumption of a permanently attached peripheral if the hub is configured as a compound device, and the embedded peripheral reports 0 mA in its descriptors. Example: A value of 8 mA would be written to this register as 0x04h. 2014-2018 Microchip Technology Inc. DS00001691C-page 27 USB3803 5.3.15 REGISTER 0EH: HUB CONTROLLER MAX CURRENT FOR SELF POWERED OPERATION HCMCS Default = 0x02h Corresponds to 2 mA. Bit Number Bit Name 7:0 HC_MAX_C_SP Description Hub Controller Max Current Self-Powered: Value in 1 mA increments that the Hub consumes from an upstream port (VBUS) when operating as a self-powered hub. This value includes the hub silicon along with the combined power consumption (from VBUS) of all associated circuitry on the board. This value does NOT include the power consumption of a permanently attached peripheral if the hub is configured as a compound device. Example: A value of 8 mA would be written to this register as 0x08h. Note: 5.3.16 The USB 2.0 Specification does not permit this value to exceed 100 mA. REGISTER 0FH: HUB CONTROLLER MAX CURRENT FOR BUS POWERED OPERATION HCMCB Default = 0x64h- Corresponds to 100 mA. Bit Number Bit Name 7:0 HC_MAX_C_BP 5.3.17 Description Hub Controller Max Current Bus-Powered: Value in 1 mA increments that the Hub consumes from an upstream port (VBUS) when operating as a bus-powered hub. This value includes the hub silicon along with the combined power consumption (from VBUS) of all associated circuitry on the board. This value does NOT include the power consumption of a permanently attached peripheral if the hub is configured as a compound device. Example: A value of 8 mA would be written to this register as 0x08h. REGISTER 10H: POWER-ON TIME - PWRT Bit Number Bit Name Description 7:0 POWER_ON_TIME Power On Time: The length of time that is takes (in 2 ms intervals) from the time the host initiated power-on sequence begins on a port until power is good on that port. System software uses this value to determine how long to wait before accessing a powered-on port. Setting affects only the hub descriptor field "PwrOn2PwrGood" see Section 7.6, "Class-Specific Hub Descriptor," on page 59. Note: 5.3.18 This register represents the time from when a host sends a SetPortFeature(PORT_POWER) request to the time power is supplied through an external switch to a downstream port. It should be set to 0 if no power switch is used - for instance within a compound device. REGISTER 11H: LANGUAGE ID HIGH - LANGIDH Default = 0x04h - Corresponds to US English code 0x0409h Bit Number Bit Name 7:0 LANG_ID_H 5.3.19 Description USB LANGUAGE ID (Upper 8 bits of a 16 bit ID field) REGISTER 12H: LANGUAGE ID LOW - LANGIDL Default = 0x09h - Corresponds to US English code 0x0409h Bit Number Bit Name 7:0 LANG_ID_L DS00001691C-page 28 Description USB LANGUAGE ID (lower 8 bits of a 16 bit ID field) 2014-2018 Microchip Technology Inc. USB3803 5.3.20 REGISTER 13H: MANUFACTURER STRING LENGTH - MFRSL Default = 0x00h Bit Number Bit Name 7:0 MFR_STR_LEN 5.3.21 Description Manufacturer String Length REGISTER 14H: PRODUCT STRING LENGTH - PRDSL Default = 0x00h Bit Number Bit Name 7:0 PRD_STR_LEN 5.3.22 Description Product String Length REGISTER 15H: SERIAL STRING LENGTH - SERSL Default = 0x00h Bit Number Bit Name 7:0 SER_STR_LEN 5.3.23 Description Serial String Length REGISTER 16H-53H: MANUFACTURER STRING - MANSTR Default = 0x00h Bit Number Bit Name 7:0 MFR_STR Description Manufacturer String, UNICODE UTF-16LE per USB 2.0 Specification Note: 5.3.24 The String consists of individual 16 Bit UNICODE UTF-16LE characters. The Characters are stored starting with the LSB at the least significant address and the MSB at the next 8-bit location (subsequent characters must be stored in sequential contiguous address in the same LSB, MSB manner). Please pay careful attention to the Byte ordering or your selected programming tools. REGISTER 54H-91H: PRODUCT STRING - PRDSTR Default = 0x00h Bit Number Bit Name 7:0 PRD_STR Description Product String, UNICODE UTF-16LE per USB 2.0 Specification Note: 5.3.25 The String consists of individual 16 Bit UNICODE UTF-16LE characters. The Characters are stored starting with the LSB at the least significant address and the MSB at the next 8-bit location (subsequent characters must be stored in sequential contiguous address in the same LSB, MSB manner). Please pay careful attention to the Byte ordering or your selected programming tools. REGISTER 92H-CFH: SERIAL STRING - SERSTR Default = 0x00h Bit Number Bit Name 7:0 SER_STR Description Serial String, UNICODE UTF-16LE per USB 2.0 Specification Note: 2014-2018 Microchip Technology Inc. The String consists of individual 16 Bit UNICODE UTF-16LE characters. The Characters are stored starting with the LSB at the least significant address and the MSB at the next 8-bit location (subsequent characters must be stored in sequential contiguous address in the same LSB, MSB manner). Please pay careful attention to the Byte ordering or your selected programming tools. DS00001691C-page 29 USB3803 5.3.26 REGISTER D0: DOWNSTREAM BATTERY CHARGING ENABLE - BC_EN Default = 0x00h Bit Number Bit Name 7:0 BC_EN Description Battery Charging Enable: Enables the battery charging feature for the corresponding downstream port. `0' = Downstream Battery Charging support is not enabled. `1' = Downstream Battery charging support is enabled. Bit 7= Reserved Bit 6= Reserved Bit 5= Reserved Bit 4= Reserved Bit 3= Port 3 Battery Charging Enable Bit 2= Port 2 Battery Charging Enable Bit 1= Port 1 Battery Charging Enable Bit 0= Reserved 5.3.27 REGISTER E2H: UPSTREAM BATTERY CHARGER DETECTION - BATT_CHG Default = 0x02h Bit Number Bit Name 7:5 ChargerType Description Read Only This register indicates the result of the automatic charger detection. Values reported depend on the EnhancedChrgDet setting in Battery Charger Mode Register. If EnhancedChrgDet = 1 000 = Charger Detection is not complete. 001 = DCP - Dedicated Charger Port 010 = CDP - Charging Downstream Port 011 = SDP - Standard Downstream Port 100 = Reserved 101 = Reserved 110 = Reserved 111 = Charger Detection Disabled If EnhancedChrgDet = 0 000 = Charger Detection is not complete. 001 = DCP/CDP - Dedicated Charger or Charging Downstream Port 010 = Reserved 011 = SDP - Standard Downstream Port 100 = Reserved 101 = Reserved 110 = Reserved 111 = Charger Detection Disabled 4 3:2 ChrgDetComplete Read Only Indicates Charger Detection has been run and is completed. This bit is negated when START_BC_DET is asserted high. Reserved DS00001691C-page 30 Reserved 2014-2018 Microchip Technology Inc. USB3803 1 CHG_DET_N Single bit indication of whether an unmasked USB battery charger was detected based on the settings in CHGDETMASK register. 0 = Write: No Effect; Read: Charger detected on last charger detection sequence 1 = Write: Negate bit high; Read: No Charger was detected on last charger detection sequence 0 START_BC_DET Manually Initiates a USB battery charger detection sequence at the time of assertion. This bit must not be set while hub is in operation. Bit is cleared automatically when the manual battery charger detection sequence is completed. 0 = Write: No Effect; Read: Battery Charger Detection Sequence Completed or not run 1 = Write: Start Battery Charger Detection; Read: Battery Charger Detection Sequence is running 5.3.28 REGISTER E5H: PORT POWER STATUS - PRTPWR Default = 0x00h Bit Number Bit Name 7:4 Reserved 3:1 PRTPWR[3:1] Description Reserved Read Only Optional status to SOC indicating that power to the downstream port was enabled by the USB Host for the specified port. Not required for an embedded application. This is a read-only status bit. Actual control over port power is implemented by the USB Host, OCS register, and Downstream Battery Charging logic if enabled. See Section 8.2.2, "Special Behavior of PRTPWR Register Bits," on page 67 for more information. 0 = USB Host has not enabled port to be powered or in downstream battery charging and corresponding OCS bit has been set. 1 = USB Host has enabled port to be powered. 0 5.3.29 Reserved Reserved REGISTER E6H: OVER CURRENT SENSE CONTROL - OCS Default = 0x00h Bit Number Bit Name 7:4 Reserved 3 OCS[3] Description Reserved Note: Software must never write a `1' to these bits. Optional control from SOC on indicating external current monitor indicating an over-current condition on port 3 for HUB status reporting to USB host. Also resets corresponding PRTPWR status register bit. Not required for an embedded application. 0 = No Over Current Condition 1 = Over Current Condition 2:1 OCS[2:1] Optional control from SOC on indicating external current monitor indicating an over-current condition on the specified port for HUB status reporting to USB host. Also resets corresponding PRTPWR status register bit. Not required for an embedded application. 0 = No Over Current Condition 1 = Over Current Condition 0 Reserved 2014-2018 Microchip Technology Inc. Reserved DS00001691C-page 31 USB3803 5.3.30 REGISTER E7H: SERIAL PORT INTERLOCK CONTROL - SP_ILOCK - Corresponds to I2C_ASEL pins & pausing to connect until write from I2C Bit Number Bit Name Description 7:6 Reserved Reserved 3:2 Reserved Reserved 1 connect_n The SOC can utilize this bit to control when the hub attempts to connect to the upstream host. (Alternatively, HUB_CONNECT is used to proceed through Hub Connect Stage, as shown in Figure 4-1.) 1 = Device remains in Hub Mode.Connect Stage indefinitely until bit is cleared by the SOC. 0 = Device transitions to the Hub Mode.Communication Stage after this bit is asserted low by default or through a serial port write. 0 config_n If the SOC intends to update the default configuration using the serial port, this register should be the first register updated by the SOC. In this way, the timing dependency between configuration and device operation can be minimized - the SOC is only required to write to Serial Port Interlock Register within Thubconfig and not all the registers it is attempting to configure. Once all registers have been written for the desired configuration, the SOC must clear this bit to `0' for the device to resume normal operation using the new configuration. It may be desirable for the device to initiate autonomous operation with no SOC intervention at all. This is why the default setting is to allow the device to initiate automatic operation if the SOC does not intervene by writing the interlock register within the allotted configuration time-out. 1 = Device remains in Hub Mode.Configuration Stage indefinitely, and allows SOC to write through the serial port to set any desired configuration. 0 = Device transitions out of Hub.Configuration Stage and into the Hub Mode.Charger Detection Stage immediately after this bit is asserted low through a serial port write. (A default low assertion results in transition after a time-out.) 5.3.31 REGISTER E8H: SERIAL PORT INTERRUPT STATUS - INT_STATUS Default = 0x00h Bit Number Bit Name 7 Interrupt Description Read: 1 = INT_N pin has been asserted low due to unmasked interrupt. 0 = INT_N pin has not been asserted low due to unmasked interrupt. Write: 1 = No Effect - INT_N pin and register retains its current value 0 = Negate INT_N pin high 6:5 Reserved 4 HubSuspInt DS00001691C-page 32 Reserved Read: 1 = Hub has entered USB suspend. 0 = Hub has not entered USB suspend since the last HubSuspInt reset. Write: 1 = No Effect 0 = Negate HubSuspInt status low 2014-2018 Microchip Technology Inc. USB3803 Bit Number Bit Name 3 HubCfgInt Read: 1 = Hub has been configured by USB Host. 0 = Hub has not been configured by USB Host since the last HubConfInt reset. Write: 1 = No Effect 0 = Negate HubConfInt status low 2 PrtPwrInt Read: 1 = Port Power register has been updated. 0 = Port Power register has not been updated since the last PrtPwrInt reset. Write: 1 = No Effect 0 = Negate PrtPwrInt status low 1 ChrgDetInt Read: 1 = CHG_DET_N bit in Charger Detect Register has been asserted low. 0 = CHG_DET_N bit has not been updated since the last ChrgDetInt reset. Write: 1 = No Effect 0 = Negate ChrgDetInt status low 0 ChrgDetCompInt 5.3.32 Description Read: 1 = ChrgDetComplete bit in Charger Detect Register has been asserted high. 0 = ChrgDetComplete bit in Charger Detect Register has not been updated since the last ChrgDetCompInt reset. Write: 1 = No Effect 0 = Negate ChrgDetCompInt status low REGISTER E9H: SERIAL PORT INTERRUPT MASK - INT_MASK Default = 0x00h Bit Number Bit Name 7:5 Reserved 4 HubSuspMask 3 HubCfgMask 1 = INT_N pin is asserted low when Hub configured by USB Host. 0 = INT_N pin is not affected by Hub configuration event. 2 PrtPwrMask 1 = INT_N pin is asserted low when Port Power register has been updated by USB Host. 0 = INT_N pin is not affected by Port Power register. 1 ChrgDetMask 0 ChrgDetCompMask 2014-2018 Microchip Technology Inc. Description Reserved 1 = INT_N pin is asserted low when Hub enters suspend. 0 = INT_N pin is not affected by Hub entering suspend. 1 = INT_N pin is asserted low when CHG_DET_N bit in Charger Detect Register is asserted low. 0 = INT_N pin is not affected by CHG_DET_N. 1 = INT_N pin is asserted low when ChrgDetComplete bit in Charger Detect Register is asserted high. 0 = INT_N pin is not affected by ChrgDetComplete. DS00001691C-page 33 USB3803 REGISTER EAH: I2C ADDRESS 0 - I2CADD0 5.3.33 Default = 0x08h - Corresponds to I2C Address on USB3803 with I2C_ASEL='00'. Bit Number Bit Name 7 Reserved 6:1 I2C_ADDR0 0 Reserved Description Reserved (serial port interface only uses a 7-bit address) Read Only The six most significant bits of I2C Address when I2C_ASEL1 input pin is set to `0' Reserved (LSB of I2C Address controlled by I2C_ASEL0 Pin) REGISTER EBH: I2C ADDRESS 1 - I2CADD1 5.3.34 Default = 0x28h - Corresponds to I2C Address on USB3803 with I2C_ASEL =`10'. Bit Number Bit Name 7 Reserved 6:1 I2C_ADDR1 0 Reserved 5.3.35 Description Reserved (serial port interface only uses a 7-bit address) Read Only The six most significant bits of I2C Address when I2C_ASEL1 input pin is set to `1' Reserved (LSB of I2C Address controlled by I2C_ASEL0 Pin) REGISTER ECH: BATTERY CHARGER MODE - BCHGMODE Default = 0x14h - Corresponds to Charge detection enabled for SDP, CDP, and DCP Bit Number Bit Name 7:6 Reserved Reserved 5 Reserved Reserved 4 EnableChrgDet 3 Reserved 2 If enabled, the charger detection routine is executed automatically once HUB.ChgDet stage is entered or during Hub.WaitRefClk stage if no reference clock is available. Reserved EnhancedChrgDet When enabled, the charger detection routine reverses Vdat SRC to differentiate between a CDP and a DCP. 1:0 5.3.36 Description Reserved Reserved REGISTER EDH: CHARGER DETECT MASK - CHGDETMASK Default = 0x0Fh - Any enabled charger detected causing interrupt status to toggle. Bit Number Bit Name 7:4 Reserved Reserved 3 Reserved Reserved 2 Reserved Reserved 1 CDPMask 1 = BATT_CHG.CHG_DET_N is asserted low when a CDP Charger is detected. 0 = BATT_CHG.CHG_DET_N is not affected by detection of a CDP Charger. This mask bit should only be enabled if EnhancedChrgDet in is asserted in Section 5.3.35, "Register ECh: Battery Charger Mode - BCHGMODE" because without it, the charger detection is unable to identify a CDP. 0 DCPMask 1 = BATT_CHG.CHG_DET_N is asserted low when a DCP Charger is detected. 0 = BATT_CHG.CHG_DET_N is not affected by detection of a DCP Charger. DS00001691C-page 34 Description 2014-2018 Microchip Technology Inc. USB3803 5.3.37 REGISTER EEH: CONFIGURE PORTABLE HUB - CFGP Bit Number Bit Name 7 ClkSusp (Read/Write) 1 = Forces device to run internal clock even during USB suspend (causes the device to violate USB suspend current limit - intended for test or self-powered applications which require the use of serial port during USB session.) 0 = Allows device to gate off its internal clocks during suspend mode to meet USB suspend current requirements. 6 IntSusp (Read/Write) 1 = INT_N pin function is a level-sensitive USB suspend interrupt indication. Allows system to adjust current consumption to comply with USB specification limits when hub is in the USB suspend state. 0 = INT_N pin function retains event sensitive role of a general serial port interrupt. See Section 3.3.4, "Interrupt," on page 13 for more information. 5:4 CfgTout (Read Only) Specifies time-out value for allowing SOC to configure the device. Corresponds to the Thubconfig parameter. See Table 4-2, "Timing Parameters for Hub Stages," on page 19. 3 Reserved Reserved 2:0 Reserved Reserved 5.3.38 Description REGISTER F4H: VARISENSE_UP3 - VSNSUP3 Default = 0x00h Bit Number Bit Name 7 Reserved 6:4 UP_SQUELCH 3 Reserved 2:0 DN3_SQUELCH 2014-2018 Microchip Technology Inc. Description Reserved These two bits control the Squelch setting of the upstream PHY. `000' = Nominal value `001' = 90% of Nominal value `010' = 80% of Nominal value `011' = 70% of Nominal value `100' = 60% of Nominal value `101' = 50% of Nominal value `110' = 120% of Nominal value `111' = 110% of Nominal value Reserved These two bits control the Squelch setting of the downstream port 3. `000' = Nominal value `001' = 90% of Nominal value `010' = 80% of Nominal value `011' = 70% of Nominal value `100' = 60% of Nominal value `101' = 50% of Nominal value `110' = 120% of Nominal value `111' = 110% of Nominal value DS00001691C-page 35 USB3803 5.3.39 REGISTER F5H: VARISENSE_21 - VSNS21 Default = 0x00h Bit Number Bit Name 7 Reserved 6:4 DN2_SQUELCH 3 Reserved 2:0 DN1_SQUELCH 5.3.40 Description Reserved These two bits control the Squelch setting of the downstream port 2. `000' = Nominal value `001' = 90% of Nominal value `010' = 80% of Nominal value `011' = 70% of Nominal value `100' = 60% of Nominal value `101' = 50% of Nominal value `110' = 120% of Nominal value `111' = 110% of Nominal value Reserved These three bits control the Squelch setting of the downstream port 1. `000' = Nominal value `001' = 90% of Nominal value `010' = 80% of Nominal value `011' = 70% of Nominal value `100' = 60% of Nominal value `101' = 50% of Nominal value `110' = 120% of Nominal value `111' = 110% of Nominal value REGISTER F6H: BOOST_UP3 - BSTUP3 Default = 0x30h Bit Number Bit Name 7 Reserved 6:4 Description Reserved BOOST_IOUT_A USB electrical signaling drive strength Boost Bit for Upstream Port `A'. Boosts USB High Speed Current. 3'b000: Nominal 3'b001: -5% 3'b010: +10% 3'b011: +5% 3'b100: +20% 3'b101: +15% 3'b110: +30% 3'b111: +25% 3 Reserved 2:0 BOOST_IOUT_3 Reserved USB electrical signaling drive strength Boost Bit for Downstream Port `3'. Boosts USB High Speed Current. 3'b000: Nominal 3'b001: -5% 3'b010: +10% 3'b011: +5% 3'b100: +20% 3'b101: +15% 3'b110: +30% 3'b111: +25% DS00001691C-page 36 2014-2018 Microchip Technology Inc. USB3803 5.3.41 REGISTER F8H: BOOST_21 - BST21 Default = 0x00h Bit Number Bit Name 7 Reserved 6:4 BOOST_IOUT_2 Description Reserved USB electrical signaling drive strength Boost Bit for Downstream Port `2'. Boosts USB High Speed Current. 3'b000: Nominal 3'b001: -5% 3'b010: +10% 3'b011: +5% 3'b100: +20% 3'b101: +15% 3'b110: +30% 3'b111: +25% 3 Reserved 2:0 BOOST_IOUT_1 Reserved USB electrical signaling drive strength Boost Bit for Downstream Port `1'. Boosts USB High Speed Current. 3'b000: Nominal 3'b001: -5% 3'b010: +10% 3'b011: +5% 3'b100: +20% 3'b101: +15% 3'b110: +30% 3'b111: +25% 5.3.42 REGISTER FAH: PORT SWAP - PRTSP Default = 0x00h Bit Number Bit Name 7:0 PRTSP Description Port Swap: Swaps the Upstream and Downstream USB DP and DM Pins for ease of board routing to devices and connectors. `0' = USB D+ functionality is associated with the DP pin and D- functionality is associated with the DM pin. The setting affects only HUB mode - it has no impact in BYPASS mode. `1' = USB D+ functionality is associated with the DM pin and D- functionality is associated with the DP pin. The setting affects only HUB mode - it has no impact in BYPASS mode. Bit 7= Reserved Bit 6= Reserved Bit 5= Reserved Bit 4= Reserved Bit 3= Port 3 DP/DM Swap. Bit 2= Port 2 DP/DM Swap. Bit 1= Port 1 DP/DM Swap. Bit 0= Upstream Port DP/DM Swap 2014-2018 Microchip Technology Inc. DS00001691C-page 37 USB3803 5.3.43 REGISTER FBH: PORT REMAP 12 - PRTR12 Default = 0x21h - Physical Port is mapped to the corresponding logical port. Bit Number Bit Name 7:0 PRTR12 Description Port remap register for ports 1 & 2. When a hub is enumerated by a USB Host Controller, the hub is only permitted to report how many ports it has; the hub is not permitted to select a numerical range or assignment. The Host Controller numbers the downstream ports of the hub starting with the number `1', up to the number of ports that the hub reported having. The host's port number is referred to as "Logical Port Number" and the physical port on the hub is the Physical Port Number". When remapping mode is enabled (see PRTMAP_EN in Section 5.3.9), the hub's downstream port numbers can be remapped to different logical port numbers (assigned by the host.) Note: Bit [7:4] = The customer must ensure that Contiguous Logical Port Numbers are used, starting from #1 up to the maximum number of enabled ports. This ensures that the hub's ports are numbered in accordance with the way a Host communicates with the ports. `0000' Physical Port 2 is Disabled. `0001' Physical Port 2 is mapped to Logical Port 1. `0010' Physical Port 2 is mapped to Logical Port 2. `0011' Physical Port 2 is mapped to Logical Port 3. `0100' Reserved, defaults to `0000' value. `0101' to Reserved, defaults to `0000' value. `1111' Bit [3:0] = `0000' Physical Port 1 is Disabled. `0001' Physical Port 1 is mapped to Logical Port 1. `0010' Physical Port 1 is mapped to Logical Port 2. `0011' Physical Port 1 is mapped to Logical Port 3. `0100' Reserved, defaults to `0000' value. `0101' to Reserved, defaults to `0000' value. `1111' DS00001691C-page 38 2014-2018 Microchip Technology Inc. USB3803 5.3.44 REGISTER FCH: PORT REMAP 34 - PRTR34 Default = 0x03h - Physical port is mapped to corresponding logical port. Bit Number Bit Name 7:0 PRTR34 Description Port remap register for ports 3. When a hub is enumerated by a USB Host Controller, the hub is only permitted to report how many ports it has; the hub is not permitted to select a numerical range or assignment. The Host Controller numbers the downstream ports of the hub starting with the number `1', up to the number of ports that the hub reported having. The host's port number is referred to as "Logical Port Number" and the physical port on the hub is the Physical Port Number". When remapping mode is enabled (see PRTMAP_EN in Section 5.3.9), the hub's downstream port numbers can be remapped to different logical port numbers (assigned by the host). Note: Bit [7:4] = Note: The customer must ensure that Contiguous Logical Port Numbers are used, starting from #1 up to the maximum number of enabled ports. This ensures that the hub's ports are numbered in accordance with the way a Host communicates with the ports. `0000' Reserved - software must not write `1' to any of these bits. `0001' to Reserved, defaults to `0000' value. `1111' Bit [3:0] = `0000' Physical Port 3 is Disabled. `0001' Physical Port 3 is mapped to Logical Port 1. `0010' Physical Port 3 is mapped to Logical Port 2. `0011' Physical Port 3 is mapped to Logical Port 3. `0100' Reserved, defaults to `0000' value, Physical Port 3 is mapped to Logical Port 4. `0101' to Reserved, defaults to `0000' value `1111' 5.3.45 REGISTER FFH: STATUS/COMMAND - STCD Default = 0x00h Bit Number Bit Name 7:2 Reserved 1 RESET Description Reserved Note: Software must never write a `1' to these bits. Reset the Serial Interface and internal memory registers in address range 00hE1h and EFh-FFh back to RESET_N assertion default settings. Note: During this reset, this bit is automatically cleared to its default value of 0. 0 = Normal Run/Idle State 1 = Forces a reset of the registers to their default state 0 CONFIG_PROTECT Protect the Configuration 0 = Serial slave interface is active. 1 = The internal configuration memory (address range 00h-E1h and EFh-FFh) is "write-protected" to prevent unintentional data corruption. Note: 2014-2018 Microchip Technology Inc. This bit is write once and is only cleared by assertion of the external RESET_N pin. DS00001691C-page 39 USB3803 6.0 SERIAL SLAVE INTERFACE 6.1 Overview The serial slave interface on USB3803 is implemented as I2C. It is a standard I2C slave interface that operates at the standard (100 Kbps), fast (400 Kbps), and the fast mode plus (1 Mbps) modes. The USB3803 I2C slave interface supports four 7-bit slave addresses. Address selection is done through the values set on the I2C_ASEL1 and I2C_ASEL0 pins during the HUB.INIT stage as shown in Table 6-1, "Serial Slave Address Selection". REFCLK must be running for I2C to operate. The register map is outlined in section Section 5.3. Two I2C Slave Base Addresses is programmed into ROM and selected with the I2C_ASEL1 pin. The LSB of the serial slave address is selected with the I2C_ASEL0 pin. Table 6-1, "Serial Slave Address Selection" shows resulting I2C address based on I2C_ASEL pin settings and default ROM programmed register values. In the table, bits a6-1 represent bits programmed into register I2CADD0 and bits b6-1 represent bits programmed into register I2CADD1. Detailed definition can be found in Section 5.3.33, "Register EAh: I2C Address 0 - I2CADD0," on page 34 and Section 5.3.34, "Register EBh: I2C Address 1 - I2CADD1," on page 34. Table 6-2 shows a specific example of the resulting addresses with two specific examples of default control register values. The addresses are shown both in binary and hexadecimal format in parenthesis for clarity. TABLE 6-1: SERIAL SLAVE ADDRESS SELECTION I2C_ASEL1 I2C_ASEL0 I2CADD0 Register Value I2CADD1 Register Value Functional I2C Address Result 0 0 0a6a5a4a3a2a10 don't care a6a5a4a3a2a10 0 1 0a6a5a4a3a2a10 don't care a6a5a4a3a2a11 1 0 don't care 0b6b5b4b3b2b10 b6b5b4b3b2b10 1 1 don't care 0b6b5b4b3b2b10 b6b5b4b3b2b11 TABLE 6-2: EXAMPLE SERIAL SLAVE ADDRESSES I2C_ASEL1 I2C_ASEL0 Example I2CADD0 Register Value Example I2CADD1 Register Value Functional I2C Address Result 0 0 0001000 (0x08) 00101000 (0x28) 0001000 (0x08) 0 1 0001000 (0x08) 00101000 (0x28) 0001001 (0x09) 1 0 0001000 (0x08) 00101000 (0x28) 0101000 (0x28) 1 1 0001000 (0x08) 00101000 (0x28) 0101001 (0x29) The interrupt pin INT_N is used to communicate status changes on selected events which are mapped into the Serial Port Interrupt Status Register. The SOC can mask events to not cause the interrupt pin to transition by updating the Serial Port Interrupt Mask Register--the status events are still captured in the status register even if the interrupt pin is not asserted. The serial port has limited speed and latency capability so events mapped into the serial ports and its interrupt are not expected to be latency critical. INT_N is asserted low whenever an unmasked bit is set in the Serial Port Interrupt Status Register. SOC must update the Serial Port Interrupt Status Register to negate the interrupt high. DS00001691C-page 40 2014-2018 Microchip Technology Inc. USB3803 Interconnecting the USB3803 to an I2C Master 6.2 FIGURE 6-1: I2C CONNECTIONS SOC VDD SCL SCL SDA I2C MASTER CONTROLLER Note: 6.3 6.3.1 SDA INT INT USB3803 The largest pull-up values that meet the customer application should be selected to minimize power consumption. Pull-up values must also have low enough resistance to support the desired I2C operating speed with the expected total capacitance in the application. Typical applications are expected to use pull-up values between 220 and 2.7 k for operation at 1 MHz on SCL and SDA. Larger pull-up resistors may be acceptable for operation at 400 KHz or 100 KHz. I2C Message Format SEQUENTIAL ACCESS WRITES The I2C interface supports sequential writing of the register address space of the USB3803. This mode is useful for configuring contiguous blocks of registers. Please see section on SOC interface for address definitions. Figure 6-2 shows the format of the sequential write operation. Where color is visible in the figure, blue indicates signaling from the I2C master, and gray indicates signaling from the USB3803 slave: FIGURE 6-2: S I2C SEQUENTIAL ACCESS WRITE FORMAT 7-Bit Slave Address 0 A xxxxxxxx Register Address (bits 7-0) A nnnnnnnn Data value for XXXXXX A ... nnnnnnnn A P Data value for XXXXXX + y In this operation, following the 7-bit slave address, 8-bit register address is written indicating the start address for the sequential write operation. Every data access after that is a data write to a data register where the register address increments after each access and ACK from the slave must occur. Sequential write access is terminated by a Stop condition. 2014-2018 Microchip Technology Inc. DS00001691C-page 41 USB3803 6.3.2 SEQUENTIAL ACCESS READS 2 The I C interface supports direct reading of the USB3803 registers. To read one or more register addresses, the starting address must be set by using a write sequence followed by a read. The read register interface supports auto-increment mode. The master should send a NACK instead of an ACK when the last byte has been transferred. In this operation, following the 7-bit slave address, 8-bit register address is written indicating the start address for sequential read operation to be followed. In the read sequence, every data access is a data read from a data register where the register address increments after each access. Write sequence can end with optional Stop (P). If so, the Read sequence must start with a Start (S); otherwise it must start with Repeated Start (Sr). Figure 6-3 shows the format of the read operation. Where color is visible in the figure, blue and gold indicate signaling from the I2C master, and gray indicates signaling from the USB3803 slave. FIGURE 6-3: SEQUENTIAL ACCESS READ FORMAT O p t io n a l. I f p r e s e n t , N e x t a c c e s s m u s t h a v e S ta r t( S ) , o th e r w is e R e p e a t S ta r t ( S r ) S 7 - B it S la v e A d d r e s s 0 A x x x x x x x x A P R e g is te r A d d r e s s ( b its 7 - 0 ) If p r e v io u s w r ite s e ttin g u p R e g is te r a d d r e s s e n d e d w ith a S to p ( P ) , o th e r w is e it w ill b e R e p e a te d S ta r t ( S r ) S 7 - B it S la v e A d d r e s s 1 ACK n n n n n n n n ACK 6.3.3 n n n n n n n n ACK R e g is te r v a lu e fo r x x x x x x x x + 1 R e g is te r v a lu e fo r x x x x x x x x ... n n n n n n n n NACK P R e g is te r v a lu e fo r x x x x x x x x + y I2C TIMING Figure 6-4 is the timing diagram and timing specifications for the different I2C modes that the USB3803 supports. FIGURE 6-4: I2C TIMING DIAGRAM I2C_DATA AB_DATA tBUF tLOW tR tHD;STA tF I2AB_CLK C_CLK tHD;STA DS00001691C-page 42 tHD;DAT tHIGH tSU;DAT tSU;STA tSU;STO 2014-2018 Microchip Technology Inc. USB3803 TABLE 6-3: I2C TIMING SPECIFICATIONS Symbol Parameter fSCL Standard-Mode Fast-Mode Fast-Mode Plus Unit Min Max Min Max Min Max SCL clock frequency 0 100 0 400 0 1000 KHz tHD;STA Hold time START condition 4 -- 0.6 -- 0.26 -- s tLOW LOW period of the SCL clock 4.7 -- 1.3 -- 0.5 -- s tHIGH HIGH period of the SCL clock 4 -- 0.6 -- 0.26 -- s tSU;STA Set-up time for a repeated START condition 4.7 -- 0.6 -- 0.26 -- s tHD;DAT DATA hold time 0 -- 0 -- 0 -- ns tSU;DAT DATA set-up time 250 -- 100 -- 50 -- ns tR Rise time of both SDA and SCL signals -- 1000 -- 300 -- 120 ns tF Fall time of both SCL and SDA lines -- 300 -- 300 -- 120 ns tSU;STO Set-up time for a STOP condition 4 -- 0.6 -- 0.26 -- s tBUF Bus free time between a STOP and START condition 4.7 -- 1.3 -- 0.5 -- s 2014-2018 Microchip Technology Inc. DS00001691C-page 43 USB3803 7.0 USB DESCRIPTORS A customer can indirectly affect which descriptors are reported via one of two methods. The two methods are: Internal Default ROM Configuration and direct load through the serial port interface. The Microchip Hub does not electrically attach to the USB until after it has loaded valid data for all user-defined descriptor fields (either through Internal Default ROM, or through the serial port). 7.1 USB Bus Reset In response to the upstream port signaling a reset to the Hub, the Hub: * * * * * * * does not propagate the upstream USB reset to downstream devices. sets the default address to 0. sets the configuration to: Unconfigured. negates PRTPWR[3:1] register for all downstream ports. clears all TT buffers. moves device from suspended to active (if suspended). complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the reset sequence. The Host then configures the Hub and the Hub's downstream port devices in accordance with the USB Specification. 7.2 Hub Attached as a Full-Speed Device, (High-Speed Disabled) When High-Speed capability is disabled via customer configuration options, the Hub can only attach as a Full-Speed device, and the following descriptor information applies. 7.2.1 STANDARD DEVICE DESCRIPTOR The following table provides the descriptor values for Full-Speed operation. TABLE 7-1: Offset DEVICE DESCRIPTOR (FULL-SPEED) Field Size Value Description 0 Length 1 12h Size of this Descriptor 1 DescriptorType 1 01h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h Class code assigned by USB-IF for Hubs 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 00h Protocol code 7 MaxPacketSize0 1 40h 64-byte packet size 8 Vendor 2 user/ default Vendor ID, customer value defined in ROM or serial port load 10 Product 2 user/ default Product ID, customer value defined in ROM or serial port load 12 Device 2 user/ default Device ID, customer value defined in ROM or serial port load 14 Manufacturer 1 xxh If STRING_EN = 0, Optional string is not supported and xx = 00. If STRING_EN = 1, String support is enabled and xx = 01. 15 Product 1 yyh If STRING_EN = 0, Optional string is not supported and yy = 00. If STRING_EN = 1, String support is enabled and yy = 02. 16 SerialNumber 1 zzh If STRING_EN = 0, Optional string is not supported and zz = 00. If STRING_EN = 1, String support is enabled and zz = 03. 17 NumConfigurations 1 01h Supports 1 configuration DS00001691C-page 44 USB Specification Release Number 2014-2018 Microchip Technology Inc. USB3803 7.2.2 CONFIGURATION DESCRIPTORS The following table provides the configuration descriptors for Full-Speed operation. TABLE 7-2: CONFIGURATION DESCRIPTOR (FULL-SPEED) Offset Field Size Value 0 Length 1 09h 1 DescriptorType 1 02h 2 TotalLength 2 yyyyh Description Size of this Descriptor Configuration Descriptor Type Total combined length of all descriptors for this configuration (configuration, interface, endpoint, and class- or vendor-specific). yyyyh = 0019h 4 NumInterfaces 1 01h Number of interfaces supported by this configuration 5 ConfigurationValue 1 01H Value to use as an argument to the SetConfiguration() request to select this configuration 6 Configuration 1 00h Index of string descriptor describing this configuration (string not supported) 7 Attributes 1 user/ signal Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability, and also reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wake-up. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. 8 MaxPower 1 user Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if the hub is part of a compound device), and is in 2-mA increments. The Hub supports Self-Powered and BusPowered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) is used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode, and determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases, the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. 7.2.3 INTERFACE DESCRIPTOR (FULL-SPEED) The following table provides the interface descriptor values for Full-Speed operation. TABLE 7-3: Offset INTERFACE DESCRIPTOR (FULL-SPEED) Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 2014-2018 Microchip Technology Inc. DS00001691C-page 45 USB3803 TABLE 7-3: INTERFACE DESCRIPTOR (FULL-SPEED) (CONTINUED) Offset Field Size Value 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 00h Protocol code 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.2.4 Description ENDPOINT DESCRIPTOR The following table provides the endpoint descriptor values for Full-Speed operation. TABLE 7-4: ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, FULL-SPEED) Offset Field Size Value 0 Length 1 07h Description Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 FFh 7.3 Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) Hub Attached as a Full-Speed Device, But is High-Speed Capable When attached as a Full-Speed device (most likely due to being connected to a Host Controller or Operating System that is not High-Speed capable), the following descriptor information applies. 7.3.1 STANDARD DEVICE DESCRIPTOR The following table provides the descriptor values for Full-Speed operation. TABLE 7-5: Offset DEVICE DESCRIPTOR (FULL-SPEED) Field Size Value Description 0 Length 1 12h Size of this Descriptor 1 DescriptorType 1 01h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 00h Protocol code 7 MaxPacketSize0 1 40h 8 Vendor 2 user/ default Vendor ID, customer value defined in ROM or serial port load 10 Product 2 user/ default Product ID, customer value defined in ROM or serial port load 12 Device 2 user/ default Device ID, customer value defined in ROM or serial port load 14 Manufacturer 1 xxh If STRING_EN = 0, Optional string is not supported and xx = 00. If STRING_EN = 1, String support is enabled and xx = 01. 15 Product 1 yyh If STRING_EN = 0, Optional string is not supported and yy = 00. If STRING_EN = 1, String support is enabled and yy = 02. DS00001691C-page 46 USB Specification Release Number Class code assigned by USB-IF for Hubs 64-byte packet size 2014-2018 Microchip Technology Inc. USB3803 TABLE 7-5: DEVICE DESCRIPTOR (FULL-SPEED) (CONTINUED) Offset Field Size Value 16 SerialNumber 1 zzh If STRING_EN = 0, Optional string is not supported and zz = 00. If STRING_EN = 1, String support is enabled and zz = 03. 17 NumConfigurations 1 01h Supports 1 configuration 7.3.2 Description DEVICE QUALIFIER DESCRIPTOR The following table provides the device qualifier values for High-Speed operation. TABLE 7-6: Offset DEVICE QUALIFIER (HIGH-SPEED) Field Size Value Description 0 Length 1 0Ah Size of this Descriptor 1 DescriptorType 1 06h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h Class code assigned by USB-IF for Hubs 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 user Protocol code (01h if customer selects Single-TT, 02h if customer selects Multiple-TT) 7 MaxPacketSize0 1 40h 64-byte packet size for the other speed 8 NumConfigurations 1 01h Supports 1 other speed configuration 9 Reserved 1 00h Reserved 7.3.3 USB Specification Release Number CONFIGURATION DESCRIPTORS The following table provides the configuration descriptors for Full-Speed operation. TABLE 7-7: Offset CONFIGURATION DESCRIPTOR (FULL-SPEED) Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 02h Configuration Descriptor Type 2 TotalLength 2 yyyyh Total combined length of all descriptors for this configuration (configuration, interface, endpoint, and class- or vendor-specific). yyyyh = 0019h 4 NumInterfaces 1 01h Number of interfaces supported by this configuration 5 ConfigurationValue 1 01H Value to use as an argument to the SetConfiguration() request to select this configuration 6 Configuration 1 00h Index of string descriptor describing this configuration (string not supported) 7 Attributes 1 user/ signal Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability and reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wakeup. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. 2014-2018 Microchip Technology Inc. DS00001691C-page 47 USB3803 TABLE 7-7: CONFIGURATION DESCRIPTOR (FULL-SPEED) (CONTINUED) Offset Field Size Value Description 8 MaxPower 1 user Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if hub is part of a compound device), and is in 2-mA increments. The Hub supports Self-Powered and BusPowered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) are used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. 7.3.4 INTERFACE DESCRIPTOR (FULL-SPEED) The following table provides the interface descriptor values for Full-Speed operation. TABLE 7-8: INTERFACE DESCRIPTOR (FULL-SPEED) Offset Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 00h Protocol code 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.3.5 ENDPOINT DESCRIPTOR The following table provides the endpoint descriptor values for Full-Speed operation. TABLE 7-9: Offset ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, FULL-SPEED) Field Size Value Description 0 Length 1 07h Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 FFh DS00001691C-page 48 Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) 2014-2018 Microchip Technology Inc. USB3803 7.3.6 OTHER-SPEED CONFIGURATION DESCRIPTOR The following table provides the other-speed configuration descriptor values for High-Speed operation. TABLE 7-10: OTHER-SPEED CONFIGURATION DESCRIPTOR (HIGH-SPEED) Offset Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 07h Other-Speed Configuration Descriptor Type 2 TotalLength 2 zzzzh Total combined length of all descriptors for this configuration zzzz = 0019h if MTT_ENABLE = 0 zzzz = 0029h if MTT_ENABLE = 1 4 NumInterfaces 1 01h Number of interfaces supported by this configuration 5 ConfigurationValue 1 01H Value to use to select configuration 6 Configuration 1 00h Index of String Descriptor describing this configuration (string not supported) 7 Attributes 1 user/ signal Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability and reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wakeup. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. 8 MaxPower 1 user Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if hub is part of a compound device) and is in 2-mA increments. The Hub supports Self-Powered and Bus-Powered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) is used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases, the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. 7.3.7 INTERFACE DESCRIPTOR (SINGLE-TT) The following table provides the interface descriptor values for Single-TT, High-Speed operation. TABLE 7-11: INTERFACE DESCRIPTOR (HIGH-SPEED, SINGLE-TT) Offset Field Size Value 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 2014-2018 Microchip Technology Inc. Description DS00001691C-page 49 USB3803 TABLE 7-11: INTERFACE DESCRIPTOR (HIGH-SPEED, SINGLE-TT) (CONTINUED) Offset Field Size Value 7 InterfaceProtocol 1 xxh Protocol xx = 00h if bNumInterfaces = 01h (Single-TT) xx = 01h if bNumInterfaces = 02h (Multi-TT) 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.3.8 Description ENDPOINT DESCRIPTOR (SINGLE-TT) The following table provides the endpoint descriptor values for Single-TT operation. TABLE 7-12: Offset ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, SINGLE-TT) Field Size Value 0 Length 1 07h Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB Device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 0Ch 7.3.9 Description Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) INTERFACE DESCRIPTOR (MULTI-TT) The following table provides interface descriptor values for High-Speed, Multi-TT operation. Note: This is only available if Multi-TT is reported in the other Other-Speed Configuration Descriptor. TABLE 7-13: INTERFACE DESCRIPTOR (HIGH-SPEED, MULTI-TT) Offset Field Size Value 0 Length 1 09h Description Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 01h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 02h Protocol code 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.3.10 ENDPOINT DESCRIPTOR (MULTI-TT) The following table provides endpoint descriptor values for Multi-TT operation. Note: This is only available if Multi-TT is reported in the Other-Speed Configuration Descriptor. TABLE 7-14: Offset ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, MULTI-TT) Field Size Value 0 Length 1 07h Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device DS00001691C-page 50 Description 2014-2018 Microchip Technology Inc. USB3803 TABLE 7-14: ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, MULTI-TT) Offset Field Size Value 3 Attributes 1 03h 4 MaxPacketSize 2 0001h 6 Interval 1 0Ch 7.4 Description Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) Hub Attached as a High-Speed Device (Customer-Configured for Single-TT Support Only) The following tables provide descriptor information for Customer-Configured Single-TT-Only Hubs attached for use with High-Speed devices. 7.4.1 STANDARD DEVICE DESCRIPTOR The following table provides device descriptor values for High-Speed operation. TABLE 7-15: DEVICE DESCRIPTOR Offset Field Size Value 0 Length 1 12h Size of this Descriptor 1 DescriptorType 1 01h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 01h Protocol Code 7 MaxPacketSize0 1 40h 64-byte packet size 8 Vendor 2 user/ default Vendor ID, Customer value defined in ROM or serial port load 10 Product 2 user/ default Product ID, Customer value defined in ROM or serial port load 12 Device 2 user/ default Device ID, Customer value defined in ROM or serial port load 14 Manufacturer 1 xxh If STRING_EN = 0, Optional string is not supported and xx = 00. If STRING_EN = 1, String support is enabled and xx = 01. 15 Product 1 yyh If STRING_EN = 0, Optional string is not supported and yy = 00. If STRING_EN = 1, String support is enabled and yy = 02. 16 SerialNumber 1 zzh If STRING_EN = 0, Optional string is not supported and zz = 00. If STRING_EN = 1, String support is enabled and zz = 03. 17 NumConfigurations 1 01h Supports 1 configuration 7.4.2 Description USB Specification Release Number Class code assigned by USB-IF for Hubs DEVICE QUALIFIER DESCRIPTOR The following table provides device qualifier values for Full-Speed operation. TABLE 7-16: Offset DEVICE QUALIFIER (FULL-SPEED) Field Size Value Description 0 Length 1 0Ah Size of this Descriptor 1 DescriptorType 1 06h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h 2014-2018 Microchip Technology Inc. USB Specification Release Number Class code assigned by USB-IF for Hubs DS00001691C-page 51 USB3803 TABLE 7-16: DEVICE QUALIFIER (FULL-SPEED) (CONTINUED) Offset Field Size Value 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 00h Protocol code 7 MaxPacketSize0 1 40h 64-byte packet size for the other speed 8 NumConfigurations 1 01h Supports 1 other speed configuration 9 Reserved 1 00h Reserved 7.4.3 Description CONFIGURATION DESCRIPTOR The following table provides configuration descriptor values for High-Speed, Single-TT-Only operation. TABLE 7-17: CONFIGURATION DESCRIPTOR (HIGH-SPEED, SINGLE-TT ONLY) Offset Field Size Value 0 Length 1 09h 1 DescriptorType 1 02h 2 TotalLength 2 yyyyh Description Size of this Descriptor Configuration Descriptor Type Total combined length of all descriptors for this configuration (configuration, interface, endpoint, and class- or vendor-specific). yyyyh = 0019h 4 NumInterfaces 1 01h Number of interfaces supported by this configuration 5 ConfigurationValue 1 01H Value to use as an argument to the SetConfiguration() request to select this configuration 6 Configuration 1 00h Index of string descriptor describing this configuration (string not supported) 7 Attributes 1 user/ signal Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability and reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wakeup. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. 8 MaxPower 1 user Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if hub is part of a compound device) and is in 2mA increments. The Hub supports Self-Powered and BusPowered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) is used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases, the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. 7.4.4 INTERFACE DESCRIPTOR (SINGLE-TT) The following table provides interface descriptor values for High-Speed, Single-TT operation. DS00001691C-page 52 2014-2018 Microchip Technology Inc. USB3803 TABLE 7-18: INTERFACE DESCRIPTOR (HIGH-SPEED, SINGLE-TT) Offset Field Size Value 0 Length 1 09h Description Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 00h Single-TT 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.4.5 ENDPOINT DESCRIPTOR (SINGLE-TT) The following table provides endpoint descriptor values for Single-TT operation. TABLE 7-19: Offset ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, SINGLE-TT) Field Size Value Description 0 Length 1 07h Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 0Ch 7.4.6 Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) OTHER-SPEED CONFIGURATION DESCRIPTOR The following table provides other-speed configuration descriptor values for Full-Speed operation. TABLE 7-20: OTHER-SPEED CONFIGURATION DESCRIPTOR (FULL-SPEED) Offset Field Size Value 0 Length 1 09h 1 DescriptorType 1 07h 2 TotalLength 2 yyyyh 4 NumInterfaces 1 01h Number of Interfaces supported by this configuration 5 ConfigurationValue 1 01H Value to use to select configuration 6 Configuration 1 00h Index of String Descriptor describing this configuration (string not supported) 7 Attributes 1 user/ signal Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability and reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wakeup. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. 2014-2018 Microchip Technology Inc. Description Size of this Descriptor Other-Speed Configuration Descriptor Type Total combined length of all descriptors for this configuration yyyyh = 0019h DS00001691C-page 53 USB3803 TABLE 7-20: OTHER-SPEED CONFIGURATION DESCRIPTOR (FULL-SPEED) (CONTINUED) Offset Field Size Value Description 8 MaxPower 1 user Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if hub is part of a compound device) and is in 2-mA increments. The Hub supports Self-Powered and Bus-Powered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) are used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases, the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. 7.4.7 INTERFACE DESCRIPTOR (FULL-SPEED) The following table provides interface description values for Full-Speed operation. TABLE 7-21: INTERFACE DESCRIPTOR (FULL-SPEED) Offset Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 00h Protocol code 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.4.8 ENDPOINT DESCRIPTOR (FULL-SPEED) The following table provides endpoint descriptor values for Full-Speed operation. TABLE 7-22: Offset ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, FULL-SPEED) Field Size Value Description 0 Length 1 07h Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 FFh DS00001691C-page 54 Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) 2014-2018 Microchip Technology Inc. USB3803 7.5 Hub Attached as a High-Speed Device (Customer-Configured as Multi-TT Capable) The following tables provide descriptor information for Customer-Configured Multi-TT High-Speed devices. 7.5.1 STANDARD DEVICE DESCRIPTOR The following table provides device descriptor values for High-Speed operation. TABLE 7-23: Offset DEVICE DESCRIPTOR (HIGH-SPEED) Field Size Value Description 0 Length 1 12 Size of this Descriptor 1 DescriptorType 1 01h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h USB Specification Release Number 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 02h Protocol code (Multi-TTs) 7 MaxPacketSize0 1 40h 64-byte packet size 8 Vendor 2 user Vendor ID, Customer value defined in ROM or serial port load 10 Product 2 user Product ID, Customer value defined in ROM or serial port load Class code assigned by USB-IF for Hubs 12 Device 2 user Device ID, Customer value defined in ROM or serial port load 14 Manufacturer 1 xxh If STRING_EN = 0, Optional string is not supported and xx = 00. If STRING_EN = 1, String support is enabled and xx = 01. 15 Product 1 yyh If STRING_EN = 0, Optional string is not supported and yy = 00. If STRING_EN = 1, String support is enabled and yy = 02. 16 SerialNumber 1 zzh If STRING_EN = 0, Optional string is not supported and zz = 00. If STRING_EN = 1, String support is enabled and zz = 03. 17 NumConfigurations 1 01h Supports 1 configuration 7.5.2 DEVICE QUALIFIER DESCRIPTOR The following table provides device qualifier values for Full-Speed operation. TABLE 7-24: Offset DEVICE QUALIFIER (FULL-SPEED) Field Size Value Description 0 Length 1 0Ah Size of this Descriptor 1 DescriptorType 1 06h Device Descriptor Type 2 USB 2 0200h 4 DeviceClass 1 09h Class code assigned by USB-IF for Hubs USB Specification Release Number 5 DeviceSubClass 1 00h Class code assigned by USB-IF for Hubs 6 DeviceProtocol 1 00h Protocol code 7 MaxPacketSize0 1 40h 64-byte packet size for the other speed 8 NumConfigurations 1 01h Supports 1 other speed configuration 9 Reserved 1 00h Reserved 2014-2018 Microchip Technology Inc. DS00001691C-page 55 USB3803 7.5.3 CONFIGURATION DESCRIPTOR The following table provides configuration descriptor values for High-Speed operation. TABLE 7-25: CONFIGURATION DESCRIPTOR (HIGH-SPEED) Offset Field Size Value 0 Length 1 09h 1 DescriptorType 1 02h 2 TotalLength 2 yyyyh 4 NumInterfaces 1 01h Number of Interface supported by this configuration 5 ConfigurationValue 1 01H Value to use as an argument to the SetConfiguration() request to select this configuration 6 Configuration 1 00h Index of string descriptor describing this configuration (String not supported) 7 Attributes 1 user/ signal 8 MaxPower 1 user 7.5.4 Description Size of this Descriptor Configuration Descriptor Type Total combined length of all descriptors for this configuration (configuration, interface, endpoint, and class- or vendor-specific) yyyyh = 0029h Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability, and also reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wake-up. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if hub is part of a compound device) and is in 2-mA increments. The Hub supports Self-Powered and BusPowered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) is used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases, the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. INTERFACE DESCRIPTOR (SINGLE-TT) The following table provides interface descriptor values for High-Speed Single-TT operation. TABLE 7-26: Offset INTERFACE DESCRIPTOR (HIGH-SPEED, SINGLE-TT) Field Size Value 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) DS00001691C-page 56 Description 2014-2018 Microchip Technology Inc. USB3803 TABLE 7-26: INTERFACE DESCRIPTOR (HIGH-SPEED, SINGLE-TT) (CONTINUED) Offset Field Size Value 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 01h Single-TT 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.5.5 Description ENDPOINT DESCRIPTOR (SINGLE-TT) The following table provides endpoint descriptor values for Single-TT operation. TABLE 7-27: ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, SINGLE-TT) Offset Field Size Value 0 Length 1 07h Description Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 0Ch 7.5.6 Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) INTERFACE DESCRIPTOR (MULTI-TT) The following table provides interface descriptor values for High-Speed Multi-TT operation. TABLE 7-28: INTERFACE DESCRIPTOR (MULTI-TT, HIGH-SPEED) Offset Field Size Value 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 01h Value used to select this alternate setting for the interface 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 02h Multiple-TTs 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.5.7 Description ENDPOINT DESCRIPTOR (MULTI-TT) The following table provides endpoint descriptor values for Multi-TT operation. TABLE 7-29: ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, MULTI-TT) Offset Field Size Value 0 Length 1 07h Description Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 2014-2018 Microchip Technology Inc. Maximum packet size for this endpoint DS00001691C-page 57 USB3803 TABLE 7-29: ENDPOINT DESCRIPTOR (FOR STATUS CHANGE ENDPOINT, MULTI-TT) Offset Field Size Value 6 Interval 1 0Ch 7.5.8 Description Interval for polling endpoint for data transfers (Maximum Possible) OTHER-SPEED CONFIGURATION DESCRIPTOR The following table provides other-speed configuration descriptor values for Full-Speed operation. TABLE 7-30: Offset OTHER-SPEED CONFIGURATION DESCRIPTOR (FULL-SPEED) Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 07h Other-Speed Configuration Descriptor Type 2 TotalLength 2 yyyyh 4 NumInterfaces 1 01h Number of interfaced described by this configuration 5 ConfigurationValue 1 01h Value to use to select configuration 6 Configuration 1 00h Index of String Descriptor describing this configuration (string not supported) 7 Attributes 1 user/ signal Configuration characteristics: Communicates the capabilities of the hub regarding Remote Wake-up capability, and also reports the self-power status. In all cases, the value reported to the host always indicates that the hub supports Remote Wake-up. The value reported to the host is dependent on the SELF_BUS_PWR bit (CONFIG_BYTE_1) = A0h for Bus-Powered (SELF_BUS_PWR = 0) = E0h for Self-Powered (SELF_BUS_PWR = 1) All other values are reserved. 8 MaxPower 1 user Maximum Power Consumption of the Hub from VBUS when fully operational. This value includes all support circuitry associated with the hub (including an attached "embedded" peripheral if hub is part of a compound device) and is in 2-mA increments. The Hub supports Self-Powered and Bus-Powered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) is used to determine which of the values below are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `MAX_PWR_BP' if SELF_BUS_PWR = `0' `MAX_PWR_SP' if SELF_BUS_PWR = `1' In all cases, the reported value is sourced from the MAX POWER data field (for Self or Bus power) that is loaded by Internal Default or serial port configuration. 7.5.9 Total combined length of all descriptors for this configuration yyyyh = 0019h INTERFACE DESCRIPTOR (FULL-SPEED) The following table provides interface descriptor values for Full-Speed operation. TABLE 7-31: INTERFACE DESCRIPTOR (FULL-SPEED) Offset Field Size Value 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 04h Interface Descriptor Type 2 InterfaceNumber 1 00h Number of this interface 3 AlternateSetting 1 00h Value used to select this alternate setting for the interface DS00001691C-page 58 Description 2014-2018 Microchip Technology Inc. USB3803 TABLE 7-31: INTERFACE DESCRIPTOR (FULL-SPEED) (CONTINUED) Offset Field Size Value 4 NumEndpoints 1 01h Number of endpoints used by this interface (not including endpoint 0) 5 InterfaceClass 1 09h Hub class code 6 InterfaceSubclass 1 00h Subclass code 7 InterfaceProtocol 1 00h Protocol code 8 Interface 1 00h Index of the string descriptor describing this interface (strings not supported) 7.5.10 Description ENDPOINT DESCRIPTOR (FULL-SPEED) The following table provides endpoint descriptor values for Full-Speed operation. TABLE 7-32: Offset ENDPOINT DESCRIPTOR (FULL-SPEED) Field Size Value Description 0 Length 1 07h Size of this Descriptor 1 DescriptorType 1 05h Endpoint Descriptor Type 2 EndpointAddress 1 81h The address of the endpoint on the USB device 3 Attributes 1 03h Describes the endpoint's attributes (interrupt only, no synchronization, data endpoint) 4 MaxPacketSize 2 0001h 6 Interval 1 FFh 7.6 Maximum packet size for this endpoint Interval for polling endpoint for data transfers (Maximum Possible) Class-Specific Hub Descriptor The following table provides class-specific Hub descriptor values for Full-Speed and High-Speed operation. Note: The Hub must respond to Hub Class Descriptor type 29h (the USB 1.1 and USB 2.0 value) and 00h (the USB 1.0 value). TABLE 7-33: Offset CLASS-SPECIFIC HUB DESCRIPTOR (FULL-SPEED & HIGH-SPEED) Field Size Value Description 0 Length 1 09h Size of this Descriptor 1 DescriptorType 1 29h Hub Descriptor Type 2014-2018 Microchip Technology Inc. DS00001691C-page 59 USB3803 TABLE 7-33: CLASS-SPECIFIC HUB DESCRIPTOR (FULL-SPEED & HIGH-SPEED) (CONTINUED) Offset Field Size Value 2 NbrPorts 1 user Description Number of downstream facing ports this Hub supports. See Section 11.23.2.1 of the USB Specification for additional details regarding the use of this field. The value reported is implementation dependent and is derived from the value defined during Internal Default or serial port load. The PORT_DIS_SP field defines the ports that are permanently disabled when in Self-Powered operation, and the PORT_DIS_BP field defines the ports that are permanently disabled when in Bus-Powered operation. Internal logic subtracts the number of ports that are disabled, from the total number available (which is 3), and reports the remainder as the number of ports supported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The field used to determine the value that is reported to the host is: `PORT_DIS_BP' if SELF_BUS_PWR = `0' `PORT_DIS_SP' if SELF_BUS_PWR = `1' 3 HubCharacteristics 2 user Defines the support for Logical power switching mode, Compound Device support, Over-current protection, TT Think Time, and Port Indicator support, See Section 11.23.2.1 in the USB Specification for additional details regarding the use of this field. The values delivered to a host are all derived from values defined during Internal Default or serial port load, and are assigned as follows: D1:0 = `00'b if PORT_PWR = `0' D1:0 = `01'b if PORT_PWR = `1' D2 = `COMPOUND' D4:3 = `CURRENT_SNS' D6:5 = `00'b for 8FS (max) bit times of TT think time D7 = hardcoded to `0' (no Port Indicator Support) D15:8 = `00000000'b 5 PwrOn2PwrGood DS00001691C-page 60 1 user Time (in 2-ms intervals) from the time the power-on sequence begins on a port until the power is good on that port. See Section 11.23.2.1 in the USB Specification. The value contained in the `POWER_ON_TIME' field is directly reported to the host and is determined by Internal Default or serial port load. 2014-2018 Microchip Technology Inc. USB3803 TABLE 7-33: CLASS-SPECIFIC HUB DESCRIPTOR (FULL-SPEED & HIGH-SPEED) (CONTINUED) Offset Field Size Value 6 HubContrCurrent 1 user Description Maximum current requirements of the Hub Controller electronics in 1-mA increments. See Section 11.23.2.1 in the USB Specification for additional details on the use of this field. This field reports the maximum current that only the hub consumes from upstream VBUS when fully operational. This value includes all support circuitry associated with the hub (but does not include the current consumption of any permanently attached peripherals if the hub is part of a compound device). The Hub supports Self-Powered and Bus-Powered operation. The SELF_BUS_PWR bit (CONFIG_BYTE_1) defined in Section 5.3.7, "Register 06h: CONFIG_BYTE_1 - CFG1," on page 24 is used to determine which of the stored values are reported. The value reported to the host must coincide with the current operating mode and is determined by the following rules. The value that is reported to the host is: `HC_MAX_C_BP' if SELF_BUS_PWR = `0' `HC_MAX_C_SP' if SELF_BUS_PWR = `1' `HC_MAX_C_BP/SP' are defined in Section 5.3.15, and Section 5.3.16, "Register 0Fh: Hub Controller Max Current For Bus Powered Operation - HCMCB," on page 28. In all cases, the reported value is sourced from the Hub Controller Max Current data field (for Self or Bus power) that is determined by Internal Default or serial port load. 7 DeviceRemovable 1 user Indicates if port has a removable device attached. See Section 11.23.2.1 in the USB Specification. The value contained in the `NR_DEVICE' field is directly reported to the host and is determined by Internal Default or serial port load. 8 PortPwrCtrlMask 1 FFh Field for backwards USB 1.0 compatibility 2014-2018 Microchip Technology Inc. DS00001691C-page 61 USB3803 7.7 String Descriptors The USB3803 supports a 30 Character Manufacturer String Descriptor, a 30 Character Product String, and a 30 Character Serial String. 7.7.1 STRING DESCRIPTOR ZERO (SPECIFIES LANGUAGES SUPPORTED) TABLE 7-34: Offset STRING DESCRIPTOR ZERO Field Size Value Description 0 Length 1 04h Size of this Descriptor 1 DescriptorType 1 03h String Descriptor Type 2 LANGID 2 xxxxh 7.7.2 Language ID code from LANG_ID_H and LANG_ID_L registers STRING DESCRIPTOR 1 (MANUFACTURER STRING) TABLE 7-35: STRING DESCRIPTOR 1, MANUFACTURER STRING Offset Field Size Value Description 0 Length 1 yyh Size of this Descriptor The yy value is created by taking the MFR_STR_LEN{bytes} + 2{bytes}. 1 DescriptorType 1 03h String Descriptor Type. 2 String N string 7.7.3 Manufacturer String The string is located in the MFR_STR register, and the size (N) is held in the MFR_STR_LEN register. STRING DESCRIPTOR 2 (PRODUCT STRING) TABLE 7-36: STRING DESCRIPTOR 2, PRODUCT STRING Offset Field Size Value Description 0 Length 1 yyh Size of this Descriptor The yy value is created by taking the PRD_STR_LEN{bytes} + 2{bytes}. 1 DescriptorType 1 03h 2 String N string 7.7.4 String Descriptor Type Product String The string is located in the PROD_STR register, and the size (N) is held in the PRD_STR_LEN register. STRING DESCRIPTOR 3 (SERIAL STRING) TABLE 7-37: STRING DESCRIPTOR 3, SERIAL STRING Offset Field Size Value Description 0 Length 1 yyh Size of this Descriptor The yy value is created by taking the SER_STR_LEN{bytes} + 2{bytes}. 1 DescriptorType 1 03h 2 String N string DS00001691C-page 62 String Descriptor Type Serial String The string is located in the SER_STR register, and the size (N) is held in the SER_STR_LEN register. 2014-2018 Microchip Technology Inc. USB3803 8.0 BATTERY CHARGING 8.1 Upstream Battery Charger Detection Battery Charger Detection is available on the upstream facing port. The detection sequence is intended to identify chargers which conform to the Chinese battery charger specification, chargers which conform to the USB-IF Battery Charger Specification 1.1. DP and DM are high impedance when the charger detection block is disabled. The device includes the circuitry required to implement battery charging detection using the Battery Charging Specification. The device automatically performs charger detection upon entering the Hub.ChgDet stage in Hub Mode. The device includes a state machine to provide the detection of the USB chargers listed in the table below. The type of charger detected is returned in the ChargerType bits in the Battery Charger Detection Register. TABLE 8-1: CHARGERS COMPATIBLE WITH UPSTREAM DETECTION USB ATTACH TYPE DP/DM PROFILE CHARGERTYPE DCP (Dedicated Charging Port) Shorted < 200ohm 001 CDP (Charging Downstream Port) VDP reflected to VDM 010 (EnhancedChrgDet = 1) SDP (Standard Downstream Port) USB Host or downstream hub port 15Kohm pull-down on DP and DM 011 The device automatically begins a charger detection when Hub.ChgDet stage in Hub Mode is entered. The device provides feedback to the system through the serial port registers and the INT_Npin. The following sections detail the sequence followed for battery charger detection. 2014-2018 Microchip Technology Inc. DS00001691C-page 63 USB3803 8.1.1 CHARGER DETECTION CIRCUITRY The charger detection circuitry shown in Figure 8-1 is used to detect the type charger attached to the upstream USB connector. FIGURE 8-1: UPSTREAM BATTERY CHARGER DETECTION CIRCUITRY ~~ fs_dp fs_dm VDD33_BYP en IDP_SRC DP To USB Con. VDAT_SRC + - en DP/DM selection DM VDAT_REF RPD_DM RPD_DP To USB Con. Charger State Machine I2C Register Control VdatDet en en IDAT_SINK en en ~~ DS00001691C-page 64 2014-2018 Microchip Technology Inc. USB3803 8.1.2 AUTOMATIC CHARGER DETECTION The flowchart in Figure 8-2 details the charger detection sequence and the ability of the configuration settings to control it. FIGURE 8-2: FLOWCHART FOR BATTERY CHARGING DETECTION SEQUENCE BEGIN WHEN BATT_CHG. START_BC_DET = 1 OR Enter Hub.ChgDet Stage =0 BCHGMODE. Enable ChrgDet? =1 Enable IDP_SRC on DP and R PD_DM Wait for fs_dp=0 OR TDCD_TOUT Enable VDAT_SRC on DP & IDAT_SINK on DM for TVDPSRC_ON =0 VdatDet ? =1 BCHGMODE. Enhanced ChrgDet? =0 Enable V DAT_SRC on DM & IDAT_SINK on DP for TVDPSRC_ON =1 =1 VdatDet ? =0 SDP Detected BATT_CHG. ChargerType=011 DCP Detected BATT_CHG. ChargerType=001 =0 CDP Detected BATT_CHG. ChargerType=010 Wait T VDPSRC_HICRNT =1 BATT_CHG. ChrgDetComplete =1 END Auto-Clear BATT_CHG. START_BC_DET = 0 OR Exit Hub.ChgDet Stage 2014-2018 Microchip Technology Inc. DS00001691C-page 65 USB3803 The diagram in Figure 8-3 illustrates automatic Battery Charging detection when enhanced battery charger detection is enabled. A USB Battery Charging 1.1 charger is discovered and the charger detection sequence continues to differentiate between a Dedicated Charging Port and a Charging Downstream Port. FIGURE 8-3: ENHANCED CHARGER DETECTION TIMING - BC1.1 RESET_N T_CdStart IDP_SRC, RPD_DM T_DCD_TOUT `1' if connected to DCP DP `0' if connected to CDP DM VDAT_SRC (DP) VDAT_SRC (DM) T_VDPSRC_ON T_VDPSRC_ON Device Drives DM with VDAT_SRC, monitors DP BC1.1 Charger Detected Device Drives DP with VDAT_SRC, monitors DM Data Contact Detect - Device holds DP low Device Initialization Device in Standby Charger Detection Complete - Status Reported `001' if connected to DCP `100' or `101' `010' if connected to CDP ChrgDetComple te ChargerType 8.1.3 BATTERY CHARGER TIMING Table 8-2 specifies timing parameters for the battery charging sequence. TABLE 8-2: BATTERY CHARGING TIMING PARAMETERS Characteristic Symbol Min Typ Max Units Charger Detection Start Time delay TCDSTART -- Thubinit + Thubconfig -- mS See Table 4-2 Data Contact Detect Time-out TDCD_TOUT 199 200 204 mS HUB.ChgDet stage on pll DS00001691C-page 66 Conditions 2014-2018 Microchip Technology Inc. USB3803 TABLE 8-2: BATTERY CHARGING TIMING PARAMETERS (CONTINUED) Characteristic Symbol Min Typ Max Units Vdat_src and Idat_sink Enable Time TVDPSRC_ON 79 80 84 mS HUB.ChgDet stage on pll Delay from Vdat_det to end of detection sequence TVDPSRC_HICRNT 79 80 83 mS HUB.ChgDet stage on pll Charger Detection Exit time when disabled TVLO_RELEASE 49 50 55 mS HUB.ChgDet stage on pll 8.2 Conditions Downstream Port Battery Charging Support The USB3803 can configure any of the downstream ports to support battery charger handshake. The Hub's role in downstream battery charging is to provide an acknowledge to a device's query as to if the hub system supports USB battery charging. The hub silicon does not provide any current or power FETs or any such thing to actually charge the device. Those components would need to be provided as external components in the final Hub board design. FIGURE 8-4: BATTERY CHARGING EXTERNAL POWER SUPPLY USB3803 (Serial Mapped Register) INT DC Power SCL SDA SOC PRTPWR[n] VBUS[n] If the final Hub board design provides an external supply capable of supplying current per the battery charging specification, the hub can be configured to indicate the presence of such a supply to the device. This indication is on a perport basis, that is, the board can configure two ports to support battery charging (through high current power FET's) and leave the other port as a standard USB port. 8.2.1 USB BATTERY CHARGING In the terminology of the USB battery charging specification, if the port is configured to support battery charging, the downstream port is a "Charging Host Port". All AC/DC characteristics comply with only this type. If the port is not configured to support battery charging, the port is a "Standard Host Port". AC/DC characteristics comply with the USB 2.0 specification. A downstream port only behaves as a "Charging Host Port" or a "Standard Host Port". The port does not switch between "Charging Host Port" or Standard Host Port" at any time after initial power-up and configuration. 8.2.2 SPECIAL BEHAVIOR OF PRTPWR REGISTER BITS The USB Battery charging specification does not address system issues. It only defines a low level protocol for a device and host (or hub) to communicate a simple question and optional answer. Device queries "Do you support battery charging?" Host answers "Yes, I do support battery charging" or does not answer at all. There is no negative response. (A lack of response is taken as a negative response.) When ports are configured for downstream battery charging, the corresponding PRTPWR setting is controlled by downstream battery charging logic instead of the normal hub logic. 2014-2018 Microchip Technology Inc. DS00001691C-page 67 USB3803 PRTPWR setting asserts after initial hub customer configuration (Internal default/Serial register writes). PRTPWR remains asserted and under the control of the battery charge logic until one of two events. 1. 2. An overcurrent is detected on the corresponding OCS_N bit. In this case, PRTPWR setting negates. The only way to re-enable the PRTPWR bit from this state is to RESET the USB3803. The hub enters Hub.Communication stage, connects on its upstream port, and is enumerated by a USB host. In this case, control over the PRTPWR setting reverts back to the hub logic inside the USB3803 and the normal USB behavior applies. That is, the host must enable PRTPWR. Since the enumeration process for a hub sets the PORT_POWER feature for all downstream ports, this information can be used to switch control over the PRTPWR register between the battery charge logic and the hub logic. * When the Hub PORT_POWER feature is `1', the hub logic controls the PRTPWR bits. * When the Hub PORT_POWER feature is `0', the battery charging logic controls the PRTPWR bits. No matter which controller is controlling the PRTPWR register bits, an overcurrent event always negates PRTPWR register bit. 8.2.3 BATTERY CHARGING CONFIGURATION Configuration of ports to support battery charging is done through serial port configuration load. Register D0: Downstream Battery Charging Enable - BC_EN is allocated for Battery Charging support. The register, starting from Bit 1, enables Battery charging for each downstream port when asserted. Bit 1 represents port 1 and so on. Each port with battery charging enabled asserts the corresponding PRTPWR register bit. DS00001691C-page 68 2014-2018 Microchip Technology Inc. USB3803 9.0 INTEGRATED POWER REGULATORS 9.1 Overview The integrated power regulators are defined to provide significant flexibility to the system in providing power the device. Several different configurations are allowed to align the power structure to supplies available in the system. 9.1.1 3.3V REGULATOR The device has an integrated regulator to convert from VBAT to 3.3V. 9.1.2 1.2V REGULATOR The device has an integrated regulator to convert from a variable voltage input on VDD_CORE_REG to 1.2V. The 1.2V regulator shall be tolerant to the presence of low voltage (~0V) on the VDD_CORE_REG pin to support system power solutions where a 1.8V supply is not always present in low power states. The 1.2V regulator shall support an input voltage range consistent with a 1.8V input to reduce power consumption in systems which provide multiple power supply levels. In addition, the 1.2V regulator shall support an input voltage up to 3.3V for systems which provide only a single power supply. The device supports operation where the 3.3V regulator output can drive the 1.2V regulator input such that VBAT is the only required supply. 9.2 Power Configurations The USB3803 support operation with no back current when power is connected in each of the following configurations. 9.2.1 9.2.1.1 SINGLE SUPPLY CONFIGURATIONS VBAT Only VBAT should be tied to the VBAT system supply. VDD33_BYP regulator output and VDD_CORE_REG should be tied together on the board. In this configuration, the 3.3V regulator is active, and the 3.3V to 1.2V regulator is active. 9.2.1.2 3.3V Only VBAT should be tied to the 3.3V system supply. VDD33_BYP and VDD_CORE_REG pins should be tied together on the board. In this configuration, the 3.3V regulator operates in dropout. The 1.2V regulator is active. 9.2.2 9.2.2.1 DOUBLE SUPPLY CONFIGURATIONS VBAT + 1.8V VBAT should be tied to the VBAT system supply. VDD33_BYP regulator output requires external capacitor. VDD_CORE_REG should be tied to the 1.8V system supply. In this configuration, the 3.3V regulator and the 1.2V regulator are active. 9.2.2.2 3.3V + 1.8V VBAT should be tied to the 3.3V system supply. VDD33_BYP should be connected to the 3.3V external capacitor. VDD_CORE_REG should be tied to the 1.8V system supply. In this configuration, the 3.3V regulator operates in dropout. The 1.2V regulator is active. 9.3 Regulator Control Signals The regulators are controlled by the RESET_N and BYPASS_N signals. When RESET_N is brought high, the VDD33 regulator turns on. When RESET_N is brought low, the VDD33 regulator turns off. When BYPASS_N is brought high, the VDD12 regulator turns on. When BYPASS_N is brought low, the VDD12 regulator turns off. BYPASS_N should not be driven high if RESET_N is driven low. 2014-2018 Microchip Technology Inc. DS00001691C-page 69 USB3803 10.0 SPECIFICATIONS 10.1 Absolute Maximum Ratings TABLE 10-1: ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Min Max Units VBAT VDD_CORE_REG VBAT -- -0.5 5.5 V VDD_CORE_REG -- -0.5 4.6 V VDD33_BYP -- -0.5 4.6 V VDD33 Maximum IO Voltage to Ground VIO -- -0.5 4.6 V VMAX_REFCLK -- -0.5 3.6 V Voltage on USB+ and USB- pins VMAX_USB -- -0.5 5.5 V Operating Temperature TMAX_OP Commercial 0 70 C Operating Temperature TMAX_OP Industrial -40 85 C Storage Temperature TMAX_STG -- -55 150 C REFCLK Voltage Note: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. When powering this device from laboratory or system power supplies, it is important that the Absolute Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the DC output. When this possibility exists, it is suggested that a clamp circuit be used. 10.2 Recommended Operating Conditions TABLE 10-2: RECOMMENDED OPERATING CONDITIONS Parameter Symbol Conditions Min Typ Max Units VBAT -- 2.9 -- 5.5 V VDD_CORE_REG VDD_CORE_REG Note 1 1.6 1.8 2.0 V VDD_CORE_REG VDD_CORE_REG Note 2 3.0 3.3 3.6 V VI -- -0.3 1.8 3.6 V V VBAT Input Voltage on I/O Pins Input Voltage (DP, DM) VIUSB -- -0.3 -- 5.5 Voltage on REFCLK VREFCLK -- -0.3 -- 3.6 V Ambient Temperature TA Commercial 0 -- 70 C 85 C Ambient Temperature TA Industrial -40 -- Note 1: Applicable only when VDD_CORE_REG is supplied from external power supply. 2: Applicable only when VDD_CORE_REG is tied to VDD33_BYP. 10.3 Operating Current The following conditions are assumed unless otherwise specified: VBAT = 3.0 to 5.5V; VDD_CORE = 1.6 to 2.0V; VSS = 0V; TA = 0C to +70C (Commercial), -40C to +85C (Industrial) DS00001691C-page 70 2014-2018 Microchip Technology Inc. USB3803 TABLE 10-3: OPERATING CURRENT (DUAL SUPPLY) Parameter High Speed USB Operation Symbol Conditions Min Typ Max Units IVBAT(HS) Active USB Transfer RESET_N = 1 BYPASS_N =1 3 Downstream Ports Active 67 69 72 mA 29 31 35 mA 46 49 50 mA 26 28 31 mA 24 25 28 mA 22 24 28 mA 24 25 27 mA 24 25 28 mA ICORE(HS) High Speed USB Operation IVBAT(HS) ICORE(HS) High Speed USB Operation IVBAT(HS) ICORE(HS) High Speed USB Operation IVBAT(HS) ICORE(HS) Unconfigured (High Speed) IVBAT(UNCONF) ICORE(UNCONF) Hub Bypass IVBAT(BYP) ICORE(BYP) STANDBY Mode IVBAT(STDBY) ICORE(STDBY) Hub Bypass IVBAT(BYP) ICORE(BYP) STANDBY Mode IVBAT(STDBY) ICORE(STDBY) SUSPEND Mode IVBAT(SPND) Active USB Transfer RESET_N = 1 BYPASS_N =1 2 Downstream Ports Active, 1 Port Disabled Active USB Transfer RESET_N = 1 BYPASS_N =1 1Downstream Ports Active, 2 Ports Disabled High Speed Idle RESET_N = 1 BYPASS_N =1 3 Downstream Ports Enabled, No USB Data Transfer (Idle) RESET_N = 1 BYPASS_N= 1 12 13 14 mA 17 18 22 mA RESET_N = 1 BYPASS_N = 0 Commercial Temp 26 36 60 uA 0 0 3 uA RESET_N = 0 Commercial Temp 0 0.4 3.5 A 0 0 2 A RESET_N = 1 BYPASS_N = 0 Industrial Temp 26 36 60 uA 0 0 10 uA RESET_N = 0 Industrial Temp 0 0.4 3.5 A 0 0 9 A USB Suspend 205 230 290 A 35 65 385 A ICORE(SPND) The following conditions are assumed unless otherwise specified: VBAT = 3.0 to 5.5V; VSS = 0V; TA = 0C to +70C (Commercial), -40C to +85C (Industrial) 2014-2018 Microchip Technology Inc. DS00001691C-page 71 USB3803 TABLE 10-4: OPERATING CURRENT (SINGLE SUPPLY) Symbol Conditions Min Typ Max Units High Speed USB Operation Parameter IVBAT(HS) Active USB Transfer RESET_N = 1 BYPASS_N =1 3 Downstream Ports Active 95 102 105 mA High Speed USB Operation IVBAT(HS) Active USB Transfer RESET_N = 1 BYPASS_N =1 2 Downstream Ports Active, 1 Port Disabled 73 77 82 mA High Speed USB Operation IVBAT(HS) Active USB Transfer RESET_N = 1 BYPASS_N =1 1 Downstream Port Active, 2 Ports Disabled 47 50 53 mA High Speed USB Operation IVBAT(HS) High Speed Idle RESET_N = 1 BYPASS_N =1 3 Downstream Ports Enabled, No USB Data Transfer (Idle) 49 52 55 mA Unconfigured (High Speed) IVBAT(UNCONF) RESET_N = 1 BYPASS_N= 1 32 34 37 mA Hub Bypass IVBAT(BYP) RESET_N = 1 BYPASS_N = 0 Commercial Temp 26 28 68 uA IVBAT(STDBY) RESET_N = 0 Commercial Temp 0 0.6 2.4 A IVBAT(BYP) RESET_N = 1 BYPASS_N = 0 Industrial Temp 25 28 75 uA STANDBY Mode IVBAT(STDBY) RESET_N = 0 Industrial Temp 0 0.6 4.1 A SUSPEND Mode IVBAT(SPND) USB Suspend 220 300 600 A STANDBY Mode Hub Bypass DS00001691C-page 72 2014-2018 Microchip Technology Inc. USB3803 10.4 DC Characteristics: Digital I/O Pins Note: TA = -40C to 85C TABLE 10-5: DIGITAL I/O CHARACTERISTICS Parameter Symbol Conditions Min Typ Max Units Low-Level Input Voltage VIL Note 3 -0.3 -- 0.42 V Low-Level Input Voltage VIL Note 4 -0.3 -- 0.34 V High-Level Input Voltage VIH -- 1.25 -- VDD33_BYP + 0.3V V Low-Level Input Voltage REFCLK VIL_REF -- -0.3 -- 0.5 V High-Level Input Voltage REFCLK VIH_REF -- 1.4 -- -- V Clock Input Capacitance REFCLK CIN -- -- -- 2 pF Low-Level Output Voltage VOL @ IOL=12mA sink current -- -- 0.4 V Pin Capacitance Cpin -- -- 2 20 pF IO -- 12 20 24 mA Output Current Capability Note: 3: For I2C interface using pull-ups to less than 2.1V. 4: For I2C interface using pull-ups to greater than 2.1V. 10.5 DC Characteristics: Analog I/O Pins TABLE 10-6: DC CHARACTERISTICS: ANALOG I/O PINS (DP/DM) Parameter Symbol Conditions Min Typ Max Units Differential Receiver Input Sensitivity VDIFS | V(DP) - V(DM) | 0.2 -- -- V Differential Receiver Common-Mode Voltage VCMFS -- 0.8 -- 2.5 V Single-Ended Receiver Low Level Input Voltage VILSE -- -- -- 0.8 V Single-Ended Receiver High Level Input Voltage VIHSE -- 2.0 -- -- V Single-Ended Receiver Hysteresis VHYSSE -- 0.050 -- 0.150 V Low Level Output Voltage VFSOL Pull-up resistor on DP; RL = 1.5k to VDD33_BYP -- -- 0.3 V High Level Output Voltage VFSOH Pull-down resistor on DP, DM; RL = 15k to GND 2.8 -- 3.6 V ZHSDRV Steady state drive 40.5 45 49.5 Input Impedance ZINP RX, RPU, RPD disabled 1.0 -- -- M Pull-up Resistor Impedance RPU Bus Idle, Note 5 0.900 1.24 1.575 k LS/FS FUNCTIONALITY Input Levels Output Levels Termination Driver Output Impedance for HS 2014-2018 Microchip Technology Inc. DS00001691C-page 73 USB3803 TABLE 10-6: DC CHARACTERISTICS: ANALOG I/O PINS (DP/DM) (CONTINUED) Parameter Symbol Conditions Min Typ Max Units Pull-up Resistor Impedance RPU Device Receiving, Note 5 1.425 2.26 3.09 k Pull-dn Resistor Impedance RPD Note 5 14.25 16.9 20 k HS Differential Input Sensitivity VDIHS | V(DP) - V(DM) | 100 -- -- mV HS Data Signaling Common Mode Voltage Range VCMHS -- -50 -- 500 mV HS Squelch Detection Threshold (Differential) VHSSQ -- 100 -- 150 mV HS Disconnect Threshold VHSDSC -- 525 -- 625 mV High Speed Low Level Output Voltage (DP/DM referenced to GND) VHSOL 45 load -10 -- 10 mV High Speed High Level Output Voltage (DP/DM referenced to GND) VHSOH 45 load 360 -- 440 mV High Speed IDLE Level Output Voltage (DP/DM referenced to GND) VOLHS 45 load -10 -- 10 mV Chirp-J Output Voltage (Differential) VCHIRPJ HS termination resistor disabled, pull-up resistor connected. 45 load. 700 -- 1100 mV Chirp-K Output Voltage (Differential) VCHIRPK HS termination resistor disabled, pull-up resistor connected. 45 load. -900 -- -500 mV ILZ -- -- -- 10 A CIN Pin to GND -- 5 10 pF HS FUNCTIONALITY Input levels Output Levels Leakage Current OFF-State Leakage Current Port Capacitance Transceiver Input Capacitance Note: 5: The resistor value follows the 27% Resistor ECN published by the USB-IF. 10.6 Dynamic Characteristics: Digital I/O Pins TABLE 10-7: DYNAMIC CHARACTERISTICS: DIGITAL I/O PINS (RESET_N) Parameter Symbol Conditions Min Typ Max Units Minimum Active Low Pulse on RESET_N TRESET RESET_N = `0' 1 -- -- ms DS00001691C-page 74 2014-2018 Microchip Technology Inc. USB3803 10.7 Dynamic Characteristics: Analog I/O Pins TABLE 10-8: DYNAMIC CHARACTERISTICS: ANALOG I/O PINS (DP/DM) Parameter Symbol Conditions Min Typ Max Units FS Rise Time TFR CL = 50pF; 10 to 90% of |VOH - VOL| 4 -- 20 ns FS Fall Time TFF CL = 50pF; 10 to 90% of |VOH - VOL| 4 -- 20 ns Output Signal Crossover Voltage VCRS Excluding the first transition from IDLE state 1.3 -- 2.0 V Differential Rise/Fall Time Matching TFRFM Excluding the first transition from IDLE state 90 -- 111.1 % LS Rise Time TLR CL = 50-600pF; 10 to 90% of |VOH - VOL| 75 -- 300 ns LS Fall Time TLF CL = 50-600pF; 10 to 90% of |VOH - VOL| 75 -- 300 ns TLRFM Excluding the first transition from IDLE state 80 -- 125 % Differential Rise Time THSR -- 500 -- -- ps Differential Fall Time THSF -- 500 -- -- ps -- Eye pattern of Template 1 in USB 2.0 specification -- -- -- -- Receiver Waveform Requirements -- Eye pattern of Template 4 in USB 2.0 specification -- -- -- -- Data Source Jitter and Receiver Jitter Tolerance -- Eye pattern of Template 4 in USB 2.0 specification -- -- -- -- FS Output Driver Timing LS Output Driver Timing Differential Rise/Fall Time Matching HS Output Driver Timing Driver Waveform Requirements High Speed Mode Timing 10.8 USB Bypass Switch Characteristics TABLE 10-9: ANALOG SWITCH CHARACTERISTICS Parameter Symbol Conditions Min Typ Max Units RON 0 < Vswitch < VDD33_BYP, 4 5 12 5 6 8 M 0 -- 8 M "ON" Resistance BYPASS_N = `0', RESET_N='1' "OFF" Resistance ROFF 0 < Vswitch < VDD33_BYP BYPASS_N='1', RESET_N='1' Standby Resistance RSTDBY 0 < Vswitch < VDD33_BYP RESET_N='0' 2014-2018 Microchip Technology Inc. DS00001691C-page 75 USB3803 10.9 USB Charger Detection Characteristics TABLE 10-10: USB CHARGER DETECTION CHARACTERISTICS Parameter Symbol Conditions Data Source Voltage VDAT_SRC Data Detect Voltage VDAT_REF Data Source Current Data Sink Current Data Connect Current DP/DM Pull Down Resistors for upstream battery charging Min Typ Max Units IDAT_SRC < 250uA 0.5 -- 0.7 V -- 0.25 -- 0.4 V IDAT_SRC -- 250 -- -- A IDAT_SINK -- 50 -- 150 A IDP_SRC -- 7 -- 13 A RPD -- 14.25 16.9 20 k 10.10 Regulator Output Voltages and Capacitor Requirement TABLE 10-11: REGULATOR OUTPUT VOLTAGES AND CAPACITOR REQUIREMENT Parameter Symbol Conditions Min Typ Max Units VDD33 5.5V > VBAT > 2.9V 2.8 3.3 3.6 V Regulator Capacitor CBYP33 -- 4.7 -- -- F Capacitor ESR CESR33 -- -- -- 1 Regulator Output Voltage VDD12 3.6V > VDD33 > 2.8V -- 1.2 -- V Regulator Capacitor CBYP12 -- 1.0 -- -- F Capacitor ESR CESR12 -- -- -- 1 Regulator Output Voltage 10.11 ESD and Latch-Up Performance TABLE 10-12: ESD AND LATCH-UP PERFORMANCE Parameter Conditions Min Typ Max Units Comments Human Body Model -- -- 5 kV Device System EN/IEC 61000-4-2 Contact Discharge -- -- 15 kV Third party system test System EN/IEC 61000-4-2 Air-gap Discharge -- -- 15 kV Third party system test -- 150 -- mA -- ESD Performance Latch-Up Performance All Pins EIA/JESD 78, Class II 10.12 ESD Performance The USB3803 is protected from ESD strikes. By eliminating the requirement for external ESD protection devices, board space is conserved, and the board manufacturer is enabled to reduce cost. The advanced ESD structures integrated into the USB3803 protect the device whether or not it is powered up. 10.12.1 HUMAN BODY MODEL (HBM) PERFORMANCE HBM testing verifies the ability to withstand the ESD strikes like those that occur during handling and manufacturing, and is done without power applied to the IC. To pass the test, the device must have no change in operation or performance due to the event. All pins on the USB3803 provide 5 kV HBM protection, as shown in Table 10-12. 10.12.2 EN 61000-4-2 PERFORMANCE The EN 61000-4-2 ESD specification is an international standard that addresses system-level immunity to ESD strikes while the end equipment is operational. In contrast, the HBM ESD tests are performed at the device level with the device powered down. DS00001691C-page 76 2014-2018 Microchip Technology Inc. USB3803 Microchip contracts with Independent laboratories to test the USB3803 to EN 61000-4-2 in a working system. Reports are available upon request. Please contact your Microchip representative and request information on third party ESD test results. The reports show that systems designed with the USB3803 can safely provide the ESD performance shown in Table 10-12 without additional board level protection. In addition to defining the ESD tests, EN 61000-4-2 also categorizes the impact to equipment operation when the strike occurs (ESD Result Classification). The USB3803 maintains an ESD Result Classification 1 or 2 when subjected to an EN 61000-4-2 (level 4) ESD strike. Both air discharge and contact discharge test techniques for applying stress conditions are defined by the EN 610004-2 ESD document. 10.12.3 AIR DISCHARGE To perform this test, a charged electrode is moved close to the system being tested until a spark is generated. This test is difficult to reproduce because the discharge is influenced by such factors as humidity, the speed of approach of the electrode, and construction of the test equipment. 10.12.4 CONTACT DISCHARGE The uncharged electrode first contacts the pin to prepare this test, and then the probe tip is energized. This yields more repeatable results, and is the preferred test method. The independent test laboratories contracted by Microchip provide test results for both types of discharge methods. 10.13 AC Specifications 10.13.1 REFCLK External Clock:50% duty cycle 10%, 350ppm, Jitter < 100ps rms. 10.13.2 SERIAL INTERFACE The Microchip Hub conforms to AC specifications as set forth in the I2C Specification for Slave-Only devices. 10.13.3 USB 2.0 The Microchip Hub conforms to all voltage, power, and timing characteristics and specifications as set forth in the USB 2.0 Specification. Please refer to the USB 2.0 Specification that is available from the www.usb.org web site. 2014-2018 Microchip Technology Inc. DS00001691C-page 77 USB3803 11.0 APPLICATION REFERENCE 11.1 Application Diagram The USB3803 requires several external components to function and ensure compliance with the USB 2.0 Specification. TABLE 11-1: COMPONENT VALUES IN APPLICATION DIAGRAMS Reference Designator Value Description Notes CVDD12BYP 1.0 F Capacitor to ground for regulator stability Place as close to the USB3803 as possible CVDD33BYP 4.7 F Capacitor to ground for regulator stability Place as close to the USB3803 as possible COUT 0.1 F Bypass capacitor to ground Place as close to the USB3803 as possible RBIAS 12.0k Series resistor to establish reference voltage used by analog circuits Place as close to the USB3803 as possible RPU1 10k or 1k Pull-up for I2C bus. 10k for 100 kHz or 400 kHz operation, 1k for 1 MHz operation -- RPU2 10k (or greater) Pull-up for open-drain outputs -- TABLE 11-2: CAPACITANCE VALUES AT VBUS OF USB CONNECTOR Port Downstream Upstream DS00001691C-page 78 MIN Value MAX Value 120 F -- 1 F 10 F 2014-2018 Microchip Technology Inc. USB3803 FIGURE 11-1: INTERNAL CHIP-TO-CHIP INTERFACE USB3803 Port 1 Disabled VDD33_BYP USBUP_DP USBUP_DM REFCLK BYPASS_N RESET_N HUB_CONNECT LTE Baseband Processor USBDN1_DP USBDN1_DM USBDN2_DP USBDN2_DM USBDN3_DP 3G Baseband Processor USBDN3_DM VDD_INTN RBIAS Applications Processor RBIAS RPU2 INT_N VDD_I2C VBAT SCL SDA RPU1 VBAT COUT +1.8V RPU1 VDD_CORE_REG VDD33_BYP Connect pins to either VDD33_BYP or GND. REF_SEL1 REF_SEL0 I2C_ASEL1 I2C_ASEL0 VDD33_BYP VDD12_BYP VSS 2014-2018 Microchip Technology Inc. COUT CVDD12BYP CVDD33BYP DS00001691C-page 79 USB3803 FIGURE 11-2: DUAL USB DEVICE AND HOST APPLICATION VBUS VBUS DP DM GND USB 2.0 Host/OTG Port USB3740 High Speed 2:1 Switch Port 1 Disabled USB3803 Applications Processor VDD33_BYP USBUP_DP USBUP_DM From Applications Processor REFCLK BYPASS_N RESET_N HUB_CONNECT USBDN1_DP USB 2.0 Device Port USBDN1_DM USBDN2_DP USBDN2_DM USBDN3_DP 3G Baseband Processor USBDN3_DM VDD_INTN RBIAS RBIAS RPU2 INT_N VDD_I2C VBAT SCL SDA PMIC RPU1 VBAT VDD_CORE_REG VDD33_BYP Connect pins to either VDD33_BYP or GND. REF_SEL1 REF_SEL0 I2C_ASEL1 I2C_ASEL0 COUT VDD33_BYP VDD12_BYP VSS Note: COUT +1.8V RPU1 CVDD12BYP CVDD33BYP While RESET_N is driven low, all other inputs from Applications Processor should also be driven low to minimize current draw. To disable a downstream port, tie DP and DM to VDD33_BYP pin of the USB3803. DS00001691C-page 80 2014-2018 Microchip Technology Inc. USB3803 FIGURE 11-3: APPLICATION WITH USB PORT ACCESS TO THREE INTERNAL DEVICES Audio Codec VBUS VBUS DP DM GND USB3803 USBUP_DP USBUP_DM From Applications Processor Note: Grounding HUB_CONNECT requires that SP_ILOCK register bit connect_n be cleared to allow hub to exit Hub Connect Stage. REFCLK BYPASS_N RESET_N HUB_CONNECT USBDN3_DP USBDN2_DP USBDN2_DM USBDN1_DP VDD_INTN RBIAS RBIAS INT_N VDD_I2C VBAT SCL SDA RPU1 3G Baseband Processor USBDN1_DM RPU2 PMIC Applications Processor USBDN3_DM VBAT COUT +1.8V RPU1 VDD_CORE_REG VDD33_BYP Connect pins to either VDD33_BYP or GND. REF_SEL1 REF_SEL0 I2C_ASEL1 I2C_ASEL0 VDD33_BYP VDD12_BYP VSS 2014-2018 Microchip Technology Inc. COUT CVDD12BYP CVDD33BYP DS00001691C-page 81 USB3803 12.0 Note: PACKAGE OUTLINES, TAPE & REEL DRAWINGS, PACKAGE MARKING For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging. 25WLCSP, 1.95X1.95MM BODY, 0.4MM PITCH Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.microchip.com/packaging FIGURE 12-1: DS00001691C-page 82 2014-2018 Microchip Technology Inc. USB3803 FIGURE 12-2: 25WLCSP, 1.95X1.95 TAPE AND REEL 2014-2018 Microchip Technology Inc. DS00001691C-page 83 USB3803 FIGURE 12-3: DS00001691C-page 84 25WLCSP, 1.95X1.95 REEL DIMENSIONS 2014-2018 Microchip Technology Inc. USB3803 FIGURE 12-4: 25WLCSP, 1.95X1.95 TAPE SECTIONS FIGURE 12-5: REFLOW PROFILE AND CRITICAL PARAMETERS FOR ROHS COMPLIANT SOLDER 2014-2018 Microchip Technology Inc. DS00001691C-page 85 USB3803 FIGURE 12-6: PACKAGE MARKING Family/Device Number Note: The Family/Device Number for the USB3803 is "03". DS00001691C-page 86 2014-2018 Microchip Technology Inc. USB3803 APPENDIX A: TABLE A-1: REVISION HISTORY REVISION HISTORY Revision Level & Date DS00001691C (01-08-18) DS00001691B (03-16-15) Section/Figure/Entry Correction Section 4.4.7, "Hub Mode Timing Diagram," on page 19 Updated the section with timing diagram and parameters included in the previous revision. All Removed references to USB3803B and USB3803Bi revisions. Removed mentions of "(USB3803C Only)" in texts and graphics. Other minor text changes throughout. Figure 12-1, "25WLCSP, 1.95x1.95mm Body, 0.4mm Pitch" Package diagram updated. Section 10.6, "Dynamic Char- Changed RESET_N minimum active low pulse from acteristics: Digital I/O Pins," 100s to 1ms. on page 74 FIGURE 12-6: Package marking on page 86 Added note under figure: "Note: The Family/Device Number for the USB3803 is "03"." Cover Updated ESD bullet for consistency. Section 1.0, "General Description," on page 4 Added new section detailing differences between USB3803 family members, including functional revision B and C information. All Simplified part number throughout document: "USB3803C" -> "USB3803" Added "(USB3803C Only)" caveats throughout document in sections specific to Bypass Mode. DS00001691A replaces the previous SMSC version, Revision 1.1 2014-2018 Microchip Technology Inc. DS00001691C-page 87 USB3803 THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under "Support", click on "Customer Change Notification" and follow the registration instructions. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://microchip.com/support DS00001691C-page 88 2014-2018 Microchip Technology Inc. USB3803 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, for example, on pricing or delivery, refer to the factory or the listed sales office. X(1) PART NO. Device [X] -1- Device: USB3803 Functional Revision: C = Functional Revision C Temperature Range: Blank i = 0C to = -40C to Package: GL = 25-Ball WLCSP Tape and Reel:( 1) TR = Tape and Reel 2014-2018 Microchip Technology Inc. TR(2) Package Tape & Reel Temp. Range Func. Rev. - GL +70C +85C Examples: a) USB3803Ci-1-GL-TR Functional Revision C (Bypass Mode) Industrial temperature, 25-Ball WLCSP Tape & Reel (Commercial) (Industrial) Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. Reel size is 3,000. DS00001691C-page 89 USB3803 NOTES: DS00001691C-page 90 2014-2018 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAMBA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2014-2018, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-2539-7 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2014-2018 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Advance Information DS00001691C-page 91 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Australia - Sydney Tel: 61-2-9868-6733 India - Bangalore Tel: 91-80-3090-4444 China - Beijing Tel: 86-10-8569-7000 India - New Delhi Tel: 91-11-4160-8631 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 China - Chengdu Tel: 86-28-8665-5511 India - Pune Tel: 91-20-4121-0141 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 China - Chongqing Tel: 86-23-8980-9588 Japan - Osaka Tel: 81-6-6152-7160 Finland - Espoo Tel: 358-9-4520-820 China - Dongguan Tel: 86-769-8702-9880 Japan - Tokyo Tel: 81-3-6880- 3770 China - Guangzhou Tel: 86-20-8755-8029 Korea - Daegu Tel: 82-53-744-4301 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 China - Hangzhou Tel: 86-571-8792-8115 Korea - Seoul Tel: 82-2-554-7200 China - Hong Kong SAR Tel: 852-2943-5100 Malaysia - Kuala Lumpur Tel: 60-3-7651-7906 China - Nanjing Tel: 86-25-8473-2460 Malaysia - Penang Tel: 60-4-227-8870 China - Qingdao Tel: 86-532-8502-7355 Philippines - Manila Tel: 63-2-634-9065 China - Shanghai Tel: 86-21-3326-8000 Singapore Tel: 65-6334-8870 China - Shenyang Tel: 86-24-2334-2829 Taiwan - Hsin Chu Tel: 886-3-577-8366 China - Shenzhen Tel: 86-755-8864-2200 Taiwan - Kaohsiung Tel: 886-7-213-7830 Israel - Ra'anana Tel: 972-9-744-7705 China - Suzhou Tel: 86-186-6233-1526 Taiwan - Taipei Tel: 886-2-2508-8600 China - Wuhan Tel: 86-27-5980-5300 Thailand - Bangkok Tel: 66-2-694-1351 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 China - Xian Tel: 86-29-8833-7252 Vietnam - Ho Chi Minh Tel: 84-28-5448-2100 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Canada - Toronto Tel: 905-695-1980 Fax: 905-695-2078 DS00001691C-page 92 China - Xiamen Tel: 86-592-2388138 China - Zhuhai Tel: 86-756-3210040 Germany - Garching Tel: 49-8931-9700 Germany - Haan Tel: 49-2129-3766400 Germany - Heilbronn Tel: 49-7131-67-3636 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Germany - Rosenheim Tel: 49-8031-354-560 Italy - Padova Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Tel: 47-7289-7561 Poland - Warsaw Tel: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 2014-2018 Microchip Technology Inc. 10/25/17 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Microchip: USB3803CI-1-GL-TR