Features e High speed taa = 12 ns e CMOS for optimum speed/power Low active power 1020 mW Low standby power 250 mW 2.0V data retention 100 pW @ Available in plastic 32-pin 400-mil SOJ Automatic power-down when deselected e Easy memory expansion with CE, CE, and OE options CYPRESS ADVANCED INFORMATION CY7C1088 Functional Description The CY7C1088 is a high-performance CMOS static RAM organized as 131,072 words by 9 bits. Easy memory expansion is provided by an active LOW chip enable (CE;), an active HIGH chip enable (CE3), an active LOW output enable (OB), and three-state drivers. This device has an au- tomatic power-down feature that reduces power consumption by more than 75% when deselected. Writing to the device is accomplished by taking chip enable one (CE,) and write en- able (WE) inputs LOW and chip enable two (CE) input HIGH. Data on the eight I/O pins (1/Oy through I/O) is then written 128K x 9 Static RAM into the location specified on the address pins (Ap through Aj6). Reading from the device is accomplished by taking chip enable one (CE)) and out- put cnabre ) LOW while forcing write enable (WE) and chip enable two (CE2) HIGH. Under these conditions, the con- tents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/Oo through 1/O7) are placed in a high-impedance state when the device is deselected (CE, HIGH or CE, LOW), the outputs are disabled (OE HIGH), or during a write operation (CE; LOW, CE2 HIGH, and LOW). The CY7C1088 is available in standard 32-pin 400-mil-wide SOJs. Logic Block Diagram bd Le, 1] [= ~ _ (INPUT BUFFER ha 0, x a) A vo wi 1) 2 g g Hf V0 512 x 256 x9 2 j wa 2 my WO4 x | Ws i VO, POWER] cE sexs, | foowmtlh we __ uO, AT RAEETE gerseszee 1088-1 OE <cadatad Pin Configuration SoJ Top View Selection Guide Current urrent Document #: 3800451 2-270