ACT-SF41632N-26P5M - Aeroflex, Inc.

FEATURES

eroflex Circuit Technology - Advanced Multichip Modules © SCD3851 REV A 5/21/98

ISO

900

CIRCUIT TECHNOLOGY

www.aeroflex.com

■4 – 128K x 8 SRAMs & 4 – 512K x 8 Flash Die in

One MCM

■Access Times of 25ns, 35ns (SRAM) and

60ns, 70ns, 90ns (Flash)

■Organized as 128K x 32 of SRAM and 512K x 32

of Flash Memory with Common Data Bus

■Low Power CMOS

■Input and Output TTL Compatible Design

■MIL-PRF-38534 Compliant MCMs Available

■Decoupling Capacitors and Multiple Grounds for

Low Noise

■Commercial, Industrial and Military Temperature

Ranges

■Industry Standard Pinouts

■TTL Compatible Inputs and Outputs

■Packaging – Hermetic Ceramic

● 66–Lead, PGA-Type, 1.385"SQ x 0.245"max,

Aeroflex code# "P1,P5 with/without shoulders)"

● 68–Lead, Dual-Cavity CQFP(F2), 0.88"SQ x

.20"max (.18 max thickness available, contact

factory for details) (Drops into the 68 Lead

JEDEC .99"SQ CQFJ footprint)

FLASH MEMORY FEATURES

■Sector Architecture (Each Die)

● 8 Equal Sectors of 64K bytes each

● Any combination of sectors can be erased with

one command sequence.

■+5V Programing, +5V Supply

■Embedded Erase and Program Algorithms

■Hardware and Software Write Protection

■Page Program Operation and Internal Program

Control Time.

■10,000 Erase/Program Cycles

Block Diagram – PGA Type Package(P1 & P5) & CQFP(F2)

ACT-SF41632 High Speed

Multichip Module

128Kx32 SRAM / 512Kx32 Flash

FWE1

SCE

I/O8-15 I/O16-23I/O0-7 I/O24-31

512K X 8 FLASH

A0–A18

128K X 8 SRAM

512K X 8 FLASH

128K X 8 SRAM

512K X 8 FLASH

128K X 8 SRAM

512K X 8 FLASH

128K X 8 SRAM

FCE

SWE1FWE2SWE2FWE3SWE3FWE4SWE4PIN DESCRIPTION

I/O0-31 Data I/O

A0–18 Address Inputs

FWE1-4 Flash Write Enables

SWE1-4 SRAM Write Enables

FCE Flash Chip Enable

SCE SRAM Chip Enable

OE Output Enable

NC Not Connected

VCC Power Supply

GND Ground

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

Absolute Maximum Ratings

Symbol Rating Range Units

TCCase Operating Temperature -55 to +125 °C

TSTG Storage Temperature -65 to +150 °C

VGMaximum Signal Voltage to Ground -0.5 to +7 V

TLMaximum Lead Temperature (10 seconds) 300 °C

Parameter

Flash Data Retention 10 Years

Flash Endurance (Write/Erase Cycles) 10,000

Normal Operating Conditions

Symbol Parameter Minimum Maximum Units

VCC Power Supply Voltage +4.5 +5.5 V

VIH Input High Voltage +2.2 VCC + 0.3 V

VIL Input Low Voltage -0.5 +0.8 V

Capacitance

(VIN = 0V, f = 1MHz, TA = 25°C)

Symbol Parameter Maximum Units

CAD A0 – A18 Capacitance 80 pF

COEOE Capacitance 80 pF

CWE1-4 F/S Write Enable Capacitance 30 pF

CCEF/S Chip Enable Capacitance 50 pF

CI/OI/O0 – I/O31 Capacitance 30 pF

This parameter is guaranteed by design but not tested

DC Characteristics

(VCC = 5.0V, VSS = 0V, Tc = -55°C to +125°C)

Parameter Sym Conditions Min Max Units

Input Leakage Current ILI VCC = Max, VIN =0toVCC 10 µA

Output Leakage Current ILO FCE = SCE = VIH, OE = VIH,

VOUT =0toVCC 10 µA

SRAM Operating Supply Current x 32

Mode ICCx32 SCE = VIL, OE = VIH, f = 5MHz, VCC =

Max, FCE = VIH 500 mA

Standby Current ISB FCE = SCE = VIH, OE = VIH, f = 5MHz,

VCC = Max 80 mA

SRAM Output Low Voltage VOL IOL = 8 mA, VCC = Min, FCE = VIH 0.4 V

SRAM Output High Voltage VOH IOH = -4.0 mA, , VCC = Min, FCE = VIH 2.4 V

Flash Vcc Active Current for Read (1) ICC1 FCE = VIL, OE = VIH, SCE = VIH 260 mA

Flash Vcc Active Current for Program

or Erase (2) ICC2 FCE = VIL, OE = VIH, SCE = VIH 300 mA

Flash Output Low Voltage VOL IOL = 12 mA, VCC = Min, SCE = VIH 0.45 V

Flash Output High Voltage VOH1 IOH = -2.5 mA, , VCC = Min, SCE = VIH 0.85 x VCC V

Flash Low Vcc Lock Out Voltage VLKO 3.2 4.2 V

Notes: 1) The ICC current listed includes both the DC operating current and the frequency dependent component (at 5MHz). The

frequency component typically is less than 2mA/MHz, with OE at VIH 2) ICC active while Embedded Algorithim (program or

erase) is in progress 3) DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

SRAM AC Characteristics

(VCC = 5.0V, VSS= 0V, TC = -55°C to +125°C)

Read Cycle

Parameter Symbol –025

Min Max –035

Min Max Units

Read Cycle Time tRC 25 35 ns

Address Access Time tAA 25 35 ns

Chip Select Access Time tACE 25 35 ns

Output Hold from Address Change tOH 0 0 ns

Output Enable to Output Valid tOE 15 20 ns

Chip Select to Output in Low Z * tCLZ 3 3 ns

Output Enable to Output in Low Z * tOLZ 0 0 ns

Chip Deselect to Output in High Z * tCHZ 12 20 ns

Output Disable to Output in High Z * tOHZ 12 20 ns

* Parameters guaranteed by design but not tested

Write Cycle

Parameter Symbol –025

Min Max –035

Min Max Units

Write Cycle Time tWC 25 35 ns

Chip Select to End of Write tCW 20 25 ns

Address Valid to End of Write tAW 20 25 ns

Data Valid to End of Write tDW 15 20 ns

Write Pulse Width tWP 20 25 ns

Address Setup Time tAS 0 0 ns

Output Active from End of Write * tOW 0 0 ns

Write to Output in High Z * tWHZ 10 20 ns

Data Hold from Write Time tDH 0 0 ns

Address Hold Time tAH 0 0 ns

* Parameters guaranteed by design but not tested

SRAM Truth Table

Mode SCE OE SWE Data I/O Power

Standby HX X High Z Standby

Read L L HData Out Active

Output Disable LH H High Z Active

Write LXLData In Active

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

Timing Diagrams — SRAM

DI/O

tRC

tOH

tAA

Data ValidPrevious Data Valid

tOE

High Z

tOHZ

Read Cycle Timing Diagrams

Data Valid

tCLZ

SCE

tACEtCHZ

UNDEFINED DON’T CARE

Read Cycle 2 (SWE = VIH)

Write Cycle (SCE Controlled, OE = VIH )

tCW

tAS tWP

tDW

tOW

SCE

SWE

Data Valid

Write Cycle (SWE Controlled, OE = VIH)

DI/O

AC Test Circuit

IOL

Parameter Typical Units

Input Pulse Level 0 – 3.0 V

Input Rise and Fall 5ns

Input and Output Timing Reference Level 1.5 V

Notes:

1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance

ZO=75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance

load circuit. 6) ATE Tester includes jig capacitance.

IOH

To Device Under Test VZ ~ 1.5 V (Bipolar Supply)

Current Source

CL = 50 pF

tWC

tAWtAH

tRC

tAA

tOLZ

SEE NOTE

Note: Guaranteed by design, but not tested.

DI/O

tDH

tWHZ

SEE NOTE

Read Cycle 1 (SCE = OE = VIL, SWE = VIH)

Write Cycle Timing Diagrams

tWP

tDW

Data Valid

tWC

tAWtAH

DI/O

tDH

SCE

SWE

tCW

tAS

A0-18

AC Test Conditions

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

Flash AC Characteristics – Read Only Operations

(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)

Parameter Symbol

JEDEC Stand’d –60

Min Max –70

Min Max –90

Min Max Units

Read Cycle Time tAVAVtRC 60 70 90 ns

Address Access Time tAVQVtACC 60 70 90 ns

Chip Enable Access Time tELQVtCE60 70 90 ns

Output Enable to Output Valid tGLQVtOE30 35 35 ns

Chip Enable to Output High Z (1) tEHQZtDF20 20 20 ns

Output Enable High to Output High Z(1) tGHQZtDF20 20 20 ns

Output Hold from Address, CE or OE Change, Whichever is First tAXQXtOH0 0 0 ns

Note 1. Guaranteed by design, but not tested

Flash AC Characteristics – Write / Erase / Program Operations, FWE Controlled

(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)

Parameter Symbol

JEDEC Stand’d –60

Min Max –70

Min Max –90

Min Max Units

Write Cycle Time tAVAC tWC60 70 90 ns

Chip Enable Setup Time tELWLtCE0 0 0 ns

Write Enable Pulse Width tWLWHtWP40 45 45 ns

Address Setup Time tAVWLtAS0 0 0 ns

Data Setup Time tDVWHtDS40 45 45 ns

Data Hold Time tWHDXtDH 0 0 0 ns

Address Hold Time tWLAXtAH 45 45 45 ns

Write Enable Pulse Width High tWHWLtWPH20 20 20 ns

Duration of Byte Programming Operation tWHWH114 TYP 14 TYP 14 TYP µs

Sector Erase Time tWHWH230 30 30 Sec

Read Recovery Time before Write tGHWL0 0 0 µs

Vcc Setup Time tVCE50 50 50 µs

Chip Programming Time 50 50 50 Sec

Chip Enable Hold Time tOEH 110 10 10 ns

Chip Erase Time tWHWH3120 120 120 Sec

1. Toggle and Data Polling only.

Flash AC Characteristics – Write / Erase / Program Operations, FCE Controlled

(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)

Parameter Symbol

JEDEC Stand’d –60

Min Max –70

Min Max –90

Min Max Units

Write Cycle Time tAVAC tWC60 70 90 ns

Write Enable Setup Time tWLELtWS0 0 0 ns

Chip Enable Pulse Width tELEHtCP40 45 45 ns

Address Setup Time tAVELtAS0 0 0 ns

Data Setup Time tDVEHtDS40 45 45 ns

Data Hold Time tEHDXtDH 0 0 0 ns

Address Hold Time tELAXtAH 45 45 45 ns

Chip Enable Pulse Width High tEHELtCPH20 20 20 ns

Duration of Byte Programming tWHWH114 TYP 14 TYP 14 TYP µs

Sector Erase Time tWHWH230 30 30 Sec

Read Recovery Time tGHEL0 0 0 ns

Chip Programming Time 50 50 50 Sec

Chip Erase Time tWHWH3120 120 120 Sec

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

AC Waveforms for Flash Memory Read Operations

tOHtCE

tOE

tACC

tRC

tDF

Output Valid High ZHigh Z

Outputs

FWE

FCE

Addresses Addresses Stable

FWE

FCE

Data

Addresses

5.0V

5555H PA

Data Polling

D7 DOUTPDAOH

tWHWH1

tOE

tRC

tCE

tDF

tOH

tAH

tAS

tDH

tWPH

tWP

tDS

tCE

tWC

Write/Erase/Program

Operation for Flash Memory, FWE Controlled

Notes:

1. PA is the address of the memory location to be programmed.

2. PD is the data to be programmed at byte address.

3. D7 is the 0utput of the complement of the data written to the deviced.

4. Dout is the output of the data written to the device.

5. Figure indicates last two bus cycles of four bus cycle sequence.

tGHWL

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

AC Waveforms Chip/Sector

Erase Operations for Flash Memory

Data

Addresses

VCC

5555H

Data Polling

tAH

FCE

tAS

FWE

5555H 5555H SA2AAAH 2AAAH

tGHWL

tWP

tWPH

tDS

tDH

tCE

tVCE

55H AAH80H 55H 10H/30HAAH

Notes:

1. SA is the sector address for sector erase.

AC Waveforms for Data Polling

During Embedded Algorithm Operations for Flash Memory

tOE

tCH

tWHWH1 or 2

tOE

tOH

tDF

tCE

tOEH

* DQ7=Valid Data (The device has completed the Embedded operation).

DQ0–DQ6=Invalid

DQ7DQ7=

Valid Data

DQ0–DQ6

Valid Data

High Z

FCE

DQ7

FWE

DQ0-DQ6

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

FWE

FCE

Data

Addresses

5.0V

5555H PA

Data Polling

D7 DOUTPDAOH

tWHWH1

tAHtAS

tDH

tCPH

tCP

tDS

tWS

tWC

tGHWL

Notes:

1. PA is the address of the memory location to be programmed.

2. PD is the data to be programmed at byte address.

3. D7 is the 0utput of the complement of the data written to the device.

4. DOUT is the output of the data written to the device.

5. Figure indicates last two bus cycles of four bus cycle sequence.

Write/Erase/Program Operation for Flash Memory, FCE Controlled

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

Pin Numbers & Functions

66 Pins — PGA-Type

Pin # Function Pin # Function Pin # Function Pin # Function

1I/O818 A15 35 I/O25 52 FWE3

2I/O919 Vcc 36 I/O26 53 SWE3

3I/O10 20 FCE 37 A754 GND

4A14 21 SCE 38 A12 55 I/O19

5A16 22 I/O339 SWE156 I/O31

6A11 23 I/O15 40 A13 57 I/O30

7A024 I/O14 41 A858 I/O29

8A18 25 I/O13 42 I/O16 59 I/O28

9I/O026 I/O12 43 I/O17 60 A1

10 I/O127 OE 44 I/O18 61 A2

11 I/O228 A17 45 VCC 62 A3

12 FWE229 FWE146 SWE463 I/O23

13 SWE230 I/O747 FWE464 I/O22

14 GND 31 I/O648 I/O27 65 I/O21

15 I/O11 32 I/O549 A466 I/O20

16 A10 33 I/O450 A5

17 A934 I/O24 51 A6

"P5" — 1.385" SQ PGA Type Special Order Package (without shoulders)

"P1" — 1.385" SQ PGA Type Package Standard (with shoulders on Pins 1, 11, 56 & 66)

.220

MAX

Bottom View (P1 & P5)

Side View

(P1)

Side View

(P5)

1.400 SQ

1.000

.600

1.000

.100 TYP

.020

.016

.100 TYP

Pin 56

Pin 66 Pin 11

Pin 1

MAX

.020

.016

.100

.025

.035

.245

MAX

.165

MIN

.145

MIN

All dimensions in inches

TYP

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

Pin Numbers & Functions

68 Pins — Dual-Cavity CQFP

Pin # Function Pin # Function Pin # Function Pin # Function

1GND 18 GND 35 OE 52 GND

2SWE319 I/O836 SWE253 FI/O23

3A520 I/O937 A17 54 FI/O22

4A421 I/O10 38 FWE255 FI/O21

5A322 I/O11 39 FWE356 FI/O20

6A223 I/O12 40 FWE457 FI/O19

7A124 I/O13 41 A18 58 FI/O18

8A025 I/O14 42 SCE 59 FI/O17

9NC 26 I/O15 43 SWE160 FI/O16

10 I/O027 Vcc 44 FI/O31 61 VCC

11 I/O128 A11 45 FI/O30 62 A10

12 I/O229 A12 46 FI/O29 63 A9

13 I/O330 A13 47 FI/O28 64 A8

14 I/O431 A14 48 FI/O27 65 A7

15 I/O532 A15 49 FI/O26 66 A6

16 I/O633 A16 50 FI/O25 67 FWE1

17 I/O734 FCE 51 FI/O24 68 SWE4

Package Outline — Dual-Cavity CQFP "F2"

Top View

All dimensions in inches

.015

.990 SQ

±.010

.890 SQ

MAX

.800 REF

.050

See Detail “A”

Detail “A”

*.200 MAX .010 REF

+3°/-3°

.040

.010 R

.010 ±.005

TYP

±.002

Pin 60

Pin 44

Pin 43Pin 27

Pin 26

Pin 10

Pin 9 Pin 61

*.180 MAX available, call factory for details

REF

±.005

.010 REF

.010 ±.002

Aeroflex Circuit Technology SCD3851 REV A 5/21/98 Plainview NY (516) 694-6700

Ordering Information

Model Number DESC Part Number Speed Package

ACT-SF41632N–26P1X TBD 25(S) / 60(F) ns 1.385"sq PGA-Type

ACT-SF41632N–37P1X TBD 35(S) / 70(F) ns 1.385"sq PGA-Type

ACT-SF41632N–39P1X TBD 35(S) / 90(F) ns 1.385"sq PGA-Type

ACT-SF41632N–26F2X TBD 25(S) / 60(F) ns .88"sq CQFP

ACT-SF41632N–37F2X TBD 35(S) / 70(F) ns .88"sq CQFP

ACT-SF41632N–39F2X TBD 35(S) / 90(F) ns .88"sq CQFP

Note: (S) = Speed for SRAM, (F) = Speed for FLASH

ACT– SF 416 32 N– 26 P1 M

Aeroflex Circuit

Part Number Breakdown

Technology

Memory Type

SF = SRAM Flash Combo Module

Memory Depth, Locations

Pinout Options

Memory Width, Bits

N = None

Memory Speed (Code)

Package Types & Sizes

Surface Mount Packages

F2 = 0.88"SQ 68 Leads Dual-Cavity CQFP

Thru-Hole Packages

P1 = 1.385"SQ PGA 66 Pins W/Shoulder

P5 = 1.385"SQ PGA 66 Pins WO/Shoulder

Screening

C = Commercial Temp, 0°C to +70°C

I = Industrial Temp, -40°C to +85°C

T = Military Temp, -55°C to +125°C

M = Military Temp, -55°C to +125°C Screened *

Q = MIL-PRF-38534 Compliant/SMD

* Screened to the individual test methods of MIL-STD-883

4 = 4M SRAM, 16 = 16M Flash

26 = 25ns SRAM & 60ns FLASH

37 = 35ns SRAM & 70ns FLASH

39 = 35ns SRAM & 90ns FLASH

ACT– SF 416 32 N– 26 P1 M

Aeroflex Circuit Technology

35 South Service Road

Plainview New York 11830

Telephone: (516) 694-6700

FAX: (516) 694-6715

Toll Free Inquiries: 1-(800) 843-1553

CIRCUIT TECHNOLOGY

Specifications subject to change without notice.