LT1249
1
Power Factor Controller
Standard 8-Pin Packages
High Power Factor Over Wide Load Range
with Line Current Averaging
International Operation Without Switches
Instantaneous Overvoltage Protection
Minimal Line Current Dead Zone
Typical 250µA Start-Up Supply Current
Rejects Line Switching Noise
Synchronization Capability
Low Quiescent Current: 9mA
Fast 1.5A Peak Current Gate Driver
The 8-pin LT
®
1249 provides active power factor correc-
tion for universal offline power systems with very few
external parts. By using fixed high frequency PWM current
averaging without the need for slope compensation, the
LT1249 achieves far lower line current distortion, with a
smaller magnetic element than systems that use either peak
current detection or zero current switching approach, in
both continuous and discontinuous modes of operation.
The LT1249 uses a multiplier containing a square gain
function from the voltage amplifier to reduce the AC gain
at light output load and thus maintains low line current
distortion and high system stability. The LT1249 also
provides filtering capability to reject line switching noise
which can cause instability when fed into the multiplier.
Line current dead zone is minimized with low bias voltage
at the current input to the multiplier.
The LT1249 provides many protection features including
peak current limiting and overvoltage protection. The
switching frequency is internally set at 100kHz.
While the LT1249 simplifies PFC design with minimal
parts count, the LT1248 provides flexibilities in switching
frequency, overvoltage and current limit.
+
+
+
+
+
I
M
=
I
A
2
I
B
200µA
2
VA
OUT
7.5V
44µA
22µA
15µA
1V
EA
+
32k
I
A
I
B
20µA
250µA MAX
I
M
7.5V
V
REF
+
0.7V
OSC
R
S
Q
6
4
532 17
8
35pF
I
AC
V
SENSE
M
OUT
R
MOUT
4k
4k
CA
OUT
V
CC
V
CC
16V/10V
CA
MULTIPLIER
RUN
RUN
16V
GND
GTDR
1249 BD
SYNC
M1
g
m
= 1/3k
, LTC and LT are registered trademarks of Linear Technology Corporation.
Universal Power Factor Corrected Power Supplies
Preregulators up to 1500W
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
BLOCK DIAGRA
W
2
LT1249
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
UU
Supply Voltage ....................................................... 27V
GTDR Current Continuous ..................................... 0.5A
GTDR Output Energy (Per Cycle) ............................. 5µJ
I
AC
Input Current ................................................. 20mA
V
SENSE
Input Voltage ............................................ V
MAX
M
OUT
Input Current.............................................. ±5mA
Operating Junction Temperature Range
LT1249C................................................ 0°C to 100°C
LT1249I ........................................... 40°C to 125°C
Thermal Resistance (Junction-to-Ambient)
N8 Package ................................................ 100°C/W
S8 Package................................................. 120°C/W
Storage Temperature Range ..................65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the operating temperature
range, otherwise specifications are at TA = 25°C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, IAC = 100µA, CAOUT = 3.5V,
VAOUT = 5V, no load on any outputs, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Overall
Supply Current (V
CC
in Undervoltage Lockout) V
CC
= Lockout Voltage – 0.2V 0.25 0.45 mA
Supply Current, On 11.5V V
CC
V
MAX
, CA
OUT
= 1V 912 mA
V
CC
Turn-On Threshold 15.5 16.5 17.5 V
V
CC
Turn-Off Threshold 9.5 10.5 11.5 V
Voltage Amplifier
V
SENSE
Bias Current V
SENSE
= 0V to 7V –25 –250 nA
Voltage Amp Gain 70 100 dB
Voltage Amp Unity-Gain Bandwidth 1.5 MHz
Voltage Amp Output High 0 Source Current 50µA10 12 V
Voltage Amp Output Low 0 Sink Current 5µA0.1 0.4 V
Voltage Amp Source Current 130 260 450 µA
Voltage Amp Sink Current Threshold Linear Operation, 2V < VA
OUT
< 10V 33 44 57 µA
Voltage Amp Sink Current Hysteresis 2V < VA
OUT
< 10V 14 22.5 30 µA
Current Amplifier
Current Amp Offset Voltage ±2±15 mV
Current Amp Transconductance I
CAOUT
= ±40µA150 320 550 µmho
Current Amp Voltage Gain 2.5V V
CAOUT
7.5V 500 1000 V/V
Current Amp Source Current V
MOUT
= 1V, I
M
= 0µA 100 145 220 µA
Current Amp Sink Current V
MOUT
= –0.3V, I
M
= 0µA 67 95 125 µA
Current Amp Output High 7.4 8.1 V
Current Amp Output Low 1.2 2 V
ORDER PART
NUMBER
T
JMAX
= 125°C, θ
JA
= 100°C/W (N8)
T
JMAX
= 125°C, θ
JA
= 120°C/W (S8)
Consult factory for Military grade parts.
LT1249CN8
LT1249IN8
LT1249CS8
LT1249IS8
S8 PART
MARKING
1249
1249I
1
2
3
4
8
7
6
5
TOP VIEW
GND
CA
OUT
M
OUT
I
AC
GTDR
V
CC
V
SENSE
VA
OUT
S8 PACKAGE
8-LEAD PLASTIC SO
N8 PACKAGE
8-LEAD PDIP
LT1249
3
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Current amplifier is in linear mode with 0V input common mode.
Note 3: Multiplier Gain Constant: K =
Note 4: Maximum GTDR output voltage is internally clamped for higher
V
CC
voltages.
TYPICAL PERFORMANCE CHARACTERISTICS
UW
FREQUENCY (Hz)
10
GAIN (dB)
100
80
60
40
20
0
–20 100 1k 10k 100k
1249 G01
1M 10M
0
–20
–40
–60
–80
100
–120
PHASE (DEG)
PHASE
GAIN
Voltage Amplifier Open-Loop
Gain and Phase
FREQUENCY (Hz)
1k
TRANSCONDUCTANCE (µmho)
400
350
300
250
200
150
100
50
0
20
0
–20
–40
–60
–80
100
120
140
100k10k
1249 G02
1M
PHASE (DEG)
10M
g
m
θ
Transconductance of
Current Amplifier
I
M
I
AC
(VA
OUT
– 1.5)
2
PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference
Reference Output Voltage T
A
= 25°C, Measured at V
SENSE
Pin 7.39 7.5 7.6 V
Reference Output Voltage Worst Case All Line, Temperature 7.32 7.5 7.68 V
Reference Output Voltage Line Regulation V
LOCKOUT
< V
CC
< V
MAX
–20 5 20 mV
Multiplier
Multiplier Output Current I
AC
= 100µA, VA
OUT
= 5V 35 µA
Multiplier Output Current Offset R
AC
= 1M from I
AC
to GND 0.05 0.5 µA
Multiplier Max Output Current (I
M(MAX)
)I
AC
= 450µA, VA
OUT
= 7V (Note 2) 375 250 150 µA
Multiplier Max Output Voltage (I
M(MAX)
• R
MOUT
)I
AC
= 450µA, VA
OUT
= 7V (Note 2) 1.25 1.1 0.96 V
Multiplier Gain Constant (Note 3) 0.035 V
–2
I
AC
Input Resistance I
AC
from 50µA to 1mA 15 32 50 k
Oscillator
Oscillator Frequency 75 100 125 kHz
Control Pin (CA
OUT
) Threshold Duty Cycle = 0 1.3 1.8 2.3 V
Synchronization Frequency Range Synchronizing Pulse Low 0.35V on CA
OUT
127 160 kHz
Gate Driver
Max GTDR Output Voltage 0mA Load, 18V < V
CC
< V
MAX
(Note 4) 12 15 17.5 V
GTDR Output High 200mA Load, 11.5V V
CC
15V V
CC
– 3.0 V
GTDR Output Low (Device Unpowered) V
CC
= 0V, 50mA Load (Sinking) 0.9 1.5 V
GTDR Output Low (Device Active) 200mA Load (Sinking) 0.5 1 V
Peak GTDR Current 10nF from GTDR to GND 1.5 A
GTDR Rise and Fall Time 1nF from GTDR to GND 25 ns
GTDR Max Duty Cycle 90 96 %
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the operating temperature
range, otherwise specifications are at TA = 25°C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, IAC = 100µA, CAOUT = 3.5V,
VAOUT = 5V, no load on any outputs, unless otherwise noted.
4
LT1249
TYPICAL PERFORMANCE CHARACTERISTICS
UW
I
AC
(µA)
0
I
M
(µA)
300
150
0
1249 G04
250 500
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
OUT
= 5.5V
VA
OUT
= 5V
VA
OUT
= 4.5V
VA
OUT
= 4V
VA
OUT
= 3.5V
VA
OUT
= 3V
VA
OUT
= 2.5V
VA
OUT
= 2V
LOAD CAPACITANCE (nF)
0
TIME (ns)
400
300
200
100
010 20 30 40
1249 G08
50
RISE TIME
NOTE: GTDR SLEWS
BETWEEN 1V AND 16V
FALL TIME
Start-Up Supply Current vs
Supply Voltage Switching Frequency
TEMPERATURE (°C)
–75
FREQUENCY (kHz)
75
1249 G10
25 25 125
140
130
120
110
100
90
80
70 50 0 50 100
JUNCTION TEMPERATURE (°C)
–75
REFERENCE VOLTAGE (V)
75
7.536
7.524
7.512
7.500
7.488
7.476
7.464
7.452
7.440
7.428
1249 G03
50 150
–25 0 25 50 100 125
SUPPLY VOLTAGE (V)
10
SUPPLY CURRENT (mA)
10
9
8
7
6
5
4
3
2
1
026
1249 G05
1412 16 20 24 28
18 22 30
T
J
= –55°C
T
J
= 25°C
T
J
= 125°C
Supply Current vs Supply Voltage GTDR Source Current
SOURCE CURRENT (mA)
0
GTDR VOLTAGE (V)
18.5
18.0
17.5
17.0
16.5
16.0
15.5
15.0
14.5
14.0
13.5
13.0
1249 G06
300
T
J
= 25°C
T
J
= 125°C
V
CC
= 18V
T
J
= –55°C
–60 120 180 240
GTDR Sink Current
SINK CURRENT (mA)
0
GTDR VOLTAGE (V)
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1249 G07
300
T
A
= 125°C
T
A
= –55°C
60 120 180 240
T
A
= 25°C
GTDR Rise and Fall Time
Reference Voltage vs
Temperature Multiplier Current
SUPPLY VOLTAGE (V)
0
SUPPLY CURRENT (µA)
550
500
450
400
350
300
250
200
150
100
50
0
1249 G09
20
125°C
–55°C
25°C
481216
2610
14 18
LT1249
5
PIN FUNCTIONS
UUU
TYPICAL PERFORMANCE CHARACTERISTICS
UW
TEMPERATURE (°C)
SYNCHRONIZATION THRESHOLD (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1249 G11
75
25 25 125–50 0 50 100
Synchronization Threshold
at CAOUT
Voltage Amp Sink Current Limits
(Threshold)
M
OUT
VOLTAGE (V)
2.4 1.2 0
M
OUT
CURRENT (mA)
1.2
1.0
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1.0
1249 G12
1.2 2.4
125°C
25°C
–50°C
MOUT Pin Characteristics
TEMPERATURE (°C)
I
M(MAX)
× R
MOUT
(V)
1249 G15
–1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
–75 –25–50 250 50 100
75 125
Maximum Multiplier Output
Voltage (IM(MAX) • RMOUT)
Transconductance of Current
Amplifier Over Temperature
TEMPERATURE (°C)
–50
TRANSCONDUCTANCE (µmho)
100
1249 G13
050
400
350
300
250
200
150
100
50
025 25 75 125
Maximum Duty Cycle
TEMPERATURE (°C)
DUTY CYCLE (%)
100
99
98
97
96
95
94
93
92
91
90
1249 G16
75
25 25 125–50 0 50 100
TEMPERATURE (°C)
–75
CURRENT (µA)
–25–50 250 50 100
75 125
1249 G14
60
50
40
30
20
10
0
UP THRESHOLD
DOWN THRESHOLD
NOTE: THESE SINK CURRENT THRESHOLDS ARE
FOR OVERVOLTAGE PROTECTION FUNCTION.
GND (Pin 1): Ground.
CA
OUT
(Pin 2): This is the output of the current amplifier
that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CA
OUT
is low,
the modulator has zero duty cycle.
M
OUT
(Pin 3): The multiplier current goes out of this pin
through the 4k resistor R
MOUT
. The voltage developed
across R
MOUT
is the reference voltage of the current loop
and it is limited to 1.1V. The noninverting input of the
current amplifier is also tied to R
MOUT
. In operation, M
OUT
is normally at negative potential and only AC signals
appear at the noninverting input of the current amplifier.
I
AC
(Pin 4): This is the AC line voltage sensing input to the
multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. A 32k resistor is in series with the current input,
so that a small external capacitor can be used to filter out
the switching noise from the high impedance lines.
VA
OUT
(Pin 5): This is the output of the voltage error
amplifier. The output is clamped at 12V. When the output
goes below 1.5V, the multiplier output current is zero.
6
LT1249
PIN FUNCTIONS
UUU
V
SENSE
(Pin 6): This is the inverting input to the voltage
amplifier.
V
CC
(Pin 7): This is the supply of the chip. The LT1249 has
a very fast gate driver required to fast charge high power
MOSFET gate capacitance. High current spikes occur
during charging. For good supply bypass, a 0.1µF ceramic
capacitor in parallel with a low ESR electrolytic capacitor,
56µF or higher is required in close proximity to IC GND.
GTDR (Pin 8): The MOSFET gate driver is a 1.5A fast totem
pole output. It is clamped at 15V. Capacitive loads like
MOSFET gates may cause overshoot. A gate series resis-
tor of at least 5 will prevent the overshoot.
APPLICATIONS INFORMATION
WUUU
Error Amplifier
The error amplifier has a 100dB DC gain and 1.5MHz unity-
gain frequency. It is internally clamped at 12V. The nonin-
verting input is tied to the 7.5V reference.
Current Amplifier
The multiplier output current I
M
flows out of the M
OUT
pin
through the 4k resistor R
MOUT
and develops the reference
signal to the current loop that is controlled by the current
amplifier. Current gain is the ratio of R
MOUT
to line current
sense resistor. The current amplifier is a transconductance
amplifier. Typical g
m
is 320µmho and gain is 60dB with no
load. The inverting input is internally tied to GND. The
noninverting input is tied to the multiplier output. The
output is internally clamped at 8V. Output resistance is
about 4M; DC loading should be avoided because it will
lower the gain and introduce offset voltage at the inputs
which becomes a false reference signal to the current loop
and can distort line current. Note that in the current
averaging operation, high gain at twice the line frequency
is necessary to minimize line current distortion. Because
CA
OUT
may need to swing 5V over one line cycle at high line
condition, 11mV will be present at the inputs of the current
amplifier if gain is rolled off to 450 at 120Hz (1nF in series
with 10k at CA
OUT
). At light load, when (I
M
)(R
MOUT
) can be
less than 100mV, lower gain will distort the current loop
reference signal and line current. If signal gain at the
100kHz switching frequency is too high, the system
behaves more like a current mode system and can cause
subharmonic oscillation. Therefore, the current amplifier
should be compensated to have a gain of less than 15 at
100kHz and more than 300 at 120Hz.
Multiplier
The multiplier is a current multiplier with high noise
immunity in a high power switching environment. The
current gain is:
I
M
= (I
AC
)(I
EA2
)/(200µA)
2
, and
I
EA
= (VA
OUT
– 1.5V)/25k
With a square function, because of the lower gain at light
power load, system stability is maintained and line current
distortion caused by the AC ripple fed back to the error
amplifier is minimized. Note that switching ripple on the
high impedance lines could get into the multiplier from the
I
AC
pin and cause instability. The LT1249 provides an
internal 25k resistor in series with the low impedance
multiplier current input so that only a capacitor from the
I
AC
pin to GND is needed to filter out the noise. Maximum
multiplier output current is limited to 250µA. Figure 1
shows the multiplier transfer curves.
Figure 1. Multiplier Current IM vs IAC and VAOUT
I
AC
(µA)
0
I
M
(µA)
300
150
0
1249 G04
250 500
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
OUT
= 5.5V
VA
OUT
= 5V
VA
OUT
= 4.5V
VA
OUT
= 4V
VA
OUT
= 3.5V
VA
OUT
= 3V
VA
OUT
= 2.5V
VA
OUT
= 2V
LT1249
7
APPLICATIONS INFORMATION
WUUU
Line Current Limiting
Maximum voltage across R
MOUT
is internally limited to
1.1V. Therefore, line current limit is 1.1V divided by the
sense resistor R
S
. With a 0.2 sense resistor R
S
line
current limit is 5.5A. As a general rule, R
S
is chosen
according
RIRV
KP
SM MAX MOUT LINE MIN
OUT MAX
=()()( )
(. )
() ()
()
1 414
where P
OUT(MAX)
is the maximum power output and K is
usually between 1.1 and 1.3 depending on efficiency and
resistor tolerance. When the output is overloaded and line
current reaches limit, output voltage V
OUT
will drop to keep
line current constant. System stability is still maintained
by the current loop which is controlled by the current
amplifier. Further load current increase results in further
V
OUT
drop and clipping of the line current, which degrades
power factor.
Synchronization
The LT1249 can be externally synchronized in a frequency
range of 127kHz to 160kHz. Figure 2 shows the synchro-
nizing circuit. Synchronizing occurs when CA
OUT
pin is
pulled below 0.5V with an external transistor and a Schottky
diode. The Schottky diode and the 10k pull-up resistor are
necessary for the required fast slewing back up to the
normal operating voltage on CA
OUT
after the transistor is
turned off. Positive slewing on CA
OUT
should be faster
than the oscillator ramp rate of 0.5V/µs.
The width of the synchronizing pulse should be under
60ns. The synchronizing pulses introduce an offset volt-
age on the current amplifier inputs, according to:
V
ts fs I V
R
g
OS
CC
m
=+
()() .05
2
ts = pulse width
fs = pulse frequency
I
C
= CA
OUT
source current ( 150µA)
V
C
= CA
OUT
operating voltage (1.8V to 6.8V)
R2 = resistor for the midfrequency “zero” in the current loop
g
m
= current amplifier transconductance ( 320µmho)
With ts = 30ns, fs = 130kHz, V
C
= 3V and R2 = 10k, offset
voltage shift is 5mV. Note that this offset voltage will add
slight distortion to line current at light load.
Figure 2. Synchronizing the LT1249
R1
10k
R2
10k
2k
5V
0V
V
CC
80pF
1N5712
CA
OUT
1nF
2N2369
1249 F02
Overvoltage Protection
In Figure 3, R1 and R2 set the regulator output DC level:
V
OUT
= V
REF
[(R1 + R2)/R2]. With R1 = 1M and R2 = 20k,
V
OUT
is 382V.
Because of the slow loop response necessary for power
factor correction, output overshoot can occur with sudden
load removal or reduction. To protect the power compo-
nents and output load, the LT1249 voltage error amplifier
senses the output voltage and quickly shuts off the current
switch when overvoltage occurs. When overshoot occurs
on V
OUT
, the overcurrent from R1 will go through VA
OUT
because amplifier feedback keeps V
SENSE
locked at 7.5V.
When this overcurrent reaches 44µA amplifier sinking
limit, the amplifier loses feedback and its output snaps low
to turn the multiplier off.
Overvoltage trip level: V
OUT
= (44µA)(R1)
+
V
OUT
VA
OUT
C1
0.47µFR3
330k
0.047µF
LT1249
MULTIPLIER
44µA
22µA
V
SENSE
R1
1M
R2
20k
V
REF
7.5V
EA
1249 F03
Figure 3. Overvoltage Protection
8
LT1249
The Figure 3 circuit therefore has 382V on V
OUT
, and an
overvoltage level = (V
OUT
+ 44V), or 426V. With a 22µA
hysteresis, V
OUT
then has to drop 22V to 404V before
feedback recovers and the switch turns back on.
M
OUT
is a high impedance current output. In the current
loop, offset line current is determined by multiplier offset
current and input offset voltage of the current amplifier.
A negative 4mV current amplifier V
OS
translates into
20mA line current and 5W input power for 250V line if
0.2 sense resistor is used. Under no load or when the
load power is less than this offset input power, V
OUT
would
slowly charge up to an overvoltage state because the
overvoltage comparator can only reduce multiplier output
current to zero. This does not guarantee zero output
current if the current amplifier has offset. To regulate V
OUT
under this condition, the amplifier M1 (see Block Dia-
gram), becomes active in the current loop when VA
OUT
goes down to 1V. The M1 can put out up to 15µA to the 4k
resistor at the inverting input to cancel the current ampli-
fier negative V
OS
and keep V
OUT
error to within 2V.
Undervoltage Lockout
The LT1249 turns on when V
CC
is higher than 16V and
remains on until V
CC
falls below 10V, whereupon the chip
enters the lockout state. In the lockout state, the LT1249
only draws 250µA, the oscillator is off, the V
REF
and the
GTDR pins remain low to keep the power MOSFET off.
Start-Up and Supply Voltage
The LT1249 draws only 250µA before the chip starts at
16V on V
CC
. To trickle start, a 90k resistor from the power
line to V
CC
supplies the trickle current and C4 holds the V
CC
up while switching starts (see Figure 4). Then the auxiliary
winding takes over and supplies the operating current.
Note that D3 and the large value C3, in both Figures 4 and
5, are only necessary for systems that have sudden large
load variation down to minimum load and/or very light
load conditions. Under these conditions, the loop may
exhibit a start/restart mode because switching remains off
long enough for C4 to discharge below 10V. The C3 will
hold V
CC
up until switching resumes. For less severe load
variations, D3 is replaced with a short and C3 is omitted.
The turns ratio between the primary winding and the
APPLICATIONS INFORMATION
WUUU
V
CC
R1
90k
1W
18V
1249 F05
+
C3
390µF
35V
C4
56µF
35V
+
LINE MAIN INDUCTOR
C2
1000pF
450V
D3
D1
D2
Figure 5. Power Supply for LT1249
auxiliary winding determines V
CC
according to: V
OUT
/(V
CC
– 2V) = N
P
/N
S
. For 382V V
OUT
and 18V V
CC
, N
P
/N
S
19.
In Figure 5 a new technique for supply voltage eliminates
the need for an extra inductor winding. It uses capacitor
charge transfer to generate a constant current source
which feeds a Zener diode. Current to the Zener is equal to
(V
OUT
– V
Z
)(C)(f), where V
Z
is Zener voltage and f is
switching frequency. For V
OUT
= 382V, V
Z
= 18V, C =
1000pF and f = 100kHz, Zener current will be 36mA. This
is enough to operate the LT1249, including the FET gate
drive.
Output Capacitor
The peak-to-peak 120Hz output ripple is determined by:
V
P-P
= (2)(I
LOAD
DC)(Z)
where I
LOAD
DC: DC load current
Z: capacitor impedance at 120Hz
For 180µF at 300W load, I
LOAD
DC = 300W/385V = 0.78A,
V
CC
N
P
N
S
R1
90k
1W
C1
2µF
1249 F04
+
+
C2
2µF
C3
390µF
+
C4
56µF
+
LINE
ALL CAPACITORS ARE RATED 35V
MAIN INDUCTOR
D2
D3D1
Figure 4. Power Supply for LT1249
LT1249
9
V
P-P
= (2)(0.78A)(7.4) = 11.5V. If less ripple is desired,
higher capacitance should be used.
The selection of the output capacitor should also be based
on the operating ripple current through the capacitor.
The ripple current can be divided into three major compo-
nents. The first is at 120Hz whose RMS value is related to
the DC load current as follows:
I
1RMS
(0.71)(I
LOAD
DC)
The second component contains the PF switching fre-
quency ripple current and its harmonics. Analysis of this
ripple is complicated because it is modulated with a 120Hz
signal. However, computer numerical integration and Fou-
rier analysis approximate the RMS value reasonably close
to the bench measurements. The RMS value is about
0.82A at a typical condition of 120VAC, 200W load. This
ripple is line voltage dependent, and the worst case is at
low line.
I
2RMS
= 0.82A at 120VAC, 200W
The third component is the switching ripple from the load,
if the load is a switching regulator.
I
3RMS
I
LOAD
DC
For United Chemicon KMH 400V capacitor series, ripple
current multiplier for currents at 100kHz is 1.43. The
equivalent 120Hz ripple current can then be found:
II II
RMS RMS RMS RMS
=
()
+
+
1
22
2
3
2
143 143..
For a typical system that runs at an average load of 200W
and 385V output:
I
LOAD
DC = 0.52A
I
1RMS
(0.71)(0.52A) = 0.37A
I
2RMS
0.82A at 120VAC
I
3RMS
I
LOAD
DC = 0.52A
IA
AA
A
RMS
=
()
+
+
=037 082
143
052
143 077
222
......
APPLICATIONS INFORMATION
WUUU
The 120Hz ripple current rating at 105°C ambient is 0.95A
for the 180µF KMH 400V capacitor. The expected life of the
output capacitor may be calculated from the thermal
stress analysis:
LL
O
CT
KTAMB TO
=
°+ +
()()
()()
2
105
10
∆∆
where
L = expected life time
L
O
= hours of load life at rated ripple current and rated
ambient temperature
T
K
= capacitor internal temperature rise at rated condi-
tion. T
K
= (I
2
R)/(KA), where I is the rated current, R is
capacitor ESR, and KA is a volume constant.
T
AMB
= operating ambient temperature
T
O
= capacitor internal temperature rise at operating
condition
In our example, L
O
= 2000 hours and T
K
= 10°C at rated
0.95A. T
O
can then be calculated from:
∆∆TI
ATA
ACC
ORMS K
=
=
°= °
095
077
095 10 6 6
22
.() .
.().
Assuming the operating ambient temperature is 60°C, the
approximate life time is:
L
O
CC C C
°+ ° °+ °
()()
()(.)
2000 2
105 10 60 6 6
10
57,000 Hrs.
For longer life, capacitor with higher ripple current rating
or parallel capacitors should be used.
Protection Against Abnormal Current Surge
Conditions
The LT1249 has an upper limit on the allowed voltage
across the current sense resistor. The voltage into the
M
OUT
pin connected to this resistor must not exceed –6V
while the chip is running
and –12V under any conditions.
The LT1249 gate drive will malfunction if the M
OUT
pin
voltage exceeds –6V while V
CC
is powered, destroying the
power FET. The 12V absolute limit is imposed by ESD
clamps on the M
OUT
pin. Large currents will flow at
10
LT1249
APPLICATIONS INFORMATION
WUUU
voltages above 8V and the 12V limit is only for surge
conditions.
In normal operation, the voltage into M
OUT
does not
exceed 1.1V, but under surge conditions, the voltage
could temporarily go higher. To date, no field failures due
to surges have been reported for normal LT1249 configu-
rations, but if the possibility exists for extremely large
current surges, please read the following discussion.
Offline switching power supplies can create large current
surges because of the high value storage capacitor used.
The surge can be the result of closing the line switch near
the peak of the AC line voltage, or because of a large
transient in the line itself. These surges are well known in
the power supply business, and are normally controlled
with a negative temperature coefficient thermistor in
series with the rectifier bridge. When power is switched
on, the thermistor is cold (high resistance) and surges are
limited. Current flow in the thermistor causes it to heat and
resistance drops to the point where overall efficiency loss
in the resistor is acceptable.
This basic protection mechanism can be partially defeated
if the power supply is switched off for a few seconds, then
turned back on. The thermistor has not had time to cool
significantly and if the subsequent turn-on catches the AC
line near its peak, the resulting surge is much higher than
normal. Even if this surge current generates a voltage
greater than 6V (but less than 12V) across the sense
resistor, the standard LT1249 application will not be
affected because the chip is not yet powered. Problems are
only created if the V
CC
pin is powered from some external
housekeeping supply that remains powered when bridge
power is switched off.
A huge line voltage surge,
beyond the normal worst-case
limits
, can also create a large current surge. The peak of
the line voltage must significantly exceed the storage
capacitor voltage (typically 380V) for this to occur, so peak
line voltage would probably have to exceed 450V. Such
excessive surges might occur if a very large mains load
was suddenly removed, with a resulting line “kickback”. If
the surge results in voltage at the M
OUT
pin greater than
6V, it must also last more than 30µs (three switch cycles)
to cause FET problems.
External Clamp
The external clamp shown in Figure 6 will protect the
LT1249 M
OUT
pin against extremely large line current
surges (see above). Protection is provided for all V
CC
power methods. The 100 resistor and three diodes limit
the peak negative voltage into M
OUT
to less than 3V.
Current sense gain is attenuated by only 100/4000 =
2.5%. Three diodes are used because the peak negative
voltage into M
OUT
in normal operation could go as high as
–1.1V and the diodes should not conduct more than a few
microamps under this condition.
Figure 6. Protecting MOUT from Extremely High Current Surges
THERMISTOR
100
R
S
SURGE PATH STORAGE
CAPACITOR
M
OUT
LT1249
+
BRIDGE
+
LT1249
11
Dimensions in inches (millimeters) unless otherwise noted.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
U
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.016 – 0.050
(0.406 – 1.270)
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 1298
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
N8 1098
0.100
(2.54)
BSC
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.125
(3.175)
MIN
12 34
8765
0.255 ± 0.015*
(6.477 ± 0.381)
0.400*
(10.160)
MAX
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
0.015
+0.889
0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
12
LT1249
LINEAR T ECHNOLOGY CORPORATION 1994
sn1249 1249fbs LT/TP 0799 2K REV B • PRINTED IN USA
TYPICAL APPLICATION
U
+
+
VA
OUT
7.5V EA
1V
+
M1
+
+
+
I
M
=
I
A
2
I
B
200µA
2
32k
I
A
I
B
I
M
16V/10V
g
m
= 1/3k 0.7V
+
OSC
SYNC
R
S
Q
6
53
4
21
8
MULTIPLIER
I
AC
V
SENSE
M
OUT
7
CA
OUT
V
CC
CA
RUN
RUN
GTDR
16V
35pF
20µA
MAX
250µA
1N5819
4.7nF
1M
0.047µF
0.47µF330k
10k
44µA
22µA
15µA
100pF
1nF
20k
4k
V
OUT
180µF
90V
TO
270V
EMI
FILTER
+
R
MOUT
4k
R
S
0.2
750µH*
1M
MURH860
V
CC
GND
1249 TA01
IRF840
6A
10
7.5V
V
REF
**
1. COILTRONICS CTX02-12236 (TYPE 52 CORE)
AIR MOVEMENT NEEDED AT POWER LEVEL GREATER THAN 250W.
2. COILTRONICS CTX02-12295 (MAGNETICS Kool Mµ
®
77930 CORE)
THIS SCHOTTKY DIODE IS TO CLAMP GTDR WHEN MOS SWITCH TURNS OFF.
PARASITIC INDUCTANCE AND GATE CAPACITANCE MAY TURN ON CHIP SUBSTRATE
DIODE AND CAUSE ERRATIC OPERATIONS IF GTDR IS NOT CLAMPED.
*
**
† SEE APPLICATIONS INFORMATION SECTION FOR CIRCUITRY TO SUPPLY POWER TO V
CC
.
+
Kool Mµ is a registered trademark of Magnetics, Inc.
PART NUMBER DESCRIPTION COMMENTS
LT1103 Off-Line Switching Regulator Universal Off-Line Inputs with Outputs to 100W
LT1248 Full Feature Average Current Mode Power Factor Controller Provides All Features in 16-Lead Package
LT1508 Power Factor and PWM Controller Simplified PFC Design
LT1509 Power Factor and PWM Controller Complete Solution for Universal Off-Line Switching Power Supplies
RELATED PARTS
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear-tech.com