Revised February 2005 74LVX08 Low Voltage Quad 2-Input AND Gate General Description Features The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Input voltage level translation from 5V to 3V Ideal for low power/low noise 3.3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number Package Package Description Number 74LVX08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX08SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX08MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX08MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions (c) 2005 Fairchild Semiconductor Corporation Pin Names Description An , Bn Inputs On Outputs DS011602 www.fairchildsemi.com 74LVX08 Low Voltage Quad 2-Input AND Gate May 1993 74LVX08 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions (Note 3) 0.5V to 7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI Supply Voltage (VCC) 0.5V 20 mA 0.5V to 7V DC Input Voltage (VI) VO 0V to 5.5V Output Voltage (VO) DC Output Diode Current (IOK) VO 2.0V to 3.6V Input Voltage (VI) 0V to VCC 40qC to 85qC Operating Temperature (TA) 0.5V VCC 0.5V 20 mA 20 mA 0.5V to VCC 0.5V DC Output Voltage (VO) Input Rise and Fall Time ('t/'V) 0 ns/V to 100 ns/V DC Output Source r25 mA or Sink Current (IO) DC VCC or Ground Current Note 2: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. r50 mA 65qC to 150qC (ICC or IGND) Storage Temperature (TSTG) Power Dissipation 180 mW Lead Temperature (TL) Note 3: Unused inputs must be held HIGH or LOW. They may not float. 240qC (Soldering, 10 seconds) DC Electrical Characteristics Symbol VIH VIL VOH VOL VCC Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage TA Min 25qC TA Typ Max 40qC to 85qC Min 2.0 1 1.5 3.0 2.0 2.0 3.6 2.4 2.4 0.5 0.5 3.0 0.8 0.8 3.6 0.8 0.8 1.9 2.0 1.9 3.0 2.9 3.0 2.9 3.0 2.58 Conditions V 2.0 2.0 Units Max V VIN VIL or VIH V 2.48 2.0 0.0 3.0 0.0 0.1 IOH 50 PA IOH 50 PA IOH 0.1 0.1 0.1 3.0 0.36 0.44 VIN 50 PA IOL 50 PA IOL 4 mA V IIN Input Leakage Current 3.6 r0.1 r1.0 PA VIN 5.5V or GND ICC Quiescent Supply Current 3.6 2.0 20.0 PA VIN VCC or GND Noise Characteristics (Note 4) Symbol Parameter TA VCC (V) Typ 25qC Limit Units CL (pF) VOLP Quiet Output Maximum Dynamic VOL 3.3 0.3 0.5 V 50 VOLV Quiet Output Minimum Dynamic VOL 3.3 0.3 0.5 V 50 VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50 VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50 Note 4: Input tr tf 3 ns www.fairchildsemi.com 2 4 mA V IL or VIH IOL Symbol tPLH VCC Parameter (V) Propagation Delay Time TA Min 2.7 tPHL 3.3 r 0.3 25qC Typ TA 40qC to 85qC Min Max 6.3 11.4 1.0 13.5 15 8.8 14.9 1.0 17.0 50 4.8 7.1 1.0 8.5 7.3 10.6 1.0 12.0 tOSLH Output to Output Skew 2.7 1.5 1.5 tOSHL (Note 5) 3.3 1.5 1.5 Note 5: Parameter guaranteed by design. tOSLH |t PLHm tPLHn|, tOSHL CL (pF) Units Max ns 15 50 50 ns |t PHLm tPHLn| Capacitance Symbol TA Parameter Min 25qC TA Typ Max 10 CIN Input Capacitance 4 CPD Power Dissipation 18 40qC to 85qC Min Units Max 10 pF pF Capacitance (Note 6) Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. 3 www.fairchildsemi.com 74LVX08 AC Electrical Characteristics 74LVX08 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74LVX08 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74LVX08 Low Voltage Quad 2-Input AND Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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