Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
http://www.cirrus.com
Evaluation Board for CS4365
Features
Demonstrates recommended layout and
grounding arrangements
CS8416 receives S/PDIF, & EIAJ-340
compatible digital audio
Headers for external audio input for either PCM
or DSD®
Requires only a digital signal source and power
supplies for a complete Digital-to-analog
converter system
Description
The CDB4365 evaluation board is an excellent means
for quickly evaluating the CS4365 24-bit, 48-pin, 6-
channel D/A converter. Evaluation requires an analog
signal analyzer, a digital signal source, a PC for control-
ling the CS4365 (only required for control port mode),
and a power supply. Analog line-level outputs are pro-
vided via RCA phono jacks.
The CS8416 digital audio receiver IC provides the sys-
tem timing necessary to operate the digital-to-analog
converter and will accept S/PDIF and EIAJ-340-com-
patible audio data. The evaluation board may also be
configured to accept external timing and data signals for
operation in a user application during system
development.
ORDERING INFORMATION
CDB4365 Evaluation Board
CS4365 Analog Outputs
and Filtering
Inputs for PCM
Clocks and Data
CS8416
Digital Audio
Interface
Hardware or
Software Board
Control
Inputs for DSD
Clocks and Data
MAY '08
DS670DB3
CDB4365
2DS670DB3
CDB4365
TABLE OF CONTENTS
1. CS4365 DIGITAL-TO-ANALOG CONVERTER ..................................................................................... 4
2. CS8416 DIGITAL AUDIO RECEIVER .................................................................................................... 4
3. INPUT FOR CLOCKS AND DATA ......................................................................................................... 4
4. INPUT FOR CONTROL DATA ............................................................................................................... 4
5. POWER SUPPLY CIRCUITRY ............................................................................................................... 5
6. GROUNDING AND POWER SUPPLY DECOUPLING .......................................................................... 5
7. ANALOG OUTPUT FILTERING .............. ... ... ......................................................................................... 5
8. PERFORMANCE PLOTS ....................................................................................................................... 7
9. CDB4365 SCHEMATICS ..................................................................................................................... 17
10. REVISION HISTORY ......................................................................................................................... 30
LIST OF FIGURES
Figure 1.FFT (48 kHz, 0 dB) ..... ... ... ... .... ... ... ... ... .... ... ... ... .... ... ................... ... .... ................... ... ..................... 7
Figure 2.FFT (48 kHz, -60 dB) ............... ... ... ... ... .... ... ... ... .................... ... ... .................... ... ... ........................ 7
Figure 3.FFT (48 kHz, No Input) ................................................................................................................. 7
Figure 4.FFT (48 kHz Out-of-Band, No Input) ............................................................................................. 7
Figure 5.FFT (48 kHz, -60 dB Wideband) .............. ... ... ... .... ... ... ... .... ... ... ... ... .... ... ................... ... .... .............. 8
Figure 6.FFT (IMD 48 kHz) ......................................................................................................................... 8
Figure 7.48 kHz, THD+N vs. Input Freq .................... ... ... .... ... ... ... .... ................... ................... ..................... 8
Figure 8.48 kHz, THD+N vs. Level .............. ... ... ......................................................................................... 8
Figure 9.48 kHz, Fade-to-Noise Linearity . ... ... ... .... ... ... ... .... ... ... ... .... ... ... ... ... .... ... ... ... .... .............................. 8
Figure 10.48 kHz, Frequency Response ... ... ... ... .... ... ... ... .... ... ... ... .................... ... ... ................... .... ... ........... 8
Figure 11.48 kHz, Crosstalk ................... ... .................................................................................................. 9
Figure 12.48 kHz, Impulse Response ......................................................................................................... 9
Figure 13.48 kHz, Impulse Prefilter .............. ... ... .... ... ... .................... ... ... ................... .... ... ........................... 9
Figure 14.48 kHz Dynamic Range ............... ... ... .... ... ... ... .... ... ... ................... .... ... ................... ... .... ............ 10
Figure 15.FFT (96 kHz, 0 dB) ................................................................................................................... 10
Figure 16.FFT (96 kHz, -60 dB) ................................................................................................................ 10
Figure 17.FFT (96 kHz, No Input) ............................................................................................................. 11
Figure 18.FFT (96 kHz Out-of-Band, No Input) ......................................................................................... 11
Figure 19.FFT (96 kHz, -60 db Wideband) ............................................................................................... 11
Figure 20.FFT (IMD 96 kHz) ..................................................................................................................... 11
Figure 21.96 kHz, THD+N vs. Input Freq .................................................................................................. 11
Figure 22.96 kHz, THD+N vs. Level ...... ... ... ... .......................................................................................... 11
Figure 23.96 kHz, Fade-to-Noise Linearity ............... ... ... .... ... ... ... .... ......................................................... 12
Figure 24.96 kHz, Frequency Response ... ... ... ... .... ... ... ... .... ... ... ... .................... ... ... ................... .... ... ......... 12
Figure 25.96 kHz, Crosstalk ................... ... ................................................................................................ 12
Figure 26.96 kHz, Impulse Response ....................................................................................................... 12
Figure 27.96 kHz, Impulse Prefilter .............. ... ... .... ... ... .................... ... ... ................... .... ... ......................... 12
Figure 28.Dynamic Range 96 kHz ............................................................................................................ 13
Figure 29.FFT (192 kHz, 0 dB) ................................................................................................................. 13
Figure 30.FFT (192 kHz, -60 dB) .............................................................................................................. 13
Figure 31.FFT (192 kHz, No Input) ........................................................................................................... 14
Figure 32.FFT (192 kHz Out-of-Band, No Input) ....................................................................................... 14
Figure 33.FFT (192 kHz, -60 dB Wideband) ............................................................................................. 14
Figure 34.FFT (IMD 192 kHz) ................................................................................................................... 14
Figure 35.192 kHz, THD+N vs. Input Freq ................................................................................................ 14
Figure 36.192 kHz, THD+N vs. Level ....................................................................................................... 14
Figure 37.192 kHz, Fade-to-Noise Linearity ............................................................................................. 15
Figure 38.192 kHz, Frequency Response .......... .......... .......... .......... ......... .......... .......... ......... .......... ......... 15
Figure 39.192 kHz, Crosstalk .................................................................................................................... 15
DS670DB3 3
CDB4365
Figure 40.192 kHz, Impulse Response ..................................................................................................... 15
Figure 41.192 kHz, Impulse Prefilter ......................................................................................................... 15
Figure 42.Dynamic Range 192 kHz .......................................................................................................... 16
Figure 43.System Block Diagram and SIgnal Flow ................................................................................... 17
Figure 44.CS4365 ..................................................................................................................................... 18
Figure 45.Analog Outputs A1 - B1 ............................................................................................................ 19
Figure 46.Analog Outputs A2 - B2 ............................................................................................................ 20
Figure 47.Analog Outputs A3 - B3 ............................................................................................................ 21
Figure 48.CS8416 S/PDIF Input ............................................................................................................... 22
Figure 49.PCM Input Header and Muxing ................................................................................................. 23
Figure 50.DSD Input Header ..................................................................................................................... 24
Figure 51.Control Input ............................................................................................................................. 25
Figure 52.Power Inputs ............................................................................................................................. 26
Figure 53.Silkscreen Top .......................................................................................................................... 27
Figure 54.Top Side .................................................................................................................................... 28
Figure 55.Bottom Side .............................................................................................................................. 29
LIST OF TABLES
Table 1. System Connections .................................................................................................................... 5
Table 2. CDB4365 Jumper Settings ............................................................................................................ 6
4DS670DB3
CDB4365
CDB4365 SYSTEM OVERVIEW
The CDB4365 evaluation board is an excellent means of quickly evaluating the CS4365. The CS8416 digital audio
interface receiver provide s an easy interface to digital au dio signal sources including the majority of digital a udio test
equipment. The eval uation board also allows the user to sup ply external PCM or DSD clocks and data throug h PCB
headers for system develop ment.
The CDB4365 uses the CDB4 385 as a base PCB board. Fo r this reason, there may be additional circuitry on board
which is not populated as it has no function for this device.
The CDB4365 schematic has been partitioned into 9 schematics shown in Figure 44 through 52. Each partitioned
schematic is represented in the system diagram shown in Figure Figure 43 on page 17. Notice that the system dia-
gram also includes the interconnections betwee n the partitioned schematics.
1. CS4365 DIGITAL-TO-ANALOG CONVERTER
A description of the CS4365 is included in the CS4365 datasheet.
2. CS8416 DIGITAL AUDIO RECEIVER
The system receives and decodes the standard S/PDIF data format using a CS8416 digital audio receiver
(Figure 48). The outputs of the CS8416 include a serial bit clock, serial data, left-right clock, and a 128/256 Fs mas-
ter clock. The CS8416 data format is fixe d to I²S. Th e opera tion of the CS8416 and a di scussion of the d igital au dio
interface are included in the CS8416 datasheet.
The evaluation board has been designed such that the input can be either optical or coaxial (See Figure 48). How-
ever, both inputs cannot be dr iven simultaneously.
Switch position 7 of S1 sets the output MCLK-to-LRCK ratio of the CS8416. This switch should be set to 256 (closed)
for inputs Fs≤96 kHz and 128 (open) for Fs≥64 kHz. The 8416 must be manually reset using ‘HW RST’ (S2) or
through the software when this switch is changed.
3. INPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to ex ternal systems via headers J11 and J7. Header
J11 allows the evaluation board to accept externally generated PCM clocks and data. The schematic for the
clock/data input is shown in Figure 49. Switch position 6 of S1 selects the source as either CS8416 (ope n) or header
J11 (closed).
Header J7 allows the evaluation board to accept externally generated DSD data and clocks. The schematic for the
clock/data input is shown in Figure 50. A synchronous MCLK must still be provided via Header J11. Switch position
8 of S1 selects either PCM (open) or DSD (closed).
Please see the CS 43 6 5 data sh ee t for mo re info rm at ion .
4. INPUT FOR CONTROL DATA
The evaluation board can b e run in eith er a stand-alon e mode o r with a PC. Stand-alone mode uses the CS4365 in
hardware mode a nd the mode pins are configured u sing switch positions 1 through 5 of S1. PC mode uses software
to setup the CS4365 thr ou gh I²C ® using the PC’s serial or USB ports. PC mode is automatically selected when the
serial or USB port is attached and the CDB4365 software is running.
Header J15 offe rs the option for external input of RST and SPI™/I²C clocks and data. The board is setup from the
factory to use the on-board microcontroller in conjunction with the supplied software. To use an external control
DS670DB3 5
CDB4365
source, remove the shunts on J15 and place a ribbon cable so the signal lines are on the center row and the grounds
are on the right side. R116 and R119 should be populated with 2-kΩ resistors when using an external I²C source
that does not already provide pull-ups.
5. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by four binding posts: GND, +5V, +12V, and -12V (See Figure 52). The
‘+5V’ terminal supplies VA and the rest of the +5-V circuitry on the board. The +3.3-V circuitry is powered from a
regulator. Th e +2.5 volts required fo r VD is also provide d from an on-board r egulator. The +5- V supply should be
set within the recommended values for VA stated in the CS436 5 datasheet.
WARNING: Refer to the CS4365 datasheet for maximum allowable voltage levels. Operation o utside this range can
cause permanent damage to the device.
6. GROUNDING AND POWER SUPPLY DECOUPLING
As with any high-performance converter, the CS4365 requires careful attention to power supply and grounding ar-
rangements to optimize performance. Figure 44 details the connections to the CS4365 and Figures 53, 54, and 55
show the component placement and top and bottom layout. The decoupling capacitors are located as close to the
CS4365 as possible. Extensive use of ground plane fill in the eval uation board yields large reductions in radiated
noise.
7. ANALOG OUTPUT FILTERING
The analog output on the CDB4365 has been designed according to the CS4365 datasheet. This output circuit in-
cludes an active 2-pole, 50-kHz filter which uses the multiple-feedback topology.
Table 1. System Connections
CONNECTOR INPUT/OUTPUT SIGNAL PRESENT
+5V Input + 5 V power
GND Input Ground connection from power supply
+12V Input +12 V positive supply for the on-board filtering
-12V Input -12 V negative supply for the on-board filtering
S/PDIF IN - J9 Input Digital audio interface input via coax
S/PDIF IN - OPT1 Input Digital audio interface input via optical
PCM INPUT - J11 Input Input for master, serial, left/right clocks and serial data
DSD INPUT - J7 Input Input for DSD serial clock and DSD data
OUTA1-B3 Output RCA li ne level analog outputs
6DS670DB3
CDB4365
Table 2. CDB4365 Jumper Settings
JUMPER /
SWITCH PURPOSE POSITION FUNCTION SELECTED
J15 Selects source of control data *shunts on Left
shunts removed *Control from PC and on-board microcontrolle r
External control input using center and right column s
J16 JTAG micro programming - Reserved for factory use only
S2 Resets CS8416 and CS4365 The CS8416 must be reset if switch S1 is changed
S1
CS4365 mode settings M0-M4 1-5 Default: M0, M4 open (HI)
M1, M2, M3 closed (LO)
Sets clock source 6 Sets clock source for CS4365
*open = RX(CS8416), closed = EXT(J11)
Sets MCLK ratio of CS8416 7 Selects 128x (open) or 256x (*closed) MCLK/LRCK ratio
output for CS8416
Selects PCM or DSD mode 8 For PCM input set to *Open, for DSD set to Closed
*Default Factory Settings
DS670DB3 7
CDB4365
8. PERFORMANCE PLOTS
The plots in the following section were ache ived using an Audio Precision System 2700 and a randomly chosen p ro-
duction CDB4365. In some cases the per formance may be limited by the CDB4365. All measurements we re taken
at room temp using the standard AP filter options (20 Hz to 22 kHz) with default board settings and nominal
datasheet voltag e s ap plie d unle ss oth e rwis e no te d.
The impulse response plots were taken both pre-and post filtering as the off-chip filter was degrading the perfor-
mance at higher sample rates. The pre-filter impulse response plots were taken directly at the output pins of the
DAC (with the analog filter still connected) to show the effect of the CDB’s analog filtering on the impulse response
(as the analog filtering adds its own signature to the impulse response of the DAC, and in the case of the higher
sampling rates it was band-limiting it).
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 1. FFT (48 kHz, 0 dB) Figure 2. FFT (48 kHz, -60 dB)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20k 120k40k 60k 80k 100k
Hz
Figure 3. FFT (48 kHz, No Input) Figure 4. FFT (48 kHz Out-of-Band, No Input)
8DS670DB3
CDB4365
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
2k 20k4k 6k 8k 10k 12k 14k 16k 18k
Hz
Figure 5. FFT (48 kHz, -60 dB Wideband) Figure 6. FFT (IMD 48 kHz)
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
-120 +0-100 -80 -60 -40 -20
dBFS
Figure 7. 48 kHz, THD+N vs. Input Freq Figure 8. 48 kHz, THD+N vs. Level
-40
+40
-35
-30
-25
-20
-15
-10
-5
+0
+5
+10
+15
+20
+25
+30
+35
d
B
r
A
-140 +0-120 -100 -80 -60 -40 -20
dBFS
-5
+5
-4
-3
-2
-1
+0
+1
+2
+3
+4
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 9. 48 kHz, Fade-to-Noise Linearity Figure 10. 48 kHz, Frequency Response
DS670DB3 9
CDB4365
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-3
3
-2.5
-2
-1.5
-1
-500m
0
500m
1
1.5
2
2.5
V
03m500u 1m 1.5m 2m 2.5m
sec
Figure 11. 48 kHz, Crosstalk Figure 12 . 48 kHz, Impulse Response
-3
3
-2.5
-2
-1.5
-1
-500m
0
500m
1
1.5
2
2.5
V
03m500u 1m 1.5m 2m 2.5m
sec
Figure 13. 48 kHz, Impulse Prefilter
DS670DB3 11
CDB4365
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20k 120k40k 60k 80k 100k
Hz
Figure 17. FFT (96 kHz, No Input) Figure 18. FFT (96 kHz Out-of-Band, No Input)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 40k50 100 200 500 1k 2k 5k 10k 20k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
2k 20k4k 6k 8k 10k 12k 14k 16k 18k
Hz
Figure 19. FFT (96 kHz, -60 db Wideband) Figure 20. FFT (IMD 96 kHz)
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
-120 +0-100 -80 -60 -40 -20
dBFS
Figure 21. 96 kHz, THD+N vs. Input Freq Figure 22. 96 kHz, THD+N vs. Level
12 DS670DB3
CDB4365
-5
+5
-4
-3
-2
-1
+0
+1
+2
+3
+4
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-40
+40
-35
-30
-25
-20
-15
-10
-5
+0
+5
+10
+15
+20
+25
+30
+35
d
B
r
A
-140 +0-120 -100 -80 -60 -40 -20
dBFS
Figure 23. 96 kHz, Fade-to-Noise Linearity Figure 24. 96 kHz, Frequency Response
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-3
3
-2.5
-2
-1.5
-1
-500m
0
500m
1
1.5
2
2.5
V
01.5m250u 500u 750u 1m 1.25m
sec
Figure 25. 96 kHz, Crosstalk Figure 26. 96 kHz, Impulse Response
-3
3
-2.5
-2
-1.5
-1
-500m
0
500m
1
1.5
2
2.5
V
01.5m250u 500u 750u 1m 1.25m
sec
Figure 27. 96 kHz, Impulse Prefilter
14 DS670DB3
CDB4365
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20k 120k40k 60k 80k 100k
Hz
Figure 31. FFT (192 kHz, No Input) Figure 32. FFT (1 92 kHz Out-of-Band, No Input)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
2k 20k4k 6k 8k 10k 12k 14k 16k 18k
Hz
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 90k50 100 200 500 1k 2k 5k 10k 20k 50k
Hz
Figure 33. FFT (192 kHz, -60 dB Wideband) Figure 34. FFT (IMD 192 kHz)
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-120
+0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
-120 +0-100 -80 -60 -40 -20
dBFS
Figure 35. 192 kHz, THD+N vs. Input Freq Figure 36. 192 kHz, THD+N vs. Level
DS670DB3 15
CDB4365
-40
+40
-35
-30
-25
-20
-15
-10
-5
+0
+5
+10
+15
+20
+25
+30
+35
d
B
r
A
-140 +0-120 -100 -80 -60 -40 -20
dBFS
-5
+5
-4
-3
-2
-1
+0
+1
+2
+3
+4
d
B
r
A
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 37. 192 kHz, Fade-to-Noise Linearity Figure 38. 192 kHz, Frequency Response
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-3
3
-2.5
-2
-1.5
-1
-500m
0
500m
1
1.5
2
2.5
V
0600u200u 400u
sec
Figure 39. 192 kHz, Crosstalk Figure 40. 192 kHz, Impulse Response
-3
3
-2.5
-2
-1.5
-1
-500m
0
500m
1
1.5
2
2.5
V
0600u200u 400u
sec
Figure 41. 192 kHz, Impu lse Prefilter
DS670DB3 17
CDB4365
9. CDB4365 SCHEMATICS
CS4365
CS8416
S/PDIF
Input
Serial Control Port
PCM mux
PCM Clocks/Data
PCM Clocks/Data
I2C/S PI Header
Power
DSD Clocks/
Dat
a
DSD HEADER
2
2
DSD clk_enable
PCM Clocks/Data
DSD input
enable
M0
- M4
switche
s
( for
stand -alone
mode )
PCM source
select
C
S841
6 clock setting
Hardware Control
Switches
PCM HEADER
2
A1, B1
A2, B2
A3, B3
Differential to Single-Ended
Analog Outputs
Figure 52 on page 26
Figure 45 on page 19
Figure 46 on page 20
Figure 47 on page 21
Figure 51 on page 25 Figure 50 on page 24
Figure 49 on
page 23
Figure 48 on
page 22
Figure 49 on
page 23
Figure 51 on page 25
Figure 43. System Block Dia gram and SIgnal Flow
30 DS670DB3
CDB4365
10.REVISION HISTORY
Release Changes
DB1 Initial Release
DB2 Added Performance Plots
DB3 Added USB support to Section 4. Input for Control Data
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com.
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in thi s document is acc urate and re liable. However, the information is subject
to chang e without notice an d is provi ded "AS IS" without war ranty of any kind (e xpress or implied). Customers are advi sed to ob tain the latest version of relevant
information to ve rify, befor e pla cin g or ders, tha t info rm ation bein g rel ied o n is cu rrent and comp le te. All prod ucts are sold subject to the terms and conditions of sale
supplied at the tim e of order ackno wledgment, in cluding those perta ining to warranty, ind emnification, an d limitation of lia bility. No respon sibility is assum ed by Cirru s
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herei n and gives con-
sent for copies to be made of the in formation only for use within your organizatio n with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying for gene ral distri bu tion , adve rtisi ng or pr omotional purp oses, or for creating an y w o r k fo r resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
ERTY OR EN VIRONMENTAL DAM AGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE
IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PROD UCTS OR OTHER CRIT-
ICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND
CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCH ANTABILITY
AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR
CUSTOMER’S CUSTOMER USES OR PERMITS TH E U SE OF CIRRUS PRODUCT S IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH U SE, TO
FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUT ORS AN D OTHE R A GEN T S F ROM ANY AND ALL LIABILITY, INCLUD-
ING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirru s, and th e Cirru s Log ic logo de signs a re trad em arks of Cirrus Lo gic, Inc. All other b rand an d pro duct na me s in this d ocumen t ma y be trad em arks
or service marks of their respective owners.
DSD is a registered trademark of Sony Kabushiki Kaisha TA Sony Company.
I²C is a registered trademark of Philips Semiconductor.
SPI is a trademark of Motorola, Inc.
