SN74LS365A, SN74LS367A, SN74LS368A 3-State Hex Buffers These devices are high speed hex buffers with 3-state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When the Output Enable (E) is HIGH, the outputs are forced to a high impedance "off" state. If the outputs of the 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so there is no overlap. http://onsemi.com LOW POWER SCHOTTKY GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 C TA Operating Ambient Temperature Range IOH Output Current - High -2.6 mA IOL Output Current - Low 24 mA 16 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Semiconductor Components Industries, LLC, 2001 October, 2001 - Rev. 7 1 Device Package Shipping SN74LS365AN 16 Pin DIP 2000 Units/Box SN74LS365AD SOIC-16 38 Units/Rail SN74LS365ADR2 SOIC-16 2500/Tape & Reel SN74LS367AN 16 Pin DIP 2000 Units/Box SN74LS367AD SOIC-16 38 Units/Rail SN74LS367ADR2 SOIC-16 2500/Tape & Reel SN74LS368AN 16 Pin DIP 2000 Units/Box SN74LS368AD SOIC-16 38 Units/Rail SN74LS368ADR2 SOIC-16 2500/Tape & Reel Publication Order Number: SN74LS365A/D SN74LS365A, SN74LS367A, SN74LS368A SN74LS365A HEX 3-STATE BUFFER WITH COMMON 2-INPUT NOR ENABLE VCC E2 16 15 14 13 12 11 10 9 1 E1 2 3 4 5 6 7 8 GND TRUTH TABLE INPUTS OUTPUT E1 E2 D L L H X L L X H L H X X L H (Z) (Z) SN74LS367A HEX 3-STATE BUFFER SEPARATE 2-BIT AND 4-BIT SECTIONS VCC E 16 15 14 13 12 11 10 1 E 2 3 4 5 6 7 SN74LS368A HEX 3-STATE INVERTER BUFFER SEPARATE 2-BIT AND 4-BIT SECTIONS VCC E 9 16 15 14 13 12 11 10 9 8 GND 1 E 2 3 4 5 6 7 8 GND TRUTH TABLE INPUTS E D L L H L H X TRUTH TABLE INPUTS OUTPUT L H (Z) http://onsemi.com 2 E D L L H L H X OUTPUT H L (Z) SN74LS365A, SN74LS367A, SN74LS368A DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IOZH IOZL IIH Min Typ Max 2.0 0.8 -0.65 2.4 -1.5 3.1 IOS ICC Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = -18 mA V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 0.25 0.4 V IOL = 12 mA 0.35 0.5 V IOL = 24 mA Output Off Current HIGH 20 A VCC = MAX, VOUT = 2.7 V Output Off Current LOW -20 A VCC = MAX, VOUT = 0.4 V 20 A VCC = MAX, VIN = 2.7 V 0.1 mA VCC = MAX, VIN = 7.0 V -0.4 mA VCC = MAX, VIN = 0.4 V -20 A VCC = MAX, VIN = 0.5 V Either E Input at 2.0 V -0.4 mA VCC = MAX, VIN = 0.4 V Both E Inputs at 0.4 V -225 mA VCC = MAX 24 mA VCC = MAX Input HIGH Current Input LOW Current E Inputs IIL Unit D Inputs Short Circuit Current (Note 1) -40 Power Supply Current LS365A, 367A LS368A 21 Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25C, VCC = 5.0 V) Limits LS365A/LS367A Typ Max Typ Max Unit Propagation Delay 10 9.0 16 22 7.0 12 15 18 ns tPZH tPZL Output Enable Time 19 24 35 40 18 28 35 45 ns tPHZ tPLZ Output Disable Time 32 35 ns Symbol tPLH tPHL Parameter Min LS366A/LS368A Min 30 35 http://onsemi.com 3 Test Conditions CL = 45 pF, F, RL = 667 CL = 5.0 pF SN74LS365A, SN74LS367A, SN74LS368A PACKAGE DIMENSIONS 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. N SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE R -A- B F C DIM A B C D F G H J K L M S L S SEATING PLANE -T- K H G D M J 16 PL 0.25 (0.010) T A M D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J -A- 16 9 -B- 1 M P 0.25 (0.010) M B S G R K F X 45 C -T- SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0 10 0.51 1.01 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 8 INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0 10 0.020 0.040 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.229 0.244 0.010 0.019 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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