January 1995 5
Philips Semiconductors Product specification
BCD to 7-segment latch/decoder/driver HEF4543B
MSI
AC CHARACTERISTICS
VSS = 0 V; Tamb =25°C; CL= 50 pF; input transition times ≤20 ns
VDD
VSYMBOL MIN. TYP. MAX. TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
Dn→On5 180 360 ns 153 ns +(0,55 ns/pF) CL
HIGH to LOW 10 tPHL 75 150 ns 64 ns +(0,23 ns/pF) CL
15 55 110 ns 47 ns +(0,16 ns/pF) CL
5 180 360 ns 153 ns +(0,55 ns/pF) CL
LOW to HIGH 10 tPLH 75 150 ns 64 ns +(0,23 ns/pF) CL
15 55 110 ns 47 ns +(0,16 ns/pF) CL
LD →On5 170 340 ns 143 ns +(0,55 ns/pF) CL
HIGH to LOW 10 tPHL 80 160 ns 69 ns +(0,23 ns/pF) CL
15 60 120 ns 52 ns +(0,16 ns/pF) CL
5 190 380 ns 163 ns +(0,55 ns/pF) CL
LOW to HIGH 10 tPLH 80 160 ns 69 ns +(0,23 ns/pF) CL
15 60 120 ns 52 ns +(0,16 ns/pF) CL
BI →On5 145 290 ns 118 ns +(0,55 ns/pF) CL
HIGH to LOW 10 tPHL 65 130 ns 54 ns +(0,23 ns/pF) CL
15 45 90 ns 37 ns +(0,16 ns/pF) CL
5 125 250 ns 98 ns +(0,55 ns/pF) CL
LOW to HIGH 10 tPLH 55 110 ns 54 ns +(0,23 ns/pF) CL
15 40 80 ns 32 ns +(0,16 ns/pF) CL
Output transition times 5 60 120 ns 10 ns +(1,0 ns/pF) CL
HIGH to LOW 10 tTHL 30 60 ns 9 ns +(0,42 ns/pF) CL
15 20 40 ns 6 ns +(0,28 ns/pF) CL
5 60 120 ns 10 ns +(1,0 ns/pF) CL
LOW to HIGH 10 tTLH 30 60 ns 9 ns +(0,42 ns/pF) CL
15 20 40 ns 6 ns +(0,28 ns/pF) CL
Minimum LD 5 60 30 ns
pulse width; HIGH 10 tWLDH 30 15 ns
15 20 10 ns
Set-up time 5 40 20 ns
Dn→LD 10 tsu 20 5 ns
15 15 0 ns
Hold time 5 0 −15 ns
Dn→LD 10 thold 15 0 ns
15 20 5 ns