HMPS-282x Series
MiniPak Surface Mount RF Schottky Barrier Diodes
Data Sheet
Description/Applications
These ultra-miniature products represent the blend-
ing of Avago Technologies’ proven semiconductor and
the latest in leadless packaging. This series of Schottky
diodes is the most consistent and best all-round device
available, and finds applications in mixing, detecting,
switching, sampling, clamping and wave shaping at fre-
quencies up to 6 GHz. The MiniPak package offers
reduced parasitics when compared to conventional
leaded diodes, and lower thermal resistance.
The HMPS-282x family of diodes offers the best all-
around choice for most applications, featuring low
series resistance, low forward voltage at all current
levels and good RF characteristics.
Note that Avago’s manufacturing techniques assure
that dice found in pairs and quads are taken from
adjacent sites on the wafer, assuring the highest
degree of match.
Features
Surface mount MiniPak package
– low height, 0.7 mm (0.028") max.
– small footprint, 1.75 mm2 (0.0028 inch2)
Better thermal conductivity for higher power dissipation
Single and dual versions
Matched diodes for consistent performance
Low turn-on voltage (as low as 0.34 V at 1 mA)
Low FIT (Failure in Time) rate*
Six-sigma quality level
* For more information, see the Surface Mount Schottky Reliability
Data Sheet.
Pin Connections and Package Marking
3
2
Product code Date code
4
AA
1
Package Lead Code Identification (Top View)
Single
3
2
4
1
#0
Anti-parallel
3
2
4
1
#2
Parallel
3
2
4
1
#5
Notes:
1. Package marking provides orientation and identification.
2. See “Electrical Specifications” for appropriate package marking.
2
HMPS-282x Series Absolute Maximum Ratings[1], TC = 25°C
Symbol Parameter Units MiniPak 1412
IfForward Current (1 µs pulse) A 1
PIV Peak Inverse Voltage V 15
TjJunction Temperature °C 150
Tstg Storage Temperature °C -65 to +150
θjc Thermal Resistance[2] °C/W 150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made
to the circuit board.
Electrical Specifications, TC = +25°C, Single Diode[4]
Maximum Maximum
Minimum Maximum Forward Reverse Typical
Part Package Breakdown Forward Voltage Leakage Maximum Dynamic
Number Marking Lead Voltage Voltage VF (V) @ IR (nA) @ Capacitance Resistance
HMPS- Code Code Configuration VBR (V) VF (mV) IF (mA) VR (V) CT (pF) RD ()[4]
2820 L 0 Single 15 340 0.5 10 100 1 1.0 12
2822 K 2 Anti-parallel
2825 J 5 Parallel
Test Conditions IR = 100 µAI
F = 1 mA[1] VF = 0 V IF = 5 mA
f = 1 MHz[2]
Notes:
1. VF for diodes in pairs is 15 mV maximum at 1 mA.
2. CTO for diodes in pairs is 0.2 pF maximum.
3. Effective carrier lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.
4. RD = RS + 5.2 at 25°C and If = 5 mA.
ESD WARNING:
Handling Precautions Should Be Taken To
Avoid Static Discharge.
3
Cj
Rj
RS
R
j
= 8.33 X 10
-5
nT
I
b
+ I
s
where
I
b
= externally applied bias current in amps
I
s
= saturation current (see table of SPICE parameters)
T
= temperature, °K
n = ideality factor (see table of SPICE parameters)
R
S
= series resistance (see Table of SPICE parameters)
C
j
= junction capacitance (see Table of SPICE parameters)
Linear Equivalent Circuit Model Diode Chip SPICE Parameters
Parameter Units HMPS-282x
BVV15
CJ0 pF 0.7
EGeV 0.60
IBV A 1E-4
ISA 2.2E-8
N 1.08
RS8.0
PBV 0.65
PT2
M 0.5
Linear Circuit Model of the Diode’s Package
30 fF 30 fF
20 fF
20 fF
1.1 nH
Single diode package (HMPx-x8x0)
2
3
1
4
30 fF 30 fF
20 fF
20 fF
12 fF
12 fF
0.5 nH
Anti-parallel diode package (HMPx-x8x2)
2
3
1
4
0.5 nH0.05 nH
0.5 nH
0.05 nH
0.05 nH0.5 nH0.05 nH
30 fF 30 fF
20 fF
20 fF
0.5 nH 0.05 nH
Parallel diode package (HMPx-x8x5)
2
3
1
4
0.5 nH0.05 nH
0.5 nH 0.05 nH0.5 nH0.05 nH
4
HMPS-282x Series Typical Performance
Tc = 25°C (unless otherwise noted), Single Diode
Figure 1. Forward Current vs. Forward
Voltage at Temperatures.
0 0.10 0.20 0.30 0.500.40
I
F
– FORWARD CURRENT (mA)
V
F
– FORWARD VOLTAGE (V)
0.01
10
1
0.1
100 T
A
= +125°C
T
A
= +75°C
T
A
= +25°C
T
A
= –25°C
Figure 2. Reverse Current vs. Reverse Voltage
at Temperatures.
05 15
I
R
– REVERSE CURRENT (nA)
V
R
– REVERSE VOLTAGE (V)
10
1
1000
100
10
100,000
10,000
T
A
= +125°C
T
A
= +75°C
T
A
= +25°C
Figure 3. Total Capacitance vs. Reverse
Voltage.
02 86
C
T
– CAPACITANCE (pF)
V
R
– REVERSE VOLTAGE (V)
4
0
0.6
0.4
0.2
1
0.8
Figure 4. Dynamic Resistance vs. Forward
Current.
0.1 1 100
R
D
– DYNAMIC RESISTANCE ()
I
F
– FORWARD CURRENT (mA)
10
1
10
1000
100
V
F
- FORWARD VOLTAGE (V)
Figure 5. Typical Vf Match, Series Pairs and
Quads at Mixer Bias Levels.
30
10
1
0.3
30
10
1
0.3
I
F
- FORWARD CURRENT (mA)
V
F
- FORWARD VOLTAGE DIFFERENCE (mV)
0.2 0.4 0.6 0.8 1.0 1.2 1.4
I
F
(Left Scale)
V
F
(Right Scale)
V
F
- FORWARD VOLTAGE (V)
Figure 6. Typical Vf Match, Series Pairs at
Detector Bias Levels.
100
10
1
1.0
0.1
I
F
- FORWARD CURRENT (µA)
V
F
- FORWARD VOLTAGE DIFFERENCE (mV)
0.10 0.15 0.20 0.25
I
F
(Left Scale)
V
F
(Right Scale)
Figure 7. Typical Output Voltage vs. Input
Power, Small Signal Detector Operating at
850 MHz.
-40 -30
18 nH
RF in
3.3 nH
100 pF 100 K
HSMS-282B Vo
0
V
O
– OUTPUT VOLTAGE (V)
P
in
– INPUT POWER (dBm)
-10-20
0.001
0.01
1
0.1
-25°C
+25°C
+75°C
DC bias = 3 µA
Figure 8. Typical Output Voltage vs. Input
Power, Large Signal Detector Operating at
915 MHz.
-20 -10
RF in
100 pF 4.7 K
68
HSMS-282B Vo
30
V
O
– OUTPUT VOLTAGE (V)
P
in
– INPUT POWER (dBm)
10 200
1E-005
0.0001
0.001
10
0.1
1
0.01
+25°C
LOCAL OSCILLATOR POWER (dBm)
Figure 9. Typical Conversion Loss vs. L.O.
Drive, 2.0 GHz (Ref AN997).
CONVERSION LOSS (dB)
12
10
9
8
7
6
2068104
5
Assembly Information
The MiniPak diode is mounted to the PCB or
microstrip board using the pad pattern shown in
Figure 10.
0.4 0.4
0.3
0.5
0.3
0.5
Figure 10. PCB Pad Layout, MiniPak (dimensions in mm).
This mounting pad pattern is satisfactory for most
applications. However, there are applications where
a high degree of isolation is required between one
diode and the other is required. For such applica-
tions, the mounting pad pattern of Figure 11 is
recommended.
2.60
0.40
0.20
0.40 mm via hole
(4 places)
0.8 2.40
Figure 11. PCB Pad Layout, High Isolation MiniPak (dimensions in mm).
This pattern uses four via holes, connecting the
crossed ground strip pattern to the ground plane of
the board.
SMT Assembly
Reliable assembly of surface mount components is a
complex process that involves many material, process,
and equipment factors, including: method of heating
(e.g., IR or vapor phase reflow, wave soldering, etc.)
circuit board material, conductor thickness and
pattern, type of solder alloy, and the thermal conduc-
tivity and thermal mass of components. Components
with a low mass, such as the MiniPak package, will
reach solder reflow temperatures faster than those
with a greater mass.
Avagos diodes have been qualified to the time-tem-
perature profile shown in Figure 12. This profile is
representative of an IR reflow type of surface mount
assembly process.
After ramping up from room temperature, the circuit
board with components attached to it (held in place
with solder paste) passes through one or more pre-
heat zones. The preheat zones increase the tempera-
ture of the board and components to prevent thermal
shock and begin evaporating solvents from the solder
paste. The reflow zone briefly elevates the tempera-
ture sufficiently to produce a reflow of the solder.
The rates of change of temperature for the ramp-up
and cool-down zones are chosen to be low enough to
not cause deformation of the board or damage to
components due to thermal shock. The maximum
temperature in the reflow zone (TMAX) should not
exceed 255°C.
These parameters are typical for a surface mount
assembly process for Avago diodes. As a general guide-
line, the circuit board and components should be
exposed only to the minimum temperatures and times
necessary to achieve a uniform reflow of solder.
TIME (seconds)
TEMPERATURE (°C)
0
0
50
100
150
200
221
300
250
350
60 9030
Preheat 130170°C
Min. 60 s
Max. 150 s
Reflow Time
Min. 60 s
Max. 90 s
Peak Temperature
Min. 240°C
Max. 255°C
150 180 210 240 270 300 360120 330
Figure 12. Surface Mount Assembly Temperature Profile.
6
MiniPak Outline Drawing
1.44 (0.057)
1.40 (0.055)
Top view
Side view
Dimensions are in millimeters (inches)
Bottom view
1.20 (0.047)
1.16 (0.046)
0.70 (0.028)
0.58 (0.023)
1.12 (0.044)
1.08 (0.043)
0.82 (0.032)
0.78 (0.031)
0.32 (0.013)
0.28 (0.011)
-0.07 (-0.003)
-0.03 (-0.001)
0.00
-0.07 (-0.003)
-0.03 (-0.001)
0.42 (0.017)
0.38 (0.015)
0.92 (0.036)
0.88 (0.035)
1.32 (0.052)
1.28 (0.050)
0.00
7
Device Orientation
Tape Dimensions and Product Orientation
For Outline 4T (MiniPak 1412)
USER
FEED
DIRECTION
COVER TAPE
CARRIER
TAPE
REEL
END VIEW
8 mm
4 mm
TOP VIEW
AA
AA
AA
AA
Note: AA represents package marking code. Package marking is
right side up with carrier tape perforations at top. Conforms to
Electronic Industries RS-481, Taping of Surface Mounted
Components for Automated Placement. Standard quantity is 3,000
devices per reel.
P
P
0
P
2
F
W
C
D
1
D
E
A
0
5° MAX.
t
1
(CARRIER TAPE THICKNESS) T
t
(COVER TAPE THICKNESS)
5° MAX.
B
0
K
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
1.40 ± 0.05
1.63 ± 0.05
0.80 ± 0.05
4.00 ± 0.10
0.80 ± 0.05
0.055 ± 0.002
0.064 ± 0.002
0.031 ± 0.002
0.157 ± 0.004
0.031 ± 0.002
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.50 ± 0.10
4.00 ± 0.10
1.75 ± 0.10
0.060 ± 0.004
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t
1
8.00 + 0.30 - 0.10
0.254 ± 0.02
0.315 + 0.012 - 0.004
0.010 ± 0.001
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
WIDTH
TAPE THICKNESS
C
T
t
5.40 ± 0.10
0.062 ± 0.001
0.213 ± 0.004
0.002 ± 0.00004
COVER TAPE
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited
in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies, Limited. All rights reserved.
Obsoletes 5988-1551EN
5989-3628EN May 23, 2006