Revised January 1999 CD40192BC * CD40193BC Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter General Description The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter. Counting up and counting down is performed by two count inputs, one being held HIGH while the other is clocked. The outputs change on the positive-going transition of this clock. These counters feature preset inputs that are enabled when load is a logical "0" and a clear which forces all outputs to "0" when it is at logical "1". The counters also have carry and borrow outputs so that they can be cascaded using no external circuitry. All inputs are protected against damage due to static discharge by clamps to VDD and VSS. Features Wide supply voltage range: High noise immunity: 3V to 15V 0.45 VDD (typ.) Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS Carry and borrow outputs for easy expansion to N-bit by cascading Asynchronous clear Equivalent to: MM74C192 and MM74C193 Ordering Code: Order Number CD40192BCN Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD40193BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD40193BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Connection Diagram Cascading Packages Pin Assignments for DIP and SOIC Top View (c) 1999 Fairchild Semiconductor Corporation DS005988.prf www.fairchildsemi.com CD40192BC * CD40193BC Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter October 1987 CD40192BC * CD40193BC Block Diagrams CD40192BC Synchronous 4-Bit Up/Down Decade Counter CD40193BC Synchronous 4-Bit Up/Down Binary Counter www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) -0.5 to +18 VDC DC Supply Voltage (VDD) DC Supply Voltage (V DD) -0.5 to VDD +0.5 VDC Input Voltage (VIN) 700 mW Small Outline 500 mW Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The "Recommended Operating Conditions" and Electrical Characteristics tables provide conditions for actual device operation. Lead Temperature (TL) (Soldering, 10 seconds) Symbol IDD VOL VOH VIL VIH IOL Parameter IIN (Note 3) -40C Conditions Min Max +25C Min Typ +85C Max Min Max Units Quiescent Device VDD = 5V, VIN = VDDor VSS 20 20 150 A Current VDD = 10V, VIN = VDD or VSS 40 40 300 A VDD = 15V, VIN = VDD or V SS 80 80 600 A V LOW Level VDD = 5V 0.05 0.05 0.05 Output Voltage VDD = 10V 0.05 0.05 0.05 V VDD = 15V 0.05 0.05 0.05 V HIGH Level VDD = 5V 4.95 4.95 4.95 Output Voltage VDD = 10V 9.95 9.95 9.95 V VDD = 15V 14.95 14.95 14.95 V V LOW Level VDD = 5V, VO = 0.5V or 4.5V 1.5 1.5 1.5 Input Voltage VDD = 10V, VO = 1V or 9V 3.0 3.0 3.0 V VDD = 15V, VO = 1.5V or 13.5V 4.0 4.0 4.0 V V HIGH Level VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 3.5 V Input Voltage VDD = 10V, VO = 1V or 9V 7.0 7.0 7.0 V VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 11.0 V VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA LOW Level Output VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 mA HIGH Level Output VDD = 5V, VO = 4.6V -0.52 -0.44 -0.88 -0.36 mA Current (Note 4) VDD = 10V, VO = 9.5V -1.3 -1.1 -2.25 -0.9 mA VDD = 15V, VO = 13.5V -3.6 -3.0 -8.8 -2.4 Current (Note 4) IOH Note 2: VSS = 0V unless otherwise specified. 260C DC Electrical Characteristics -40C to +85C CD40192BC, CD40193BC Power Dissipation (PD) Dual-In-Line 0 to VDD VDC Operating Temperature Range (TA) -65C to +150C Storage Temperature Range (TS) 3 to 15 VDC Input Voltage (VIN) Input Current mA VDD = 15V, VIN = 0V -0.3 -10-5 -0.3 -1.0 A VDD = 15V, V IN = 15V 0.3 10-5 0.3 1.0 A Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: IOH and IOL are tested one output at a time. 3 www.fairchildsemi.com CD40192BC * CD40193BC Absolute Maximum Ratings(Note 1) (Note 2) CD40192BC * CD40193BC AC Electrical Characteristics (Note 3) TA = 25C, CL = 50 pF, RL = 200 k, input tr = tf = 20 ns, unless otherwise specified. Symbol tPHL or tPLH tPHL or tPLH tPHL or tPLH tSU tPHL tPLH or tPHL tTLH or tTHL fCL trCL or t fCL tWH, tWL tWH Typ Max Units Propagation Delay Time Parameter VDD = 5V 250 400 ns from Count Up or VDD = 10V 100 160 ns Count Down to Q VDD = 15V 80 130 ns Propagation Delay Time VDD = 5V 120 200 ns from Count Up to Carry VDD = 10V 50 80 ns VDD = 15V 40 65 ns VDD = 5V 120 200 ns Propagation Delay Time CIN Min from Count Down VDD = 10V 50 80 ns to Borrow VDD = 15V 40 65 ns Time Prior to Load VDD = 5V 100 160 ns That Data Must VDD = 10V 30 50 ns Be Present VDD = 15V 25 40 ns Propagation Delay Time VDD = 5V 130 220 ns from Clear to Q VDD = 10V 60 100 ns VDD = 15V 50 80 ns Propagation Delay Time VDD = 5V 300 480 ns from Load to Q VDD = 10V 120 190 ns VDD = 15V 95 150 ns VDD = 5V 100 200 ns VDD = 10V 50 100 ns VDD = 15V 40 80 ns Output Transition Time Maximum Count Frequency VDD = 5V 2.5 4 MHz VDD = 10V 6 10 MHz 12.5 MHz VDD = 15V 7.5 Maximum Count Rise VDD = 5V 15 or Fall Time VDD = 10V 5 s VDD = 15V 1 s s Minimum Count Pulse VDD = 5V 120 200 ns Width VDD = 10V 35 80 ns VDD = 15V 28 65 ns Minimum Clear VDD = 5V 300 480 ns VDD = 10V 120 190 ns VDD = 15V 95 150 ns Minimum Load VDD = 5V 100 160 ns Pulse Width VDD = 10V 40 65 ns VDD = 15V 32 55 ns Load and Data 5 7.5 pF 10 15 pF Pulse Width tWL Conditions Average Input Capacitance Inputs (A,B,C,D) Count Up, Count Down and Clear CPD Power Dissipation Capacity (Note 5) 100 pF Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note, AN-90. www.fairchildsemi.com 4 CD40192BC * CD40193BC Timing Diagrams CD40192BC Sequence: 1. Clear outputs to zero. 2. Load (preset) to BCD seven. 3. Count up to eight, nine, carry, zero, one and two. 4. Count down to one, zero, borrow, nine, eight and seven. CD40193BC Sequence: 1. Clear outputs to zero. 2. Load (preset) to binary thirteen. 3. Count up to fourteen, fifteen, carry, zero, one and two. 4. Count down to one, zero, borrow, fifteen, fourteen and thirteen. 5 www.fairchildsemi.com CD40192BC * CD40193BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body Package Number M16A www.fairchildsemi.com 6 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. CD40192BC * CD40193BC Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter Physical Dimensions inches (millimeters) unless otherwise noted (Continued)