LTC6910-1
LTC6910-2/LTC6910-3
1
6910123fa
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
3-Bit Digital Gain Control in Three Gain-Code
Options
■
Rail-to-Rail Input Range
■
Rail-to-Rail Output Swing
■
Single or Dual Supply: 2.7V to 10.5V Total
■
11MHz Gain Bandwidth Product
■
Input Noise Down to 8nV/√Hz
■
System Dynamic Range to 120dB
■
Input Offset Voltage: 1.5mV
■
8-Pin Low Profile (1mm) SOT-23
(ThinSOT™) Package
Digitally Controlled
Programmable
Gain Amplifiers in SOT-23
■
Data Acquisition Systems
■
Dynamic Gain Changing
■
Automatic Ranging Circuits
■
Automatic Gain Control
The LTC
®
6910 family are low noise digitally program-
mable gain amplifiers (PGAs) that are easy to use and
occupy very little PC board space. The inverting gain is
adjustable using a 3-bit digital input to select gains of 0, 1,
2, 5, 10, 20, 50 and 100V/V in the LTC6910-1; 0, 1, 2, 4,
8, 16, 32 and 64V/V in the LTC6910-2; and 0, 1, 2, 3, 4, 5,6
and 7V/V in the LTC6910-3.
The LTC6910-Xs are inverting amplifiers with rail-to-rail
output. When operated with unity gain, they will also
process rail-to-rail input signals. A half-supply reference
generated internally at the AGND pin supports single
power supply applications. Operating from single or split
supplies from 2.7V to 10.5V, the LTC6910-X family is
offered in an 8-lead SOT-23 package.
Single Supply Programmable Amplifier Frequency Response (LTC6910-1)
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
2
13
VIN VOUT = GAIN • VIN
AGND
1µF OR LARGER
PIN 2 (AGND) PROVIDES BUILT-IN HALF-SUPPLY
REFERENCE WITH INTERNAL RESISTANCE OF 5k.
AGND CAN ALSO BE DRIVEN BY A SYSTEM ANALOG
GROUND REFERENCE NEAR HALF SUPPLY
6910 TA01
5
4
LTC6910-X
6
8
V+
2.7V TO 10.5V
0.1µF
G2 G1 G0
7
6910-1
0
–1
–2
–5
–10
–20
–50
–100
6910-2
0
–1
–2
–4
–8
–16
–32
–64
GAIN IN VOLTS/VOLT
6910-3
0
–1
–2
–3
–4
–5
–6
–7
DIGITAL INPUTS
G2
0
0
0
0
1
1
1
1
G1
0
0
1
1
0
0
1
1
G0
0
1
0
1
0
1
0
1
FREQUENCY (Hz)
10
GAIN (dB)
30
50
0
20
40
100 10k 100k 1M 10M
6910 TA01b
–10 1k
GAIN OF 100 (DIGITAL INPUT 111)
GAIN OF 1 (DIGITAL INPUT 001)
GAIN OF 2 (DIGITAL INPUT 010)
GAIN OF 5 (DIGITAL INPUT 011)
GAIN OF 10 (DIGITAL INPUT 100)
GAIN OF 20 (DIGITAL INPUT 101)
GAIN OF 50 (DIGITAL INPUT 110)
VS = 10V, VIN = 5mVRMS
ThinSOT is a trademark of Linear Technology Corporation.
U.S. Patent Number 6121908.
LTC6910-1
LTC6910-2/LTC6910-3
2
6910123fa
Total Supply Voltage (V+ to V–) ............................. 11V
Input Current ..................................................... ±25mA
Operating Temperature Range (Note 2)
LTC6910-1C, -2C, -3C ........................ –40°C to 85°C
LTC6910-1I, -2I, -3I ........................... –40°C to 85°C
LTC6910-1H, -2H, -3H .................... –40°C to 125°C
Specified Temperature Range (Note 3)
LTC6910-1C, -2C, -3C ........................ –40°C to 85°C
LTC6910-1I, -2I, -3I ........................... –40°C to 85°C
LTC6910-1H, -2H, -3H .................... –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
ORDER PART NUMBER
T
JMAX
= 150°C, θ
JA
= 230°C/W
LTC6910-1CTS8
LTC6910-1ITS8
LTC6910-1HTS8
LTC6910-2CTS8
LTC6910-2ITS8
LTC6910-2HTS8
LTC6910-3CTS8
LTC6910-3ITS8
LTC6910-3HTS8
(Note 1)
TS8 PART MARKING*
LTB5 (6910-1)
LTACQ (6910-2)
LTACS (6910-3)
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grades are identified by a label on the shipping container.
OUT 1
AGND 2
IN 3
V
–
4
8 V
+
7 G2
6 G1
5 G0
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
Table 1. LTC6910-1
NOMINAL
NOMINAL NOMINAL LINEAR INPUT RANGE (V
P-P
)INPUT
VOLTAGE GAIN Dual 5V Single 5V Single 3V IMPEDANCE
G2 G1 G0 Volts/Volt (dB) Supply Supply Supply (kΩ)
0 0 0 0 –120 10 5 3 (Open)
0 0 1 –1 0 10 5 3 10
0 1 0 –2 6 5 2.5 1.5 5
0 1 1 –5 14 2 1 0.6 2
1 0 0 –10 20 1 0.5 0.3 1
1 0 1 –20 26 0.5 0.25 0.15 1
1 1 0 –50 34 0.2 0.1 0.06 1
1 1 1 –100 40 0.1 0.05 0.03 1
GAI SETTI GS A D PROPERTIES
UUU
LTC6910-1
LTC6910-2/LTC6910-3
3
6910123fa
Table 2. LTC6910-2
NOMINAL
NOMINAL NOMINAL LINEAR INPUT RANGE (V
P-P
)INPUT
VOLTAGE GAIN Dual 5V Single 5V Single 3V IMPEDANCE
G2 G1 G0 Volts/Volt (dB) Supply Supply Supply (kΩ)
0 0 0 0 –120 10 5 3 (Open)
0 0 1 –1 0 10 5 3 10
0 1 0 –2 6 5 2.5 1.5 5
0 1 1 –4 12 2.5 1.25 0.75 2.5
1 0 0 –8 18.1 1.25 0.625 0.375 1.25
1 0 1 –16 24.1 0.625 0.313 0.188 1.25
1 1 0 –32 30.1 0.313 0.156 0.094 1.25
1 1 1 –64 36.1 0.156 0.078 0.047 1.25
GAI SETTI GS A D PROPERTIES
UUU
Table 3. LTC6910-3
NOMINAL
NOMINAL NOMINAL LINEAR INPUT RANGE (V
P-P
)INPUT
VOLTAGE GAIN Dual 5V Single 5V Single 3V IMPEDANCE
G2 G1 G0 Volts/Volt (dB) Supply Supply Supply (kΩ)
0 0 0 0 –120 10 5 3 (Open)
0 0 1 –1 0 10 5 3 10
0 1 0 –2 6 5 2.5 1.5 5
0 1 1 –3 9.5 3.33 1.67 1 3.3
1 0 0 –4 12 2.5 1.25 0.75 2.5
1 0 1 –5 14 2 1 0.6 2
1 1 0 –6 15.6 1.67 0.83 0.5 1.7
1 1 1 –7 16.9 1.43 0.71 0.43 1.4
LTC6910-1
LTC6910-2/LTC6910-3
4
6910123fa
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
C, I SUFFIXES H SUFFIX
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for the LTC6910-1, LTC6910-2 and LTC6910-3
Total Supply Voltage ●2.7 10.5 2.7 10.5 V
Supply Current V
S
= 2.7V, V
IN
= 1.35V ●23 23 mA
V
S
= 5V, V
IN
= 2.5V ●2.4 3.5 2.4 3.5 mA
V
S
= ±5V, V
IN
= 0V, Pins 5, 6, 7 = –5V or 5V ●3 4.5 3 4.5 mA
V
S
= ±5V, V
IN
= 0V, Pin 5 = 4.5V, ●3.5 4.9 3.5 4.9 mA
Pins 6, 7 = 0.5V (Note 4)
Output Voltage Swing LOW (Note 5) V
S
= 2.7V, R
L
= 10k to Midsupply Point ●12 30 12 30 mV
V
S
= 2.7V, R
L
= 500Ω to Midsupply Point ●50 100 50 100 mV
V
S
= 5V, R
L
= 10k to Midsupply Point ●20 40 20 40 mV
V
S
= 5V, R
L
= 500Ω to Midsupply Point ●90 160 90 160 mV
V
S
= ±5V, R
L
= 10k to 0V ●30 50 30 50 mV
V
S
= ±5V, R
L
= 500Ω to 0V ●180 250 180 270 mV
Output Voltage Swing HIGH (Note 5) V
S
= 2.7V, R
L
= 10k to Midsupply Point ●10 20 10 20 mV
V
S
= 2.7V, R
L
= 500Ω to Midsupply Point ●50 80 50 85 mV
V
S
= 5V, R
L
= 10k to Midsupply Point ●10 30 10 30 mV
V
S
= 5V, R
L
= 500Ω to Midsupply Point ●80 150 80 150 mV
V
S
= ±5V, R
L
= 10k to 0V ●20 40 20 40 mV
V
S
= ±5V, R
L
= 500Ω to 0V ●180 250 180 250 mV
Output Short-Circuit Current (Note 6) V
S
= 2.7V ±27 ±27 mA
V
S
= ±5V ±35 ±35 mA
AGND Open-Circuit Voltage V
S
= 5V ●2.45 2.5 2.55 2.45 2.5 2.55 V
AGND Rejection (i.e., Common Mode V
S
= 2.7V, V
AGND
= 1.1V to Upper AGND Limit ●55 80 50 80 dB
Rejection or CMRR) V
S
= ±5V, V
AGND
= –2.5V to 2.5V ●55 75 50 75 dB
Power Supply Rejection Ratio (PSRR) V
S
= 2.7V to ±5V ●60 80 60 80 dB
Signal Attenuation at Gain = 0 Setting Gain = 0 (Digital Inputs 000), f = 20kHz ●–122 –122 dB
Slew Rate V
S
= 5V, V
OUT
= 2.8V
P-P
12 12 V/µs
V
S
= ±5V, V
OUT
= 2.8V
P-P
16 16 V/µs
Digital Input “High” Voltage V
S
= 2.7V ●2.43 2.43 V
V
S
= 5V ●4.5 4.5 V
V
S
= ±5V ●4.5 4.5 V
Digital Input “Low” Voltage V
S
= 2.7V ●0.27 0.27 V
V
S
= 5V ●0.5 0.5 V
V
S
= ±5V ●0.5 0.5 V
Digital Input Leakage Current Magnitude V
–
≤ (Digital Input) ≤ V
+
22µA
LTC6910-1
LTC6910-2/LTC6910-3
5
6910123fa
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-1C/LTC6910-1I LTC6910-1H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for LTC6910-1 Only
Voltage Gain (Note 7) V
S
= 2.7V, Gain = 1, R
L
= 10k ●–0.05 0 0.07 –0.06 0 0.07 dB
V
S
= 2.7V, Gain = 1, R
L
= 500Ω●–0.1 –0.02 0.06 –0.12 –0.02 0.08 dB
V
S
= 2.7V, Gain = 2, R
L
= 10k ●5.96 6.02 6.08 5.96 6.02 6.08 dB
V
S
= 2.7V, Gain = 5, R
L
= 10k ●13.85 13.95 14.05 13.83 13.95 14.05 dB
V
S
= 2.7V, Gain = 10, R
L
= 10k ●19.7 19.9 20.1 19.7 19.9 20.1 dB
V
S
= 2.7V, Gain = 10, R
L
= 500Ω●19.6 19.85 20.1 19.4 19.85 20.1 dB
V
S
= 2.7V, Gain = 20, R
L
= 10k ●25.7 25.9 26.1 25.65 25.9 26.1 dB
V
S
= 2.7V, Gain = 50, R
L
= 10k ●33.5 33.8 34.1 33.4 33.8 34.1 dB
V
S
= 2.7V, Gain = 100, R
L
= 10k ●39 39.6 40.2 38.7 39.6 40.2 dB
V
S
= 2.7V, Gain = 100, R
L
= 500Ω●37.4 39 40.1 36.4 39 40.1 dB
V
S
= 5V, Gain = 1, R
L
= 10k ●–0.05 0 0.07 –0.05 0 0.07 dB
V
S
= 5V, Gain = 1, R
L
= 500Ω●–0.1 –0.01 0.08 –0.11 –0.01 0.08 dB
V
S
= 5V, Gain = 2, R
L
= 10k ●5.96 6.02 6.08 5.955 6.02 6.08 dB
V
S
= 5V, Gain = 5, R
L
= 10k ●13.8 13.95 14.1 13.75 13.95 14.1 dB
V
S
= 5V, Gain = 10, R
L
= 10k ●19.8 19.9 20.1 19.75 19.9 20.1 dB
V
S
= 5V, Gain = 10, R
L
= 500Ω●19.6 19.85 20.1 19.45 19.85 20.1 dB
V
S
= 5V, Gain = 20, R
L
= 10k ●25.8 25.9 26.1 25.70 25.9 26.1 dB
V
S
= 5V, Gain = 50, R
L
= 10k ●33.5 33.8 34.1 33.4 33.8 34.1 dB
V
S
= 5V, Gain = 100, R
L
= 10k ●39.3 39.7 40.1 39.1 39.7 40.1 dB
V
S
= 5V, Gain = 100, R
L
= 500Ω●38 39.2 40.1 37 39.2 40.1 dB
V
S
= ±5V, Gain = 1, R
L
= 10k ●–0.05 0 0.07 –0.05 0 0.07 dB
V
S
= ±5V, Gain = 1, R
L
= 500Ω●–0.1 –0.01 0.08 –0.1 –0.01 0.08 dB
V
S
= ±5V, Gain = 2, R
L
= 10k ●5.96 6.02 6.08 5.96 6.02 6.08 dB
V
S
= ±5V, Gain = 5, R
L
= 10k ●13.80 13.95 14.1 13.80 13.95 14.1 dB
V
S
= ±5V, Gain = 10, R
L
= 10k ●19.8 19.9 20.1 19.75 19.9 20.1 dB
V
S
= ±5V, Gain = 10, R
L
= 500Ω●19.7 19.9 20.1 19.6 19.9 20.1 dB
V
S
= ±5V, Gain = 20, R
L
= 10k ●25.8 25.95 26.1 25.75 25.95 26.1 dB
V
S
= ±5V, Gain = 50, R
L
= 10k ●33.7 33.85 34 33.6 33.85 34 dB
V
S
= ±5V, Gain = 100, R
L
= 10k ●39.4 39.8 40.2 39.25 39.8 40.2 dB
V
S
= ±5V, Gain = 100, R
L
= 500Ω●38.8 39.6 40.1 38 39.6 40.1 dB
Offset Voltage Magnitude (Internal Op Amp) ●1.5 9 1.5 11 mV
(V
OS(OA)
) (Note 8)
Offset Voltage Drift (Internal Op Amp) (Note 8) 6 8 µV/°C
Offset Voltage Magnitude Gain = 1 ●3 15 3 18 mV
(Referred to “IN” Pin) (V
OS(IN)
) Gain = 10 ●1.7 10 1.7 12 mV
DC Input Resistance (Note 9) DC V
IN
= 0V
Gain = 0 >100 >100 MΩ
Gain = 1 ●10 10 kΩ
Gain = 2 ●55kΩ
Gain = 5 ●22kΩ
Gain = 10, 20, 50, 100 ●11kΩ
LTC6910-1
LTC6910-2/LTC6910-3
6
6910123fa
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-1C/LTC6910-1I LTC6910-1H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for LTC6910-1 Only
DC Small-Signal Output Resistance Gain = 0 0.4 0.4 Ω
Gain = 1 0.7 0.7 Ω
Gain = 2 1 1 Ω
Gain = 5 1.9 1.9 Ω
Gain = 10 3.4 3.4 Ω
Gain = 20 6.4 6.4 Ω
Gain = 50 15 15 Ω
Gain = 100 30 30 Ω
Gain-Bandwidth Product Gain = 100, f
IN
= 200kHz 8 11 14 8 11 14 MHz
●6 11 16 5 11 16 MHz
Wideband Noise (Referred to Input) f = 1kHz to 200kHz
Gain = 0 Output Noise 3.8 3.8 µV
RMS
Gain = 1 10.7 10.7 µV
RMS
Gain = 2 7.3 7.3 µV
RMS
Gain = 5 5.2 5.2 µV
RMS
Gain = 10 4.5 4.5 µV
RMS
Gain = 20 4.2 4.2 µV
RMS
Gain = 50 3.9 3.9 µV
RMS
Gain = 100 3.4 3.4 µV
RMS
Voltage Noise Density (Referred to Input) f = 50kHz
Gain = 1 24 24 nV/√Hz
Gain = 2 16 16 nV/√Hz
Gain = 5 12 12 nV/√Hz
Gain = 10 10 10 nV/√Hz
Gain = 20 9.4 9.4 nV/√Hz
Gain = 50 8.7 8.7 nV/√Hz
Gain = 100 7.6 7.6 nV/√Hz
Total Harmonic Distortion Gain = 10, f
IN
= 10kHz, V
OUT
= 1V
RMS
–90 –90 dB
0.003 0.003 %
Gain = 10, f
IN
= 100kHz, V
OUT
= 1V
RMS
–77 –77 dB
0.014 0.014 %
AGND (Common Mode) Input Voltage Range V
S
= 2.7V ●0.55 1.6 0.7 1.5 V
(Note 10) V
S
= 5V ●0.7 3.65 1 3.25 V
V
S
= ±5V ●–4.3 3.5 –4.3 3.35 V
LTC6910-1
LTC6910-2/LTC6910-3
7
6910123fa
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-2C/LTC6910-2I LTC6910-2H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for LTC6910-2 Only
Voltage Gain (Note 7) V
S
= 2.7V, Gain = 1, R
L
= 10k ●–0.06 0 0.08 –0.07 0 0.08 dB
V
S
= 2.7V, Gain = 1, R
L
= 500Ω●–0.1 –0.02 0.06 –0.11 –0.02 0.06 dB
V
S
= 2.7V, Gain = 2, R
L
= 10k ●5.96 6.02 6.1 5.95 6.02 6.1 dB
V
S
= 2.7V, Gain = 4, R
L
= 10k ●11.9 12.02 12.12 11.9 12.02 12.12 dB
V
S
= 2.7V, Gain = 8, R
L
= 10k ●17.8 17.98 18.15 17.8 17.98 18.15 dB
V
S
= 2.7V, Gain = 8, R
L
= 500Ω●17.65 17.95 18.15 17.55 17.95 18.15 dB
V
S
= 2.7V, Gain = 16, R
L
= 10k ●23.75 24 24.2 23.75 24 24.2 dB
V
S
= 2.7V, Gain = 32, R
L
= 10k ●29.7 30 30.2 29.65 30 30.2 dB
V
S
= 2.7V, Gain = 64, R
L
= 10k ●35.3 35.75 36.2 35.2 35.75 36.2 dB
V
S
= 2.7V, Gain = 64, R
L
= 500Ω●34.2 35.3 36.2 33.7 35.3 36.2 dB
V
S
= 5V, Gain = 1, R
L
= 10k ●–0.06 0 0.08 –0.06 0 0.08 dB
V
S
= 5V, Gain = 1, R
L
= 500Ω●–0.1 –0.01 0.08 –0.11 –0.01 0.08 dB
V
S
= 5V, Gain = 2, R
L
= 10k ●5.96 6.02 6.1 5.96 6.02 6.1 dB
V
S
= 5V, Gain = 4, R
L
= 10k ●11.85 12.02 12.15 11.85 12.02 12.15 dB
V
S
= 5V, Gain = 8, R
L
= 10k ●17.85 18 18.15 17.85 18 18.15 dB
V
S
= 5V, Gain = 8, R
L
= 500Ω●17.65 17.9 18.15 17.6 17.9 18.15 dB
V
S
= 5V, Gain = 16, R
L
= 10k ●23.85 24 24.15 23.78 24 24.15 dB
V
S
= 5V, Gain = 32, R
L
= 10k ●29.7 30 30.2 29.7 30 30.2 dB
V
S
= 5V, Gain = 64, R
L
= 10k ●35.6 35.9 36.2 35.5 35.9 36.2 dB
V
S
= 5V, Gain = 64, R
L
= 500Ω●34.8 35.5 36 34.2 35.5 36 dB
V
S
= ±5V, Gain = 1, R
L
= 10k ●–0.05 0 0.07 –0.05 0 0.07 dB
V
S
= ±5V, Gain = 1, R
L
= 500Ω●–0.1 –0.01 0.08 –0.1 –0.01 0.08 dB
V
S
= ±5V, Gain = 2, R
L
= 10k ●5.96 6.02 6.1 5.96 6.02 6.1 dB
V
S
= ±5V, Gain = 4, R
L
= 10k ●11.9 12.02 12.15 11.9 12.02 12.15 dB
V
S
= ±5V, Gain = 8, R
L
= 10k ●17.85 18 18.15 17.85 18 18.15 dB
V
S
= ±5V, Gain = 8, R
L
= 500Ω●17.80 17.95 18.1 17.72 17.95 18.1 dB
V
S
= ±5V, Gain = 16, R
L
= 10k ●23.85 24 24.15 23.8 24 24.15 dB
V
S
= ±5V, Gain = 32, R
L
= 10k ●29.85 30 30.15 29.78 30 30.15 dB
V
S
= ±5V, Gain = 64, R
L
= 10k ●35.7 35.95 36.2 35.7 35.95 36.2 dB
V
S
= ±5V, Gain = 64, R
L
= 500Ω●35.2 35.8 36.2 34.8 35.8 36.2 dB
Offset Voltage Magnitude (Internal Op Amp) ●1.5 9 1.5 11 mV
(V
OS(OA)
) (Note 8)
Offset Voltage Drift (Internal Op Amp) (Note 8) ●68µV/°C
Offset Voltage Magnitude Gain = 1 ●3 15 3 17 mV
(Referred to “IN” Pin) (V
OS(IN)
) Gain = 8 ●2 10 2 12 mV
DC Input Resistance (Note 9) DC V
IN
= 0V
Gain = 0 >100 >100 MΩ
Gain = 1 ●10 10 kΩ
Gain = 2 ●55kΩ
Gain = 4 ●2.5 2.5 kΩ
Gain = 8, 16, 32, 64 ●1.25 1.25 kΩ
LTC6910-1
LTC6910-2/LTC6910-3
8
6910123fa
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-2C/LTC6910-2I LTC6910-2H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for LTC6910-2 Only
DC Small-Signal Output Resistance Gain = 0 0.4 0.4 Ω
Gain = 1 0.7 0.7 Ω
Gain = 2 1 1 Ω
Gain = 4 1.6 1.6 Ω
Gain = 8 2.8 2.8 Ω
Gain = 16 5 5 Ω
Gain = 32 10 10 Ω
Gain = 64 20 20 Ω
Gain-Bandwidth Product Gain = 64, f
IN
= 200kHz 9 13 16 9 13 16 MHz
●7 13 19 7 13 19 MHz
Wideband Noise (Referred to Input) f = 1kHz to 200kHz
Gain = 0 Output Noise 3.8 3.8 µV
RMS
Gain = 1 10.7 10.7 µV
RMS
Gain = 2 7.3 7.3 µV
RMS
Gain = 4 5.3 5.3 µV
RMS
Gain = 8 4.6 4.6 µV
RMS
Gain = 16 4.2 4.2 µV
RMS
Gain = 32 4 4 µV
RMS
Gain = 64 3.6 3.6 µV
RMS
Voltage Noise Density (Referred to Input) f = 50kHz
Gain = 1 24 24 nV/√Hz
Gain = 2 16 16 nV/√Hz
Gain = 4 12 12 nV/√Hz
Gain = 8 10.3 10.3 nV/√Hz
Gain = 16 9.4 9.4 nV/√Hz
Gain = 32 9 9 nV/√Hz
Gain = 64 8.1 8.1 nV/√Hz
Total Harmonic Distortion Gain = 8, f
IN
= 10kHz, V
OUT
= 1V
RMS
–90 –90 dB
0.003 0.003 %
Gain = 8, f
IN
= 100kHz, V
OUT
= 1V
RMS
–77 –77 dB
0.014 0.014 %
AGND (Common Mode) Input Voltage Range V
S
= 2.7V ●0.85 1.55 0.85 1.55 V
(Note 10) V
S
= 5V ●0.7 3.6 0.7 3.6 V
V
S
= ±5V ●–4.3 3.4 –4.3 3.4 V
LTC6910-1
LTC6910-2/LTC6910-3
9
6910123fa
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-3C/LTC6910-3I LTC6910-3H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for LTC6910-3 Only
Voltage Gain (Note 7) V
S
= 2.7V, Gain = 1, R
L
= 10k ●–0.05 0 0.07 –0.05 0 0.09 dB
V
S
= 2.7V, Gain = 1, R
L
= 500Ω●–0.1 –0.02 0.06 –0.11 –0.02 0.06 dB
V
S
= 2.7V, Gain = 2, R
L
= 10k ●5.93 6.02 6.08 5.93 6.02 6.09 dB
V
S
= 2.7V, Gain = 3, R
L
= 10k ●9.35 9.5 9.7 9.35 9.5 9.75 dB
V
S
= 2.7V, Gain = 4, R
L
= 10k ●11.9 11.98 12.2 11.9 11.98 12.2 dB
V
S
= 2.7V, Gain = 4, R
L
= 500Ω●11.8 11.98 12.2 11.75 11.98 12.2 dB
V
S
= 2.7V, Gain = 5, R
L
= 10k ●13.85 13.92 14.05 13.8 13.92 14.05 dB
V
S
= 2.7V, Gain = 6, R
L
= 10k ●15.4 15.5 15.6 15.4 15.5 15.6 dB
V
S
= 2.7V, Gain = 7, R
L
= 10k ●16.7 16.85 17 16.7 16.85 17 dB
V
S
= 2.7V, Gain = 7, R
L
= 500Ω●16.55 16.8 17 16.47 16.8 17 dB
V
S
= 5V, Gain = 1, R
L
= 10k ●–0.05 0 0.07 –0.05 0 0.07 dB
V
S
= 5V, Gain = 1, R
L
= 500Ω●–0.1 –0.01 0.08 –0.1 –0.01 0.08 dB
V
S
= 5V, Gain = 2, R
L
= 10k ●5.96 6.02 6.08 5.96 6.02 6.08 dB
V
S
= 5V, Gain = 3, R
L
= 10k ●9.45 9.54 9.65 9.45 9.54 9.65 dB
V
S
= 5V, Gain = 4, R
L
= 10k ●11.85 12.02 12.15 11.85 12.02 12.15 dB
V
S
= 5V, Gain = 4, R
L
= 500Ω●11.8 11.95 12.15 11.75 11.95 12.15 dB
V
S
= 5V, Gain = 5, R
L
= 10k ●13.8 13.95 14.05 13.8 13.95 14.05 dB
V
S
= 5V, Gain = 6, R
L
= 10k ●15.35 15.5 15.65 15.35 15.5 15.65 dB
V
S
= 5V, Gain = 7, R
L
= 10k ●16.7 16.85 17 16.7 16.85 17 dB
V
S
= 5V, Gain = 7, R
L
= 500Ω●16.6 16.8 17 16.5 16.8 17 dB
V
S
= ±5V, Gain = 1, R
L
= 10k ●–0.06 0 0.07 –0.06 0 0.07 dB
V
S
= ±5V, Gain = 1, R
L
= 500Ω●–0.1 –0.01 0.08 –0.12 –0.01 0.08 dB
V
S
= ±5V, Gain = 2, R
L
= 10k ●5.96 6.02 6.08 5.96 6.02 6.08 dB
V
S
= ±5V, Gain = 3, R
L
= 10k ●9.4 9.54 9.65 9.4 9.54 9.65 dB
V
S
= ±5V, Gain = 4, R
L
= 10k ●11.85 12 12.2 11.85 12 12.2 dB
V
S
= ±5V, Gain = 4, R
L
= 500Ω●11.8 12 12.2 11.8 12 12.2 dB
V
S
= ±5V, Gain = 5, R
L
= 10k ●13.8 13.95 14.1 13.8 13.95 14.1 dB
V
S
= ±5V, Gain = 6, R
L
= 10k ●15.35 15.5 15.7 15.35 15.5 15.7 dB
V
S
= ±5V, Gain = 7, R
L
= 10k ●16.7 16.85 17.05 16.7 16.85 17.05 dB
V
S
= ±5V, Gain = 7, R
L
= 500Ω●16.65 16.8 17 16.6 16.8 17 dB
Offset Voltage Magnitude (Internal Op Amp) ●1.5 8 1.5 8 mV
(V
OS(OA)
) (Note 8)
Offset Voltage Drift (Internal Op Amp) (Note 8) ●68µV/°C
Offset Voltage Magnitude Gain = 1 ●3 15 3 15 mV
(Referred to “IN” Pin) (V
OS(IN)
) Gain = 4 ●1.9 10 1.9 10 mV
DC Input Resistance (Note 9) DC V
IN
= 0V
Gain = 0 >100 >100 MΩ
Gain = 1 ●10 10 kΩ
Gain = 2 ●55kΩ
Gain = 3 ●3.3 3.3 kΩ
Gain = 4 ●2.5 2.5 kΩ
Gain = 5 ●22kΩ
Gain = 6 ●1.7 1.7 kΩ
Gain = 7 ●1.4 1.4 kΩ
LTC6910-1
LTC6910-2/LTC6910-3
10
6910123fa
DC Small-Signal Output Resistance Gain = 0 0.4 0.4 Ω
Gain = 1 0.7 0.7 Ω
Gain = 2 1 1 Ω
Gain = 3 1.3 1.3 Ω
Gain = 4 1.6 1.6 Ω
Gain = 5 1.9 1.9 Ω
Gain = 6 2.2 2.2 Ω
Gain = 7 2.5 2.5 Ω
Gain-Bandwidth Product Gain = 7, f
IN
= 200kHz ●11 11 MHz
Wideband Noise (Referred to Input) f = 1kHz to 200kHz
Gain = 0 Output Noise 3.8 3.8 µV
RMS
Gain = 1 10.7 10.7 µV
RMS
Gain = 2 7.3 7.3 µV
RMS
Gain = 3 6.1 6.1 µV
RMS
Gain = 4 5.3 5.3 µV
RMS
Gain = 5 5.2 5.2 µV
RMS
Gain = 6 4.9 4.9 µV
RMS
Gain = 7 4.7 4.7 µV
RMS
Voltage Noise Density (Referred to Input) f = 50kHz
Gain = 1 24 24 nV/√Hz
Gain = 2 16 16 nV/√Hz
Gain = 3 14 14 nV/√Hz
Gain = 4 12 12 nV/√Hz
Gain = 5 11.6 11.6 nV/√Hz
Gain = 6 11.2 11.2 nV/√Hz
Gain = 7 10.5 10.5 nV/√Hz
Total Harmonic Distortion Gain = 4, f
IN
= 10kHz, V
OUT
= 1V
RMS
–90 –90 dB
0.003 0.003 %
Gain = 4, f
IN
= 100kHz, V
OUT
= 1V
RMS
–80 –80 dB
0.01 0.01 %
AGND (Common Mode) Input Voltage Range V
S
= 2.7V ●0.85 1.55 0.85 1.55 V
(Note 10) V
S
= 5V ●0.7 3.6 0.7 3.6 V
V
S
= ±5V ●–4.3 3.4 –4.3 3.4 V
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k
to midsupply point, unless otherwise noted.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC6910-XC and LTC6910-XI are guaranteed functional over
the operating temperature range of –40°C to 85°C. The LTC6910-XH are
guaranteed functional over the operating temperature range of –40°C to
125°C.
Note 3: The LTC6910-XC are guaranteed to meet specified performance
from 0°C to 70°C. The LTC6910-XC are designed, characterized and
expected to meet specified performance from –40°C to 85°C but are not
tested or QA sampled at these temperatures. LTC6910-XI are guaranteed
to meet specified performance from –40°C to 85°C. The LTC6910-XH are
guaranteed to meet specified performance from –40°C to 125°C.
Note 4: Operating all three logic inputs at 0.5V causes the supply current
to increase typically 0.1mA from this specification.
Note 5: Output voltage swings are measured as differences between the
output and the respective supply rail.
Note 6: Extended operation with output shorted may cause junction
temperature to exceed the 150°C limit and is not recommended.
Note 7: Gain is measured with a DC large-signal test using an output
excursion between approximately 30% and 70% of supply voltage.
Note 8: Offset voltage referred to “IN” pin is (1 + 1/G) times offset voltage
of the internal op amp, where G is nominal gain magnitude. See Applica-
tions Information.
Note 9: Input resistance can vary by approximately ±30% part-to-part at a
given gain setting.
Note 10: At limits of AGND input range, open-loop gain of internal op amp
may be greater than, or as much as 15dB below, its value at nominal
AGND value.
LTC6910-3C/LTC6910-3I LTC6910-3H
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
Specifications for LTC6910-3 Only
LTC6910-1
LTC6910-2/LTC6910-3
11
6910123fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC6910-1 Output Voltage Swing
vs Load Current
TEMPERATURE (°C)
–0.2
GAIN CHANGE (dB)
–0.1
0
0.1
0.2
6910 G01
–50 0 50 150100
GAIN = 100
GAIN = 10
GAIN = 1
V
S
= ±2.5V
OUTPUT UNLOADED
FREQUENCY (Hz)
10
GAIN (dB)
30
50
0
20
40
100 10k 100k 1M 10M
6910 G02
–10 1k
GAIN OF 100
GAIN OF 1
GAIN OF 2
GAIN OF 5
GAIN OF 10
GAIN OF 20
GAIN OF 50
V
S
= ±5V, V
IN
= 5mV
RMS
GAIN
1
0
–3dB FREQUENCY (MHz)
2.0
4.0
8.0
•
•
•
••
7.5
7.0
6.5
5.5
5.0
4.5
3.5
3.0
2.5
1.5
1.0
0.5
10 100
6910 G03
6.0
VIN = 5mVRMS
VS = 2.7V
VS = ±5V
•
•
•
•
•
•
•
•
•••
LTC6910-1 Frequency Response LTC6910-1 –3dB Bandwidth
vs Gain Setting
LTC6910-1 Power Supply
Rejection vs Frequency LTC6910-1 Noise Density
vs Frequency
OUTPUT CURRENT (mA)
OUTPUT VOTLAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
+V
S
–V
S
0.01 1 10 100
6910 G04
0.1
+V
S
– 0.5
–V
S
+ 0.5
+V
S
– 1.0
–V
S
+ 1.0
+V
S
– 1.5
–V
S
+ 1.5
+V
S
– 2.0
–V
S
+ 2.0
V
S
= ±2.5V
125°C
25°C
–40°C
SOURCE
SINK
FREQUENCY (kHz)
20
REJECTION (dB)
80
90
10
0
70
40
60
50
30
0.1 10 100 1000
6910 G05
1
+SUPPLY
–SUPPLY
V
S
= ±2.5V
GAIN = 1
FREQUENCY (kHz)
1
10
100
6910 G06
110
100
GAIN = 1
GAIN = 10
GAIN = 100
INPUT-REFERRED
V
S
= ±2.5V
T
A
= 25°C
VOLTAGE NOISE DENSITY (nV/√Hz)
LTC6910-1 Distortion with Light
Loading (RL = 10k) LTC6910-1 THD + Noise
vs Input Voltage
FREQUENCY (kHz)
0
–60
–50
–30
150
6910 G07
–70
–80
50 100
GAIN = 100
GAIN = 10
GAIN = 1
200
–90
–100
–40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
= ±2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
FREQUENCY (kHz)
0
–60
–50
–30
150
6910 G08
–70
–80
50 100
GAIN = 100
GAIN = 10
GAIN = 1
200
–90
–100
–40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
= ±2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
INPUT VOLTAGE (V
P-P
)
0.01
–60
(THD + NOISE)/SIGNAL (dB)
–50
–40
–30
–20
0.1 1 10
6910 G09
–70
–80
–100
–110
–90
f
IN
= 1kHz
V
S
= ±5V
NOISE BW = 22kHz
GAIN SETTING = 100
GAIN SETTING = 10
GAIN SETTING = 1
LTC6910-1 Distortion with Heavy
Loading (RL = 500Ω)
LTC6910-1 Gain Shift
vs Temperature
(LTC6910-1)
LTC6910-1
LTC6910-2/LTC6910-3
12
6910123fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC6910-2 Output Voltage Swing
vs Load Current
TEMPERATURE (°C)
–0.2
GAIN CHANGE (dB)
–0.1
0
0.1
0.2
6910 G10
–50 0 50 150100
GAIN = 64
GAIN = 8
GAIN = 1
V
S
= ±2.5V
OUTPUT UNLOADED
FREQUENCY (Hz)
10
GAIN (dB)
30
50
0
20
40
100 1k 100k 1M 10M
6910 G11
–10 10k
VS = ±5V
VIN = 10mVRMS
GAIN OF 64
GAIN OF 32
GAIN OF 16
GAIN OF 4
GAIN OF 8
GAIN OF 2
GAIN OF 1
GAIN
1
0
–3dB FREQUENCY (MHz)
2.0
4.0
8.0
7.5
7.0
6.5
5.5
5.0
4.5
3.5
3.0
2.5
1.5
1.0
0.5
10 100
6910 G12
6.0
VIN = 10mVRMS
VS = 2.7V
VS = ±5V
•
•
•
•
•
•
••
•
•
•
•
•••
•
LTC6910-2 Frequency Response LTC6910-2 –3dB Bandwidth
vs Gain Setting
LTC6910-2 Power Supply
Rejection vs Frequency LTC6910-2 Noise Density
vs Frequency
OUTPUT CURRENT (mA)
OUTPUT VOTLAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
+V
S
–V
S
0.01 1 10 100
6910 G13
0.1
+V
S
– 0.5
–V
S
+ 0.5
+V
S
– 1.0
–V
S
+ 1.0
+V
S
– 1.5
–V
S
+ 1.5
+V
S
– 2.0
–V
S
+ 2.0
V
S
= ±2.5V
125°C
25°C
–40°C
SOURCE
SINK
FREQUENCY (kHz)
20
REJECTION (dB)
80
90
10
0
70
40
60
50
30
0.1 10 100 1000
6910 G14
1
+SUPPLY
–SUPPLY
V
S
= ±2.5V
GAIN = 1
FREQUENCY (kHz)
1
10
100
6910 G15
110
100
GAIN = 1
GAIN = 8
GAIN = 64
INPUT-REFERRED
V
S
= ±2.5V
T
A
= 25°C
VOLTAGE NOISE DENSITY (nV/√Hz)
LTC6910-2 Distortion with Light
Loading (RL = 10k) LTC6910-2 THD + Noise
vs Input Voltage
FREQUENCY (kHz)
0
–60
–50
–30
150
6910 G16
–70
–80
50 100
GAIN = 64
GAIN = 8
GAIN = 1
200
–90
–100
–40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
= ±2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
FREQUENCY (kHz)
0
–60
–50
–30
150
6910 G17
–70
–80
50 100
GAIN = 64
GAIN = 8
GAIN = 1
200
–90
–100
–40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
= ±2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
INPUT VOLTAGE (V
P-P
)
0.01
–60
(THD + NOISE)/SIGNAL (dB)
–50
–40
–30
–20
0.1 1 10
6910 G18
–70
–80
–100
–110
–90 f
IN
= 1kHz
V
S
= ±5V
NOISE BW = 22kHz
GAIN
SETTING = 64
GAIN
SETTING = 8
GAIN SETTING = 1
LTC6910-2 Distortion with Heavy
Loading (RL = 500Ω)
LTC6910-2 Gain Shift
vs Temperature
(LTC6910-2)
LTC6910-1
LTC6910-2/LTC6910-3
13
6910123fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC6910-3 Output Voltage Swing
vs Load Current
TEMPERATURE (°C)
–0.02
GAIN CHANGE (dB)
–0.01
0
0.01
0.02
6910 G19
–50 0 50 150100
GAIN = 7
GAIN = 4
GAIN = 1
V
S
= ±2.5V
OUTPUT UNLOADED
FREQUENCY (Hz)
0
GAIN (dB)
10
20
–5
5
15
1k100 100k 1M 10M
6910 G20
–10 10k
GAIN OF 7 GAIN OF 6
GAIN OF 5
GAIN OF 4
GAIN OF 3
GAIN OF 2
GAIN OF 1
V
S
= ±5V
V
IN
= 10mV
RMS
GAIN
0
–3dB FREQUENCY (MHz)
2.0
4.0
8.0
7.0
5.0
3.0
1.0
6910 G21
6.0
VIN = 10mVRMS
VS = 2.7V
VS = ±5V
•
•
•
•••••
•
•
•••••
•
13 10
245
6
789
LTC6910-3 Frequency Response LTC6910-3 –3dB Bandwidth
vs Gain Setting
LTC6910-3 Power Supply
Rejection vs Frequency LTC6910-3 Noise Density
vs Frequency
OUTPUT CURRENT (mA)
OUTPUT VOTLAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
+V
S
–V
S
0.01 1 10 100
6910 G22
0.1
+V
S
– 0.5
–V
S
+ 0.5
+V
S
– 1.0
–V
S
+ 1.0
+V
S
– 1.5
–V
S
+ 1.5
+V
S
– 2.0
–V
S
+ 2.0
V
S
= ±2.5V
125°C
25°C
–40°C
SOURCE
SINK
FREQUENCY (kHz)
20
REJECTION (dB)
80
90
10
0
70
40
60
50
30
0.1 10 100 1000
6910 G23
1
+SUPPLY
–SUPPLY
V
S
= ±2.5V
GAIN = 1
FREQUENCY (kHz)
1
10
100
6910 G24
110
100
GAIN = 1
GAIN = 4
GAIN = 7
INPUT-REFERRED
V
S
= ±2.5V
T
A
= 25°C
VOLTAGE NOISE DENSITY (nV/√Hz)
LTC6910-3 Distortion with Light
Loading (RL = 10k) LTC6910-3 THD + Noise
vs Input Voltage
FREQUENCY (kHz)
0
–60
–50
–30
150
6910 G25
–70
–80
50 100 200
–90
–100
–40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
= ±2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
GAIN = 7
GAIN = 1
GAIN = 4
FREQUENCY (kHz)
0
–60
–50
–30
150
6910 G26
–70
–80
50 100
GAIN = 7
GAIN = 1
200
–90
–100
–40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
= ±2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
GAIN = 4
INPUT VOLTAGE (V
P-P
)
0.01
–60
(THD + NOISE)/SIGNAL (dB)
–50
–40
–30
–20
0.1 1 10
6910 G27
–70
–80
–100
–110
–90
f
IN
= 1kHz
V
S
= ±5V
NOISE BW = 22kHz
GAIN SETTING = 7
GAIN SETTING = 4
GAIN SETTING = 1
LTC6910-3 Distortion with Heavy
Loading (RL = 500Ω)
LTC6910-3 Gain Shift
vs Temperature
(LTC6910-3)
LTC6910-1
LTC6910-2/LTC6910-3
14
6910123fa
OUT (Pin 1): Analog Output. This is the output of an
internal operational amplifier and swings to near the
power supply rails (V
+
and V
–
) as specified in the Electrical
Characteristics table. The internal op amp remains active
at all times, including the zero gain setting (digital input
000). As with other amplifier circuits, loading the output as
lightly as possible will minimize signal distortion and gain
error. The Electrical Characteristics table shows perfor-
mance at output currents up to 10mA and current limits
that occur when the output is shorted to midsupply at 2.7V
and ±5V supplies. Signal outputs above 10mA are pos-
sible but current-limiting circuitry will begin to affect
amplifier performance at approximately 20mA. Long-term
operation above 20mA output is not recommended. Do
not exceed maximum junction temperature of 150°C. The
output will drive capacitive loads up to 50pF. Capacitances
higher than 50pF should be isolated by a series resistor to
preserve AC stability.
AGND (Pin 2): Analog Ground. The AGND pin is at the
midpoint of an internal resistive voltage divider, develop-
ing a potential halfway between the V
+
and V
–
pins, with an
equivalent series resistance to the pin of nominally 5kΩ
(Figure 4). AGND is also the noninverting input of the
internal op amp, which makes it the ground reference
voltage for the IN and OUT pins. Because of this, very
“clean” grounding is important, including an analog ground
plane surrounding the package.
Recommended analog ground plane connection depends
on how power is applied to the LTC6910-X (Figures 1, 2,
and 3). Single power supply applications typically use V
–
for the system signal ground. The analog ground plane in
single-supply applications should therefore tie to V
–
, and
the AGND pin should be bypassed to this ground plane by
a high quality capacitor of at least 1µF (Figure 1). The
AGND pin then provides an internal analog reference
voltage at half the supply voltage (with internal resistance
of approximately 5kΩ) which is the center of the swing
range for both input and output. Dual supply applications
with symmetrical supplies (such as ±5V) have a natural
system ground at zero volts, which can drive the analog
ground plane; AGND then connects directly to the ground
plane, making zero volts the input and output reference
voltage for the LTC6910-X (Figure 2). Finally, if a dual
power supply is asymmetrical, the supply ground is still
the natural ground plane voltage. To maximize signal
swing capability with an asymmetrical supply, however, it
is often desirable to refer the LTC6910-X’s analog input
and output to a voltage equidistant from the two supply
rails V
+
and V
–
. The AGND pin will provide such a potential
when open-circuited and bypassed with a capacitor (Fig-
ure 3), just as with a single power supply, but now the
ground plane connection is different and the LTC6910-X’s
V
+
and V
–
pins are both isolated from this ground plane.
UU
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PI FU CTIO S
LTC6910-X
DIGITAL GROUND PLANE
(IF ANY)
ANALOG
GROUND
PLANE
1
SINGLE-POINT
SYSTEM GROUND
234
REFERENCE
V
+
2
6910 F01
8765
0.1µF
V
+
1µF
LTC6910-X
DIGITAL GROUND PLANE
(IF ANY)
ANALOG
GROUND
PLANE
1
SINGLE-POINT
SYSTEM GROUND
234
6910 F02
8765
0.1µF
V
+
0.1µF
V
–
Figure 2. Symmetrical Dual Supply
Ground Plane Connection
Figure 1. Single Supply
Ground Plane Connection
LTC6910-X
DIGITAL GROUND PLANE
(IF ANY)
ANALOG
GROUND
PLANE
1
SINGLE-POINT
SYSTEM GROUND
234
6910 F03
8765
0.1µF
V
+
0.1µF
1µF
V
–
MID-SUPPLY
REFERENCE
Figure 3. Asymmetrical Dual
Supply Ground Plane Connection
LTC6910-1
LTC6910-2/LTC6910-3
15
6910123fa
–
+
INPUT R ARRAY FEEDBACK R ARRAY
V
–
6910 F04
OUT
V
+
10k
MOS-INPUT
OP AMP
IN
AGND
10k
2
V
–
4
V
+
8
G1G2 G0
1
3
CMOS LOGIC
67 5
Figure 4. Block Diagram
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PI FU CTIO S
Where AGND does not connect to a ground plane, as in
Figures 1 and 3, it is important to AC-bypass the AGND pin.
This is especially true when AGND is used as a reference
voltage for other circuitry. Also, without a bypass capaci-
tor, wideband noise will enter the signal path from the
internal voltage divider resistors that set the DC voltage on
AGND. This noise can reduce SNR by 3dB at high gain
settings. The resistors present a Thévenin equivalent of
approximately 5k to the AGND pin. An external capacitor
from AGND to the ground plane, whose impedance is well
below 5k at frequencies of interest, will suppress this
noise. A 1µF high quality capacitor is effective in suppress-
ing resistor noise for frequencies down to 1kHz. Larger
capacitors extend this suppression to proportionately
lower frequencies. This issue does not arise in symmetri-
cal dual supply applications (Figure 2) because AGND
goes directly to ground.
In applications requiring an analog ground reference other
than halfway between the supply rails, the user can over-
ride the built-in analog ground reference by tying the
AGND pin to a reference voltage within the AGND voltage
range specified in the Electrical Characteristics table. The
AGND pin will load the external reference with approxi-
mately 5k returned to the mid-supply potential. AGND
should still be capacitively bypassed to a ground plane as
noted above. Do not connect the AGND pin to the V
–
pin.
IN (Pin 3): Analog Input. The input signal to the amplifier
in the LTC6910-X is the voltage difference between the IN
and AGND pins. The IN pin connects internally to a digitally
controlled resistance whose other end is a current sum-
ming point at the same potential as the AGND pin (Fig-
ure␣ 4). At unity gain (digital input 001), the value of this
input resistance
is approximately 10kΩ and the IN voltage
range is rail-to-rail (V+ to V–). At gain settings above unity
(digital input 010 or higher), the input resistance falls.
Also, the linear input voltage range falls in inverse propor-
tion to gain. (The higher gains are designed to boost lower
level signals with good noise performance.) Tables 1, 2,
and 3 summarize this behavior. In the “zero” gain state
(digital input 000), analog switches disconnect the IN pin
internally and this pin presents a very high input resis-
tance. The input may vary from rail to rail in the “zero” gain
setting but the output is insensitive to it and remains at the
AGND potential. Circuitry driving the IN pin must consider
the LTC6910-X’s input resistance and the variation of this
resistance when used at multiple gain settings. Signal
sources with significant output resistance may introduce
a gain error as the source’s output resistance and the
LTC6910-X’s input resistance form a voltage divider. This
is especially true at the higher gain settings where the
input resistance is lowest.
In single supply voltage applications at elevated gain
settings (digital input 010 or higher), it is important to
remember that the LTC6910-X’s DC ground reference for
both input and output is AGND, not V
–
. With increasing
gains, the LTC6910-X’s input voltage range for unclipped
output is no longer rail-to-rail but shrinks toward AGND.
The OUT pin also swings positive or negative with respect
to AGND. At unity gain (digital input 001), both IN and OUT
voltages can swing from rail to rail (Tables 1, 2, 3).
LTC6910-1
LTC6910-2/LTC6910-3
16
6910123fa
V
–
, V
+
(Pins 4, 8): Power Supply Pins. The V
+
and V
–
pins
should be bypassed with 0.1µF capacitors to an adequate
analog ground plane using the shortest possible wiring.
Electrically clean supplies and a low impedance ground
are important for the high dynamic range available from
the LTC6910-X (see further details under AGND). Low
noise linear power supplies are recommended. Switching
power supplies require special care to prevent switching
noise coupling into the signal path, reducing dynamic
range.
G0, G1, G2 (Pins 5, 6, 7): CMOS-Level Digital Gain-
Control Inputs. G2 is the most significant bit (MSB). These
pins control the voltage gain from IN to OUT pins (see
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PI FU CTIO S
Table 1, Table 2 and Table 3). Digital input code 000 causes
a “zero” gain with very low output noise. In this “zero” gain
state the IN pin is disconnected internally, but the OUT pin
remains active and forced by the internal op amp to the
voltage present on the AGND pin. Note that the voltage
gain from IN to OUT is inverting: OUT and IN pins always
swing on opposite sides of the AGND potential. The G pins
are high impedance CMOS logic inputs and must be
connected (they will float to unpredictable voltages if open
circuited). No speed limitation is associated with the
digital logic because it is memoryless and much faster
than the analog signal path.
LTC6910-1
LTC6910-2/LTC6910-3
17
6910123fa
Functional Description
The LTC6910 family are small outline, wideband inverting
DC amplifiers whose voltage gain is digitally program-
mable. Each delivers a choice of eight voltage gains,
controlled by the 3-bit digital inputs to the G pins, which
accept CMOS logic levels. The gain code is always mono-
tonic; an increase in the 3-bit binary number (G2 G1 G0)
causes an increase in the gain. Table 1, Table 2 and Table␣ 3
list the nominal voltage gains for LTC6910-1, LTC6910-2
and LTC6910-3 respectively. Gain control within each
amplifier occurs by switching resistors from a matched
array in or out of a closed-loop op amp circuit using MOS
analog switches (Figure 4). Bandwidth depends on gain
setting. Curves in the Typical Performance Characteristics
section show measured frequency responses.
Digital Control
Logic levels for the LTC6910-X digital gain control inputs
(Pins 5, 6, 7) are nominally rail-to-rail CMOS. Logic 1 is V
+
,
logic 0 is V
–
or alternatively 0V when using ±5V supplies.
The part is tested with the values listed in the Electrical
Characteristics table (Digital Input “High” and “Low” Volt-
ages), which are 10% and 90% of full excursion on the
inputs. That is, the tested logic levels are 0.27V and 2.43V
with a 2.7V supply, 0.5V and 4.5V levels with 0V and 5V
supply rails, and 0.5V and 4.5V logic levels at ±5V sup-
plies. Do not attempt to drive the digital inputs with TTL
logic levels (such as HCT or LS logic), which normally do
not swing near +5V. TTL sources should be adapted with
CMOS drivers or suitable pull-up resistors to 5V so that
they will swing to the positive rail.
Timing Constraints
Settling time in the CMOS gain-control logic is typically
several nanoseconds and faster than the analog signal
path. When amplifier gain changes, the limiting timing is
analog, not digital, because the effects of digital input
changes are observed only through the analog output
(Figure 4). The LTC6910-X’s logic is static (not latched)
and therefore lacks bus timing requirements. However, as
with any programmable-gain amplifier, each gain change
causes an output transient as the amplifier’s output moves,
with finite speed, toward a differently scaled version of the
input signal. Varying the gain faster than the output can
settle produces a garbled output signal. The LTC6910-X
analog path settles with a characteristic time constant or
time scale, τ, that is roughly the standard value for a first
order band limited response:
τ = 1 / (2 π f
-3dB
),
where f
-3dB
is the –3dB bandwidth of the amplifier. For
example, when the upper –3dB frequency is 1MHz, τ is
about 160ns. The bandwidth, and therefore τ, varies with
gain (see Frequency Response and –3dB Bandwidth curves
in Typical Performance Characteristics). After a gain change
it is the
new
gain value that determines the settling time
constant. Exact settling timing depends on the gain change,
the input signal and the possibility of slew limiting at the
output. However as a basic guideline, the range of τ is 20ns
to 1400ns for the LTC6910-1, 20ns to 900ns for the
LTC6910-2 and 20ns to 120ns for the LTC6910-3. These
numbers correspond to the ranges of –3dB Bandwidth in
the plots of that title under Typical Performance Character-
istics.
Offset Voltage vs Gain Setting
The electrical tables list DC offset (error) voltage at the
inputs of the internal op-amp in Figure 4, V
OS(OA)
, which
is the source of DC offsets in the LTC6910-X. The tables
also show the resulting, gain dependent offset voltage
referred to the IN pin, V
OS(IN)
. These two measures are
related through the feedback/input resistor ratio, which
equals the nominal gain-magnitude setting, G:
V
OS(IN)
= (1 + 1/G) V
OS(OA)
Offset voltages at any gain setting can be inferred from this
relationship. For example, an internal offset V
OS(OA)
of
1mV will appear referred to the IN pin as 2mV at a gain
setting G of 1, or 1.5mV at a gain setting of 2. At high gains,
V
OS(IN)
approaches V
OS(OA)
. (Offset voltage can be of
either polarity; it is a statistical parameter centered on
zero.) The MOS input circuitry of the internal op amp in
Figure 4 draws negligible input currents (unlike some op
amps), so only V
OS(OA)
and G affect the overall amplifier’s
offset.
APPLICATIO S I FOR ATIO
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LTC6910-1
LTC6910-2/LTC6910-3
18
6910123fa
V
CC
5V
1µF
500Ω
6910 F05b
AGND
LTC6910-X
2
4
8
17.4k
17.4k
Offset Nulling and Drift
Because internal op amp offset voltage V
OS(OA)
is gain
independent as noted above, offset trimming can be
readily added at the AGND pin, which drives the noninverting
input of the internal op amp. Such a trim shifts the AGND
voltage slightly from the system’s analog ground refer-
ence, where AGND would otherwise connect directly. This
is convenient when a low resistance analog ground poten-
tial or analog ground reference exists, for the return of a
voltage divider as in Figure 5a. When adjusted for zero DC
output voltage when the LTC6910-X has zero DC input
voltage, this DC nulling will hold at other gain settings also.
Figure 5a shows the basic arrangement for dual-supply
applications. A voltage divider (R1 and R2) scales external
reference voltages +V
REF
and –V
REF
to a range equaling or
slightly exceeding the approximately ±10mV op amp off-
set-voltage range. Resistor R1 is chosen to drop the
±10mV maximum trim voltage when the potentiometer is
set to either end. Thus if V
REF
is 5V, R1 should be about
100Ω. Note also that the two internal 10k resistors in
Figure 4 tend to bias AGND toward the mid-point of V
+
and
V
–
. The external voltage divider will swamp this effect if R1
is much less than 5kΩ. When considering the effect of the
internal 10k resistors, note that they form a Thévenin
equivalent of 5k in series with an open-circuit voltage at
the halfway potential (V
+
+ V
–
)/ 2. (Although tightly matched,
these internal 10k resistors also have an absolute toler-
ance of up to ±30% and a temperature coefficient of
typically –30ppm/°C.) Also, as described under Pin Func-
tions for AGND, a bypass capacitor C1 is always advisable
when AGND is not connected directly to a ground plane.
With this trim technique in place, the remaining DC offset
sources are drifts with temperature (typically 6µV/°C
referred to V
OS(OA)
), shifts in the LTC6910-X’s supply
voltage divided by the PSRR factors, supply voltage shifts
coupling through the two 10k internal resistors of
Figure 4, and of course any shifts in the reference voltages
that supply +V
REF
and –V
REF
in Figure 5a.
Figure 5b illustrates how to make an offset voltage adjust-
ment relative to the mid-supply potential in single supply
applications. Resistor values shown provide at least a
±10mV adjustment range assuming the minimum values
for the internal resistors at pin 2 and a supply potential of
5V. For single supply systems where all circuitry is DC
referenced to some other fixed bias potential, an offset
adjustment scheme is shown in Figure 5c. A low value for
R1 overrides the internal resistors at pin 2 and applies the
system DC bias to the LTC6910. Actual values for the
adjustment components depend on the magnitude of the
DC bias voltage. Offset adjustment component values
shown are an example with a single 5V V
CC
supply and a
1.25V system DC reference voltage.
Figure 5a. Offset Nulling
(Dual Supplies)
APPLICATIO S I FOR ATIO
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R2
49.9k
C1
≥1µF
ANALOG GROUND
REFERENCE
20k
R1
6910 F05a
AGND
–V
REF
+V
REF
LTC6910-X
2
Figure 5b. Offset Nulling
(Single Supply, Half Supply Reference) Figure 5c. Offset Nulling
(Single Supply, External Reference)
VCC 5V VCC 5V
1.25V
SYSTEM DC REFERENCE
VOLTAGE
1µF
500Ω
6910 F05c
AGND
LTC6910-X
2
4
8
976Ω
4.64k R1
100Ω
LTC6910-1
LTC6910-2/LTC6910-3
19
6910123fa
Analog Input and DC Levels
As described in Tables 1, 2 and 3 and under Pin Functions,
the IN pin presents a variable input resistance returned
internally to a potential equal to that at the AGND pin
(within a small offset-voltage error). This input resistance
varies with digital gain setting, becoming infinite (open
circuit) at “zero” gain (digital input 000), and as low as 1kΩ
at high gain settings. It is important to allow for this
input-resistance variation with gain, when driving the
LTC6910-X from other circuitry. Also, as the gain in-
creases above unity, the DC linear input-voltage range
(corresponding to rail-to-rail swing at the OUT pin) shrinks
toward the AGND potential. The output swings positive or
negative around the AGND potential (in the opposite
direction from the input, because the gain is inverting).
AC-Coupled Operation
Adding a capacitor in series with the IN pin makes the
LTC6910-X into an AC-coupled amplifier, suppressing the
source’s DC level (and even minimizing the offset voltage
from the LTC6910-X itself). No further components are
required because the input of the LTC6910-X biases itself
correctly when a series capacitor is added. The IN pin
connects to an internal variable resistor (and floats when
DC open-circuited to a well defined voltage equal to the
AGND input voltage at nonzero gain settings). The value of
this internal input resistor varies with gain setting over a
total range of about 1k to 10k, depending on version (the
rightmost columns of Table 1, Table 2 and Table 3).
Therefore, with a series input capacitor the low frequency
cutoff will also vary with gain. For example, for a low
frequency corner of 1kHz or lower, use a series capacitor
of 0.16µF or larger. A 0.16µF capacitor has a reactance of
1kΩ at 1kHz, giving a 1kHz lower –3dB frequency for gain
settings of 10V/V through 100V/V in the LTC6910-1. If the
LTC6910-1 is operated at lower gain settings with an
0.16µF input capacitor, the higher input resistance will
reduce the lower corner frequency down to 100Hz at a gain
setting of 1V/V. These frequencies scale inversely with the
value of the input capacitor.
Note that operating the LTC6910-X in zero gain mode
(digital inputs 000) open circuits the IN pin and this
demands some care if employed with a series input
capacitor. When the chip enters the zero gain mode, the
opened IN pin tends to freeze the voltage across the
capacitor to the value it held just before the zero gain state.
This can place the IN pin at or near the DC potential of a
supply rail (the IN pin may also drift to a supply potential
in this state due to small junction leakage currents). To
prevent driving the IN pin outside the supply limit and
potentially damaging the chip, avoid AC input signals in
the zero gain state with a series capacitor. Also, switching
later to a nonzero gain value will cause a transient pulse at
the output of the LTC6910-X (with a time constant set by
the capacitor value and the new LTC6910-X input resis-
tance value). This occurs because the IN pin returns to the
AGND potential and transient current flows to charge the
capacitor to a new DC drop.
SNR and Dynamic Range
The term “dynamic range” is much used (and abused)
with signal paths. Signal-to-noise ratio (SNR) is an unam-
biguous comparison of signal and noise levels, measured
in the same way and under the same operating conditions.
In a variable gain amplifier, however, further characteriza-
tion is useful because both noise and maximum signal
level in the amplifier will vary with the gain setting, in
general. In the LTC6910-X, maximum output signal is
independent of gain (and is near the full power supply
voltage, as detailed in the Swing sections of the Electrical
Characteristics table). The maximum input level falls with
increasing gain, and the input-referred noise falls as well
(as listed also in the table). To summarize the useful signal
range in such an amplifier, we define Dynamic Range (DR)
as the ratio of maximum input (at unity gain) to minimum
input-referred noise (at maximum gain). (These two num-
bers are measured commensurately, in RMS Volts.
For deterministic signals such as sinusoids, 1V
RMS
=
2.828V
P-P
.) This DR has a physical interpretation as the
range of signal levels that will experience an SNR above
unity V/V or 0dB. At a 10V total power supply, DR in the
LTC6910-1 (gains 0V to 100V/V) is typically 120dB (the
ratio of a nominal 9.9V
P-P
, or 3.5V
RMS
, maximum input to
the 3.4µV
RMS
high gain input noise). The corresponding
DR for the LTC6910-2 (gains 0V to 64V) is also 120dB; for
APPLICATIO S I FOR ATIO
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LTC6910-1
LTC6910-2/LTC6910-3
20
6910123fa
TYPICAL APPLICATIO S
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the LTC6910-3 (gains 0V to 7V/V) it is 117dB. The SNR
from an amplifier is the ratio of input level to input-
referred noise, and can be 110dB with the LTC6910 family
at unity gain.
Construction and Instrumentation Cautions
Electrically clean construction is important in applications
seeking the full dynamic range of the LTC6910-X ampli-
fier. Short, direct wiring will minimize parasitic capaci-
tance and inductance. High quality supply bypass capaci-
tors of 0.1µF near the chip provide good decoupling from
a clean, low inductance power source. But several cm of
wire (i.e., a few microhenrys of inductance) from the
power supplies, unless decoupled by substantial capaci-
tance (≥10µF) near the chip, can cause a high-Q LC
resonance in the hundreds of kHz in the chip’s supplies or
ground reference. This may impair circuit performance at
those frequencies. A compact, carefully laid out printed
circuit board with a good ground plane makes a
significant difference in minimizing distortion. Finally,
equipment to measure amplifier performance can itself
introduce distortion or noise floors. Checking for these
limits with a wire replacing the chip is a prudent routine
procedure.
Expanding an ADC’s Dynamic Range
Figure 6 shows a compact data acquisition system for
wide ranging input levels. This figure combines an
LTC6910-X programmable amplifier (8-lead TSOT-23)
with an LTC1864 analog-to-digital converter (ADC) in an
5
1499Ω
270pF
LTC1864
3
V
IN
AGND
GAIN
CONTROL
1µF
6910 F04
6
4
LTC6910-X
7
8
5V
0.1µF
2
1µF
ADC
CONTROL
V
REF
IN
+
IN
–
GND
5V
V
CC
SCK
SDO
CONV
Figure 6. Expanding an ADC’s Dynamic Range
8-lead MSOP. This ADC has 16-bit resolution and a maxi-
mum sampling rate of 250ksps. An LTC6910-1, for ex-
ample, expands the ADC’s input amplitude range by 40dB
while operating from the same single 5V supply. The 499Ω
resistor and 270pF capacitor couple cleanly between the
LTC6910-X’s output and the switched-capacitor input of
the LTC1864. The 270pF capacitor should be an NPO or
X7R type, and lead length and inductance in the connec-
tions to the LTC1864 inputs must be minimized, to achieve
the full performance capability of this circuit. (See LTC
1864 data sheet for further general information.)
At a gain setting of 10V/V in an LTC6910-1 (digital input
100) and a 250ksps sampling rate in the LTC1864, a 10kHz
input signal at 60% of full scale shows a THD of
–87dB at the digital output of the ADC. 100kHz input
signals under the same conditions produce THD values
around –75dB. Noise effects (both random and quantiza-
tion) in the ADC are divided by the gain of the amplifier
when referred to V
IN
in Figure 4. Because of this, the circuit
can acquire a signal that is 40dB down from full scale of
5V
P-P
with an SNR of over 70dB. Such performance from
an ADC alone (70 + 40 = 110dB of useful dynamic range at
250ksps), if available, would be far more expensive.
Low Noise AC Amplifier with Programmable Gain
and Bandwidth
Analog data acquisition can exploit band limiting as well as
gain to suppress unwanted signals or noise. Tailoring an
analog front end to both the level and bandwidth of each
source maximizes the resulting SNR.
LTC6910-1
LTC6910-2/LTC6910-3
21
6910123fa
TYPICAL APPLICATIO
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Figure 7 shows a block diagram and Figure 8 the practical
circuit for a low noise amplifier with gain and bandwidth
independently programmable over 100:1 ranges. One
LTC6910-X controls the gain and another controls the
bandwidth. An LT1884 dual op amp forms an integrating
lowpass loop with capacitor C2 to set the programmable
upper corner frequency. The LT1884 also supports rail-to-
rail output swings over the total supply voltage range of
2.7V to 10.5V. AC coupling through capacitor C1 estab-
–
+–
+
–
+
–
+
V
IN
C1
GAIN CONTROL PGA
(GAIN A)
V
OUT
= (GAIN A)V
IN
BANDWIDTH CONTROL PGA
(GAIN B) GAIN = –1
C2
R1
R2
V
OUT
6910 F05
1
2πR1C1 ≤ BANDWIDTH ≤1
R2
(GAIN B)
2πC2
Figure 7. Block Diagram of an AC Amplifier with Programmable Gain and Bandwidth
lishes a fixed low frequency corner of 1Hz, which can be
adjusted by changing C1. Alternatively, shorting C1 makes
the amplifier DC coupled. (If DC gain is not needed,
however, the AC coupling suppresses several error sources:
any shifts in DC levels, low frequency noise and all
amplifier DC offset voltages other than the low internally
trimmed LT1884 offset in the integrating amplifier. If
desired, another coupling capacitor in series with the input
can relax the requirements on DC input level as well.)
LTC6910-1
LTC6910-2/LTC6910-3
22
6910123fa
+
–
+
–
8
7
6
5
V
–
V
OUT
R4 15.8k
V
–
V
+
V
+
LT1884
C2
1µF
C1
10µFR1
15.8k
27
8
3
V
IN
6
4
5
1
R2
15.8k
0.1µF
GN2 GN1 GN0
0 0 1 GAIN = 1
0 1 0 GAIN = 2
0 1 1 GAIN = 5
1 0 0 GAIN = 10
1 0 1 GAIN = 20
1 1 0 GAIN = 50
1 1 1 GAIN = 100
BW2BW1BW0
BANDWIDTH 1Hz TO 10Hz 0 0 1
BANDWIDTH 1Hz TO 20Hz 0 1 0
BANDWIDTH 1Hz TO 50Hz 0 1 1
BANDWIDTH 1Hz TO 100Hz 1 0 0
BANDWIDTH 1Hz TO 200Hz 1 0 1
BANDWIDTH 1Hz TO 500Hz 1 1 0
BANDWIDTH 1Hz TO 1000Hz 1 1 1
0.1µF 0.1µF
V
+
V
–
1
2
3
427
8
3
6
4
5
1
0.1µF
0.1µF 0.1µF
V
+
V
–
LTC6910-1 LTC6910-1
R3
15.8k
BANDWIDTH
CONTROL
GAIN
CONTROL
FREQUENCY (Hz)
–60
GAIN (dB)
–50
–30
–20
0
10
1 100 1k 100k
6910 F06b
–70
10 10k
–10
–40
–80
GN2 GN1 GN0 = 001
BW2
1BW1
0BW0
0
BW2
0BW1
0BW0
1
BW2
1BW1
1BW0
1
Gain vs Frequency
Figure 8. Low Noise AC Amplifier with Programmable Gain and Bandwidth
TYPICAL APPLICATIO S
U
Measured frequency responses in Figure 8 with
LTC6910-1 PGAs demonstrate bandwidth settings of 10Hz,
100Hz and 1kHz, with digital codes at the BW inputs of
respectively 001, 100 and 111, and unity gain in each case.
By scaling C2, this circuit can serve other bandwidths,
such as a maximum of 10kHz with 0.1µF using LT1884
(gain-bandwidth product around 1MHz). Noise floor from
internal sources yields an output SNR of 76dB with 10mV
P-
P
input, gain of 100 and 100Hz bandwidth; for 100mV
P-P
input, gain of 10 and 1000Hz bandwidth it is 64dB.
LTC6910-1
LTC6910-2/LTC6910-3
23
6910123fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.22 – 0.36
8 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0802
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
3.85 MAX
0.52
MAX 0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
LTC6910-1
LTC6910-2/LTC6910-3
24
6910123fa
PART NUMBER DESCRIPTION COMMENTS
LT®1228 100MHz Gain Controlled Transconductance Amplifier Differential Input, Continuous Analog Gain Control
LT1251/LT1256 40MHz Video Fader and Gain Controlled Amplifier Two Input, One Output, Continuous Analog Gain Control
LTC1564 10kHz to 150kHz Digitally Controlled Filter and PGA Continuous Time, Low Noise 8th Order Filter and 4-Bit PGA
LTC6911 Dual Matched Programmable Gain Amplifier Dual 6910 in a 10 Lead MSOP
LTC6915 Zero Drift Instrumentation Amplifier with Programmable Gain Zero Drift, Digitally Programmable Gain Up to 4096 V/V
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
LINE AR TE CHNO LOG Y CO R P O R ATION 2002
LT/TP 0404 1K REV A • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATIO
U
2
13
V
IN
V
OUT
= GAIN • V
IN
AGND
1µF OR LARGER
PIN 2 (AGND) SETS DC OUTPUT VOLTAGE AND HAS
BUILT-IN HALF-SUPPLY REFERENCE WITH INTERNAL
RESISTANCE OF 5k. AGND CAN ALSO BE DRIVEN BY A
SYSTEM ANALOG GROUND REFERENCE NEAR HALF SUPPLY
C1 VALUE SETS LOWER CORNER FREQUENCY.
THE TABLE SHOWS THIS FREQUENCY WITH
C1 = 1µF. THIS FREQUENCY SCALES INVERSELY
WITH C1
6910 TA02
5
4
LTC6910-X
6
8
V
+
2.7V TO 10.5V
0.1µF
G2 G1 G0
7
C1
0
–1
–2
–5
–10
–20
–50
–100
0
–1
–2
–4
–8
–16
–32
–64
LTC6910-1 LTC6910-2 LTC6910-3
0
–1
–2
–3
–4
–5
–6
–7
PASSBAND
GAIN PASSBAND
GAIN PASSBAND
GAIN
LOWER –3dB
FREQ (C1 = 1µF)LOWER –3dB
FREQ (C1 = 1µF)LOWER –3dB
FREQ (C1 = 1µF)
—
16Hz
32Hz
80Hz
160Hz
160Hz
160Hz
160Hz
—
16Hz
32Hz
64Hz
127Hz
127Hz
127Hz
127Hz
—
16Hz
32Hz
48Hz
64Hz
80Hz
95Hz
111Hz
DIGITAL INPUTS
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
G2 G1 G0
AC-Coupled Single Supply Amplifiers
Frequency Response, LTC6910-1
FREQUENCY (Hz)
100
–10
GAIN (dB)
0
10
20
30
40
50
1k 10k 100k 1M
6910 TA03
G2, G1, G0 = 111
G2, G1, G0 = 110
G2, G1, G0 = 101
G2, G1, G0 = 100
G2, G1, G0 = 011
G2, G1, G0 = 010
G2, G1, G0 = 001
V
S
= 10V, V
IN
= 5mV
RMS
C1 = 1µF
Frequency Response, LTC6910-2
FREQUENCY (Hz)
100
–10
GAIN (dB)
0
10
20
30
40
1k 10k 100k 1M
6910 TA04
V
S
= 10V, V
IN
= 5mV
RMS
C1 = 1µF
G2, G1, G0 = 111
G2, G1, G0 = 110
G2, G1, G0 = 101
G2, G1, G0 = 100
G2, G1, G0 = 011
G2, G1, G0 = 010
G2, G1, G0 = 001
Frequency Response, LTC6910-3
FREQUENCY (Hz)
10 100
–10
GAIN (dB)
–5
0
5
10
15
20
1k 10k 100k 10M1M
6910 TA05
G2, G1, G0 = 111 G2, G1, G0 = 110
G2, G1, G0 = 101
G2, G1, G0 = 100
G2, G1, G0 = 011
G2, G1, G0 = 010
G2, G1, G0 = 001
VS = 10V
VIN = 10mVRMS
C1 = 1µF
