Mi 7929237 0022431 1 me [-S8-\-S\ ky S G6 S=THOMSON SGS-THOMSON MICROELECTRONICS UC1842/3/4/5 UC2842/3/4/5 UC3842/3/4/5 JOE D CURRENT MODE PWM CONTROLLER = OPTIMIZED FOR OFF-LINE AND DC TO DC CONVERTERS LOW START-UP CURRENT (< 1 mA) AUTOMATIC FEED FORWARD COMPENSA- TION PULSE-BY-PULSE CURRENT LIMITING ENHANCED LOAD RESPONSE CHARACTE- RISTICS UNDER-VOLTAGE LOCKOUT WITH HYSTE- RESIS DOUBLE PULSE SUPPRESSION HIGH CURRENT TOTEM POLE OUTPUT INTERNALLY TRIMMED BANDGAP REFE- RENCE = 500 KHz OPERATION a LOW Ro ERROR AMP DESCRIPTION The UC1842/3/4/5 family of control ICs provides the necessary features to implement off-line or DC to DC fixed frequency current mode control schemes with a minimal external parts count. Internally imple- mented circuits include under voltage lockout featu- tor which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for dri- ving N-Channel MOSFETs, is low in the off-state. Differences between members of this family are the , under-voltage lockout thresholds and maximum du- tycycle ranges. The UC 1842 and UC 1844 have UV- LO thresholds of 16 V (on) and 10 V (off), ideally sui- ted to off-line applications. The corresponding thres- holds for the UC1843 and UC1845 are 8.5 V and 7.9V. The UC1842 and UC 1843 can operate to du- ty cycles approaching 100 %. A range of the zero to < 50 % is obtained by the UC1844 and UC 1845 by the addition of an internal toggle flip flop which blanks the output off every other clock cycle. ring start-up current less than 1 mA, a precision re- Minidip Plastic SO-14 J DIP-14 Plastic ference trimmed for accuracy at the error amp input, and Ceramic logic to insure latched operation, a PWM compara- BLOCK DIAGRAM (toggle flip flop used only in UC1844 and UC1845) 712) oO k Bav YvLo Tal aye 5(9) . ~ oR Ngee vo it REF ace rs 250V "4d oN ia VRer ang Rye, G2? osc. ERROR OUTPUT Ves 2(3) 11) POWER COMP O SURRENT GROUND 3(5) COMPARATOR o S-770542 CURRENT SENSE September 1988 1/8 931UC1842/3/4/5-UC2842/3/4/5-UC3842/3/4/5 | MM 9929237? O0ePe43je 3 J ABSOLUTE MAXIMUM RATINGS * Symbol Parameter Value~ Unit Vi Supply Voltage (low impedance source) 30 Vv Vi Supply Voltage (I; < 30 mA) Self Limiting lo Output Current 1 A Eo Output Energy (capacitive load) 5 pd Analog Inputs (pins 2, 3) 0.3 to 6.3 v Error Amplifier Output Sink Current 10 mA Ptot Power Dissipation at Tamp < 50 C (minidip, DIP-14) 1 W Prot | Power Dissipation at Tamb < 25 C (SO-14) 725 mw Tstg Storage Temperature Range 65 to 150 C Th Lead Temperature (soldering 10 s) 300 C * Alt voltages are with respect to pin 5, all currents are positive into the specified terminal. BLOCK DIAGRAM (top view) DIP-14/ SO-14. Minidip Plastic and Ceramic. w_ comp. [1 wf] Yrer a ne. [fz nyoNe. VW come ffi ell Yrer VFB [) vf} Yj en [fe ) oy nc, fs uf] Ye . . sense [> 6 fl ourpur IsENSE [ 5 to ] ourpur Ryle, WN, 5 | cRouno NC { 6 9 erounn . 5.7706 Aric, fy 8H GROUND 8-947 , ORDERING NUMBERS PLASTIC CERAMIC . TYPE MINIDIP - MINIDIP DIP-14 80-14 UC1842 UC1842J UC1843 UC1843J UC1844 UC1844J - UC1845 UC1845J UC2842 UC2842N UC2842J UC2842B. lk UC2842D UC2843 UG2843N UC2843J UC2843B UG2843D . UC2844 UC2844N UC2844J UC2844B UC2844D UC2845 UC2845N UC2845J UC2845B UC2845D UC3842 UC3842N UC3842J UC3842B UC3842D UC3843 UC3843N | UC3843J UC3843B UC3843D te UC3844 UC3844N - UC3844) UC3844B UC3844D ~ UC3845 UC3845N UC3845J UC3845B UC3845D 2/8 a7 SGS-THOMSON Td wisRomuscTRon-es 932 SG S-THOMSON ____30E D ( T-58-11-31Me 7929257 0002435 5 UC1842/3/4/5-UC2842/3/4/5-UC3842/3/4/5 S G S-THOMSON~ 3-77 77-7 S0E OD THERMAL DATA T-58-11-3] Ceramic Plastic DIP-14 $0-14 . Minidip Minidip Plastic Rth j-amb | Thermal Resistance Junction-ambient 200 C/W 100 C/W | 100 C/W | 165 C/W ELECTRICAL CHARACTERISTICS (unless otherwise stated, these specifications apply for -- 55 <Tamb S$ 12 % for UC184X ;- 25 < Tamb $ <85 c for UC284x ; Os < Tame <70 for UC384X ; V, = 15 v - (Note 5) 3 Rr = OK K; iCr= = 3. 3 3 nF) ue TO To Te ; | a UCTBIK | ceux | ymbol Parameter Test Conditions . Unit Min. | Typ. | Max. Min. | Typ. [Max. REFERENCE SECTION Vrer | Output Voltage Tj = 25 C o=1mA_ | 4.95 | 5.00 | 5.05 | 4.90 | 5.00 | 5.10 Vv A Veer Line Regulation 12V<V;<25V 6 20 6 20 mV A Veer Load Regulation 1<lyp <20 mA 6 25 6 25 mV A Vrer/AT | Temperature Stability (Note 2) 0.2 | 04 0.2 | 0.4 | mvrC Total Output Variation Line, Load, Temperature (Note 2) 4.9 5.4 | 4.82 5.18 Vv en Output Noise Voltage 10 Hz <f< 10 KHz Tj = 25 G 50 50 uv (Nofe 2) - Long Term Stability Tamb = 125 C, 1000 Hrs (Note 2) 5 25 5 25 mV Ise Output Short Circuit -30 | -100 | -180 | - 30 | -100]-180; mA OSCILLATOR SECTION fs Initial Accuracy Tj = 25 C (Note 6) 47 | 52 | 57 | 47 | 52 | 57 | KHz Voltage Stability 12<Vi<25V 0.2 1 0.2 1 % ; Temperature Stability | Tain < Tamp < Tmax (Note 2) 5 % V4 Amplitude Vpina Peak to Peak 1.7 1.7 Vv ERROR AMP SECTION Vo Input Voltage Vewi = 25V 2.45 | 2.50 | 2.55 | 2.42 |2.50|2.58] V Ib Input Bias Current 0.3| -1 -03)-2 |] HA Avot 25Vo<54V 65 | 90 -| 65 | 90 dB B Unity Gain Bandwidth | (Note 2) 0.7 1 0.7 1 MHz SVR Supply Voltage 12<Vi<25V 60 | 70 60 | 70 dB Rejection . lo Output Sink Current Vpine =2.7 V Vewi =1.41V} 2 6 2 6 mA lo Output Source Current | Vpin2 = 2.3 V Vem =5 V |-0.5}-0.8 0.5j- 0.8 mA Vour High Vpin2 = 2.3V; 5 6 5 6 Vv Ri = 15 KQ to Ground Vout Low Vpwe =2.7V; 0.7 | 141 07 | 14 Vv Ri=15 KQ to Pin 8 57 S6S;THoMson 38 933UC1842/3/4/5-UC2842/3/4/5- vcssa2/9/4/5 = 7929237 OOeeds 7 -$ G6 S- THOS ON ap D ELECTRICAL CHARACTERISTICS (continued) T+58~7]~3] UCc184xX uc3s4x Symbol Parameter Test Conditions UC284x Unit Min. | Typ. | Max. | Min. | Typ. |[Max. CURRENT SENSE SECTION Gy Gain ; {Notes 3 & 4) 2.85} 3 3.15 | 2.8 3 3,2 VN V3 Maximum Input Signal Vein = 5V (Note 3) 0.9 1 14 0.9 1 11 Vv SVR Supply Voltage Rejection | 12 < V; < 25 V (Note 3) 70 70 dB lb Input Bias Current -2 |-10 -2 4-10] pA Delay to Output 150 | 300 150 | 300 ns OUTPUT SECTION Outout Low Level Isinx = 20 mA 0.1 | 0.4 0.1 | 0.4 V utput Low Lev oF P Isink = 200 mA 1.5 | 22 15 | 22 Isource = 20 mA 13 |13.5 13 | 13.5 | Output High Level Vv oH pag Isounce =200 mA 12 |13.5 12 | 13.5 tr Rise Time Tj =25C CL sink 50 | 150 50 | 150] ns (Note 2) / tr Fall Time Tj =25C C,_ =1nF 50 | 150 50 | 150] ns (Note 2) UNDER-VOLTAGE LOCKOUT SECTION X842/4 15 | 16 | 17 }145]) 16 | 17.5 Start Threshold Vv X843/5 78 | 84 | 9.0 | 7.8 | 84 | 9.0 Min. Operating Voltage | X842/4 9 JO | 11 | 85] 10 | 14.5 V After Turn-on X843/5 70 |76 | 82] 70 | 76 | 82 PWM SECTION Maxirhum Duty Cyc! X842/3 93 | 97 | 100] 93 | 97 | 100 oh le 5 fo aaimum Duy VCS xe44/5 44 | 48 | 50 | 45 | 48 | 50 Minimum Duty Cycle 0 0 % TOTAL STANDBY CURRENT Iot Start-up Current 0.5 4 0.5 1 mA hi Operating Supply Vee = Veins =0 V 11 | 20 41 | 20 |] mA Current Viz Zener Voltage I} =25 mA 34 34 Vv. Notes: 2, These parameters, although guaranteed, are not 100% tested In production. 3. Parameter measured at trip point of latch with Vpn = 0. 4. Gain defined as : Az Am; 0< Vern $0.8 V _ 5, Adjust Vi above the start threshold before setting at 15 V. 6. Output frequency equals oscillator frequency for the UC1842 and UC1843, Output frequency is one half oscillator frequency for the UC1844 and UC1845, A/8 G7 SGS-THOMSON 7 ierseizcraomes 934 fi | |Me 7929237 0022435 9 MM uci842/3/4/5-UC2842/3/4/5-UC3842/3/4/5 SG S-THOMSON -_ JOE D- Figure 1 : Error Amp Configuration. 2 " T-8-11-31 O5mA Error amp can source or sink up to 0.5mA s-7708 Figure 2 : Under Voltage Lockout. ON/OFF COMMAND tee 10 REST OF IC yc1842 | UC1843 <l7mA . CSCS UC18 44] UCI84S V 16v BAY ON <1ImA tov Yorr Yon $-770732 During Under-Voltage Lockout, the output driver is to prevent activating the power switch with extra- biased to sink minor amounts of current. Pin 6 neous leakage currents. should be shunted to ground with a bleeder resistor Figure 3: Current Sense Circuif . 2 Ee COMPARATOR CURRENT ~ SE NSE S7709it PEAK CURRENT (Is) IS DETERMINED BY THE FORMULA 1.0V Is max ~~ s . A SMALL RC FILTER MAY BE REQUIRED TO SUPPRESS SWITCH TRANSIENTS. {57 SGS-THOMsO 8/8 Jf SGS-THOMSON : 935UC1842/3/4/5-UC2842/3/4/5-UC3842/3/4/5 | Me 7929237 OOeedsb Om - * T+58-11-3] ) ___._Fiaure 4 Figure 5 ; Deadtime vs. Ct (Rt > SKQ). S 6 S- : : G- 6105 SG _SOTHONSON _ 30E D yp ree @) fo i ' i I R _ ta os she i Ls Poy I : + RyfCy ) : i an | c on GROUND 1 4 ~- 7 t La! os 4 | for Rr> SKQ t= ae 422 kt 102k pnd Figure 6 : Timing Resistance vs. Frequency. cay | | tka) IQ 47 \ 47 A CyinF 30 \ h \ \ \ \ W\K 10? ~ 403 10% 108 { (Hz) G- 6106 3 Figure 7 ; Output Saturation Characteristics. 5787 Yisat) ) 4 Yelev Tamb=25C wa Tamb=-85C SOURCE sat(V-Yoy) | aise! 1 ii SINK sat(p) } 4 | Figure 8 : Error Amplifier Open-loop Frequency Response, G-5788 " GY : ~ . {dB) . e a \ Q -J 60 XQ 748 40 = - A 20 - N 15 GAIN \ Q \ ~180 10 - 100 m - 10K , 100K 1M #(Hz) 6/8 4 f 7 SGS-THOMS Sf SES-THOMSON 936 5MM 7929237 0022437 2 MM uci1842/3/4/5-UC2842/3/4/5-UC3842/3/4/5 S G S-THOMSON Figure 9 : Open Loop Test Circuit. 30E Dd fo . f T-58-11-31 7 O REF AMO 2N2222 aH 100K.0 1) comp VReF 1s __ oy secee Ka ERROR AMP 4 21 y, 2 ADJUST FB Yi ve sen uctes2 ao, IseNse yy uF ou ABENSE SENSE ouTPUT O ouTeuT 47kKo ; AY nycy crouno }* 4 <Q) GROUND cr a S-7m High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close Figure 10 : Shutdown Techniques. to pin 5 in a single point ground. The transistor and 5 KQ potentiometer are used to sample the oscilla- tor waveform and apply an adjustable ramp to pin 3. TO CURRENT SENSE RESISTOR SIN COMP SHUTDOWN, Shutdown of the UC1842 can be accomplished by two methods ; either raise pin 3 above 1V or pull pin 1 below a voltage two diode drops above ground. Either method cause the output of the PWM com- parator to be high (refer to block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shut- down condition at pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR which will be reset by cycling Vi below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset. Ky SGS-THOMSON __ 78 MIGRGELECTRONICS 937riguie 11 :Oftine Fiyback Regulate, 8 @ STTHOMSON, DED igure 11 : Off-line Flyback Regulator. f T-58~1 1-31 : bz 03 Nasr < 2 . a, Jue ean RS 150K0 F Ww cw opr s uciess |, AT 220 J ~ oe on Busoio Timer T | L S-T100 Power Supply Specifications 1. Input Voltage : 95 VAC to 130 VAC 5. Output Voltage : (50 Hz/60 Hz) A.+5V,+5%:1Ato4 A load Line | ion: - Ripple voltage : 50 mV P-P Max. 2. Line Isolation _ 8780Ve B+ 12 V,+3%:0.1 Ato 0.3 A load 3. Switching Frequency: 40 KHz Ripple voltage : 100 mV P-P Max. 4. Efficiency @ Full Load : 70 % C,-12V,3%:0.1 Ato 0.3 A load Ripple voltage : 100 mV P-P Max. Figure 12 : Slope Compensation. Isense Rsense S5-9463 SLOPEC: ; LIB A fraction of the oscillator ramp can be resistively Note that capacitor, C, forms a filter with Re to su- summed with the current sense signal to provide press the leading edge switch spikes. slope compensation for converters requiring duty cycles over 50 %, 8/8 | SGS-THOMSO! AYy Scnsoreanes 938 i - UC1842/3/4/5-UC2842/3/4/5-UC3842/3/4/5 - Til 79292357 O0Oe224S8 4 = .