SY58605U
3.2Gbps Precision, LVDS Buffer with
Internal Termination and Fail Safe Input
Precision Edge is a registered trademark of Micrel, Inc.
MLF and MicroLeadFrame are re gistered trademarks of Amkor Technology.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
August 2007
M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
General Description
The SY58605U is a 2.5V, high-speed, fully differential
LVDS buffer optimized to provide less than 10ps
pp
total
jitter. The SY58605U can process clock signals as fast
as 2GHz or data patterns up to 3.2Gbps.
The differential input includes Micrel’s unique, 3-pin
input termination architecture that interfaces to LVPECL,
LVDS or CML differential signals, (AC- or DC-coupled)
as small as 100mV (200mV
pp
) without any level-shifting
or termination resistor networks in the signal path. For
AC-coupled input interface applications, an integrated
voltage reference (V
REF-AC
) is provided to bias the V
T
pin.
The output is 325mV LVDS, with rise/fall times
guaranteed to be less than 100ps.
The SY58605U operates from a 2.5V ±5% supply and is
guaranteed over the full industrial temperature range
(–40°C to +85°C). For applications that require CML or
LVPECL outputs, consider Micrel’s SY58603U and
SY58604U, buffers with 400mV and 800mV output
swings respectively. The SY58605U is part of Micrel’s
high-speed, Precision Edge
®
product line.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Functional Block Diagram
Precision Edge
®
Features
• Precision 325mV LVDS buffer
• Guaranteed AC performance over temperature and
voltage:
– DC-to > 3.2Gbps throughp ut
– <300ps typical propagation delay (IN-to -Q)
– <100ps rise/fall times
• Fail Safe Input
– Prevents output from oscillating when input is
invalid
• Ultra-low jitter design
– <1ps
RMS
cycle-to-cycle jitter
– <10ps
PP
total jitter
– <1ps
RMS
random jitter
– <10ps
PP
deterministic jitter
• High-speed LVDS output
• 2.5V ±5% power supply operation
• Industrial temperature range: –40°C to +85°C
• Available in 8-pin (2mm x 2mm) MLF
®
package
Applications
• All SONET clock and data distribution
• Fibre Channel clock and data distribution
• Gigabit Ethernet clock and data distribution
• Backplane distribution
Markets
• Storage
• ATE
• Test and measurement
• Enterprise networking equipment
• High-end servers
• Access
• Metro area network equip ment
Micrel, Inc. SY58605U
August 2007
2 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Ordering Information(1)
Part Number Package
Type Operating
Range Package Marking Lead
Finish
SY58605UMG MLF-8 Industrial
605 with Pb-Free
bar-line indicator NiPdAu
Pb-Free
SY58605UMGTR
(2)
MLF-8 Industrial 605 with Pb-Free
bar-line indicator NiPdAu
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configur ation
8-Pin MLF
®
(MLF-8)
Pin Description
Pin Number Pin Name Pin Function
1, 4 IN, /IN Differential Input: This input pair is the differential signal input to the device. Input
accepts DC-coupled differential signals as small as 100mV
(200mV
PP
). Each pin of
this pair internally terminates with 50 to the VT pin. If the input swing falls below a
certain threshold (typically 30mV), them the Fail Safe Input (FSI) feature will
guarantee a stable output by l atching the output to its last valid state. See “Input
Interface Applications” subsection for more details.
2 VT
Input Termination Center-Tap: Each input terminates to this pin. The V
T
pin provides
a center-tap for each input (IN, /IN) to a termination network for maximum interface
flexibility. See “Input Interface Applications” subsection for more details.
3 VREF-AC
Reference Voltage: This output biases to V
CC
–1.2V. It is used for AC-coupling input
IN and /IN. Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR
capacitor to VCC. Maximum sink/source current is ±1.5mA. See “Input Interface
Applications” subsection for more details.
5 GND,
Exposed pad Ground: Exposed pad must be conn ected to a ground plane that is the same
potential as the ground pin.
6, 7 /Q, Q LVDS Differential Output Pair: The output swing is typically 325mV. Normall y
terminated with 100 across the pair (Q, /Q). See “LVDS Output Termination”
subsection for more details.
8 VCC
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to
the V
CC
pin as possible.
Micrel, Inc. SY58605U
August 2007
3 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Absolute Maximum Ratings(1)
Supply Voltage (V
CC
)...............................–0.5V to +4.0V
Input Voltage (V
IN
)............................ –0.5V to V
CC
+0.3V
LVDS Output Current (I
OUT
)..................................±10mA
Input Current
Source or Sink Current on (IN, /IN) ...............±50mA
Current (V
REF
)
Source or sink current on V
REF-AC(4)
..............±1.5mA
Maximum operating Junction Temperature ..........125°C
Lead Temperature (soldering, 20sec. )..................260°C
Storage Temperature (T
s
) ....................–65°C to +150°C
Operating Ratings(2)
Supply Voltage (V
IN
)...................... +2.375V to +2.625V
Ambient Temperature (T
A
)...................–40°C to +85°C
Package Thermal Resistance
(3)
MLF
®
Still-air (θ
JA
)............................................93°C/W
Junction-to-board (ψ
JB
)..........................56°C/W
DC Electrical Characteristics(5)
T
A
= –40°C to +85°C, unles s otherwise stated.
Symbol Parameter Condition Min Typ Max Units
V
CC
Power Supply Voltage Ran ge 2.375 2.5 2.625 V
I
CC
Power Supply Current No load, max. V
CC
35 50 mA
R
DIFF_IN
Differential Input Resistance
(IN-to-/IN) 90 100 110
V
IH
Input HIGH Voltage
(IN, /IN) IN, /IN 1.2 V
CC
V
V
IL
Input LOW Voltage
(IN, /IN) IN, /IN 0 V
IH
–0.1 V
V
IN
Input Voltage Swing
(IN, /IN) see Figure 3a, Note 6 0.1 1.7 V
V
DIFF_IN
Differential Input Voltage Swing
(|IN - /IN|) see Figure 3b 0.2 V
V
IN_FSI
Input Voltage Threshold that
Triggers FSI
30 100 mV
V
REF-AC
Output Reference Voltage V
CC
–1.3 V
CC
–1.2 V
CC
–1.1 V
V
T_IN
Voltage from Input to V
T
1.28 V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. ψ
JB
and θ
JA
values are determined for a 4-layer board in still-air number, unless otherwise stated.
4. Due to the limited drive capability, use for input of the same package only.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IN
(max) is specified when V
T
is floating.
Micrel, Inc. SY58605U
August 2007
4 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
LVDS Output DC Electrical Characteristics(7)
V
CC
= +2.5V ±5%, R
L
= 100 across the outputs; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
V
OUT
Output Voltage Swing See Figure 3a 250 325 mV
V
DIFF_OUT
Differential Output Vol tage Swing See Figure 3b 500 650 mV
V
OCM
Output Common Mode Voltage 1.125 1.20 1.275 V
VOCM
Change in Common Mode
Voltage -50 50 mV
Note:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Micrel, Inc. SY58605U
August 2007
5 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
AC Electrical Characteristics
V
CC
= +2.5V ±5%, R
L
= 100 across the outputs, Input t
r
/t
f
: <300ps; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
NRZ Data 3.2 Gbps f
MAX
Maximum Frequency V
OUT
> 200mV Clock 2.0 3 GHz
V
IN
: 100mV-200mV 170 280 420 ps t
PD
Propa gation Delay IN-to-Q 200mV-800mV 130 200 300 ps
t
Skew
Part-to-Part Skew Note 8 135 ps
Data Random Jitter Note 9 1 ps
RMS
Deterministic Jitter Note 10 10 ps
PP
Clock Cycle-to-Cycle Jitter Note 11 1 ps
RMS
t
Jitter
Total Jitter Note 12 10 ps
PP
t
r,
t
f
Output Rise/Fall Times
(20% to 80%) At full output swing. 35 60 100 ps
Duty Cycle Differential I/O 47 53 %
Notes:
8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the
respective inputs.
9. Random jitter is measured with a K28.7 pattern, measured at f
MAX
.
10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23
–1 PRBS pattern.
11. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. t
JITTER
_
CC
= T
n
–T
n+1
,
where T is the time between rising edges of the output signal.
12. Total jitter definition: with an ideal clock input frequency of f
MAX
(device), no more than one output edge in 10
12
output edges will deviate by
more than the specified peak-to-peak jitter value.
Micrel, Inc. SY58605U
August 2007
6 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Functional Description
Fail-Safe Input (FSI)
The input includes a special failsafe circuit to sense
the amplitude of the input signal and to latch the
outputs when there is no input signal present, or
when the amplitude of the input signal drops
sufficiently below 100mV
PK
(200mV
PP
), typically
30mV
PK
. Maximum frequency of SY58605U is limited
by the FSI function.
Input Clock Failure Case
If the input clock fails to a floating, static, or extremely
low signal swing, the FSI function will then eliminate a
metastable condition and guarantee a stable output.
No ringing and no undetermined state will occur at the
output under these conditions.
Note that the FSI function will not prevent duty cycle
distortion in case of a slowly deteriorating (but still
toggling) input signal. Due to the FSI function, the
propagation delay will depend on rise and fall time of
the input signal and on its amplitude. Refer to “Typical
Characteristics” for detailed information.
Timing Diagrams
Figure 1a. Propagatio n Delay
Figure 1b. Fail Safe Feature
Micrel, Inc. SY58605U
August 2007
7 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Typical Characteristics
V
CC
= 2.5V, GND = 0V, V
IN
= 100mV, R
L
= 100 across the outputs, T
A
= 25°C, unless otherwise stated.
Micrel, Inc. SY58605U
August 2007
8 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Functional Characteristics
V
CC
= 2.5V, GND = 0V, V
IN
= 250mV, Data Pattern: 2
23
-1, R
L
= 100 across the outputs, T
A
= 25°C, unless otherwise
stated.
Micrel, Inc. SY58605U
August 2007
9 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Functional Characteristics
(continued)
V
CC
= 2.5V, GND = 0V, V
IN
= 100mV, R
L
= 100 across the outputs, T
A
= 25°C, unless otherwise stated.
Micrel, Inc. SY58605U
August 2007
10 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Input Stage
Figure 2. Simplified Differential Input Buffer
Figure 3a. Single-Ended Swing
Figure 3c. LVDS Common Mode Measurement
Figure 3b. Differential Swing
Figure 3d. LVDS Differentia l Measurement
Micrel, Inc. SY58605U
August 2007
11 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Input Interface Applications
Figure 4a. CML Interface
(DC-Coupled)
Option: May connect V
T
to V
CC
Figure 4b. CML Interface
(AC-Coupled)
Figure 4c. LVPECL Interface
(DC-Coupled)
Figure 4d. LVPECL Interface
(AC-Coupled)
Figure 4e. LVDS Interface
Related Product an d S upport Documents
Part Number Function Data Sheet Link
SY58603U 4.25G bps Precision CML Buffer with
Internal Termination and Fail Safe Input http://www.micrel.com/page.do?page=/product-
info/products/sy58603u.shtml
SY58604U 3.2G bps Precision LVPECL Buffer with
Internal Termination and Fail Safe Input http://www.micrel.com/page.do?page=/product-
info/products/sy58604u.shtml
HBW Solutions Ne w Products and T ermination Application
Notes http://www.micrel.com/page.do?page=/product-
info/as/HBWsolutions.shtml
Micrel, Inc. SY58605U
August 2007
12 M9999-082907-B
hbwhelp@micrel.com or (40 8) 955-1690
Package Information
8-Pin (2mm x 2mm) MLF
®
(MLF-8)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for
its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to resul t in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2006 Micrel, Incorporated.
