NAPC/PHILIPS SEMICOND bLE D MM 66539e4 007183e Tie MBSICI Philips Semiconductors Microcontroller Peripherals Field-programmable microcontroller peripheral Preliminary specification PSD311 Key Features May, 1993 QO Single Chip Programmable Peripheral for Microcontrolier-based Applications Q1 19 individually Configurable VO pins that can be used as: Microcontroller I/O port expansion Programmable Address Decoder (PAD) I/O - Latched address output Open drain or CUOS QO Two Programmable Arrays (PAD A and PAD B) Total of 40 Product Terms and up to 16 inputs and 24 Outputs Address Decoding up to 1 MB Logic replacement Q) No Giue Microcontroller Chip-Set Built-in address latches for multiplexed address/data bus Nori-muitiplexed address/data bus mode 8-bit data bus width ALE and Reset polarity programmable Selectable modes for read and write control bus as RD/WR or R/W/E PSEN pin for 8051 users Q) 256 Kbits of UV EPROM Configurable as 32K x8 Divides into 8 equal mappable blocks for optimized mapping ~ Block resolution is 4K x 8 120 ns EPROM access time, including input latches and PAD address decoding. T-9-19-63 16 Kbit Static RAM Configurable as 2K x 8 120 ns SRAM access time, including input latches and PAD address decoding Address/Data Track Mode Enables easy tnterface to Shared Resources (e.9., Mail Box SRAM) with other Microcontrollers or a Host Processor Built-In Security Locks the PSD311 and PAD Decoding Configuration Available in a Choice of Packages 44 Pin PLCC and CLCC 52 Pin PQFP 44 Pin CPGA Simple Menu-Driven Software: Configure the PSD311 on an IBM PCbLE D MM 6653924 0071833 929 MBSICI Preliminary specification NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals Field-programmable microcontroller peripheral PSD311 Security Security Mode in the PSD3XxX tocks the software. In window packages, the mode is Mode contents of the PAD A , PAD B and all the erasable through UV full part erasure. In configuration bits. The EPROM, SRAM, the security mode, the PSD3XX contents and I/O contents can be accessed only cannot be copied on a programmer. through the PAD. The Security Mode can be set by the MAPLE or Programming CMilser-Bit The CMiser-Bit provides a programmable In the default mode, or if the PSD3XX is option for power-sensitive applications that configured without programming the require further reduction in power CMiser-Bit (CMiser = 0), the device consumption. The CMiser-Bit (CMiser = 1) operates at specified speed and power in the Maple portion of the PSD3XX sytem rating as specified in the A.C. and D.C. development software can be used to Characteristics. Cineof ne EPROM Bocas mike Poa However he CMser ts programed ; iser = 1), the device consumes even whenever the EPROM is not accessed, lower current, and is reflected in the data thereby reducing the active current heet. Thi de h dder i consumed by the PSD3XX. Sheet, This mode has an adder in propagation delay in 15, T6, and T7 parameters in the A.C. Characteristics, and should be added to compute worst-case timing requirements in the application. Absolute Symbol | Parameter Condition Min | Max | Unit Maximum CERDIP -65 [| +150[ C Ratings! Tste Storage Temperature PLASTIC 65 +125 C Voltage on any Pin With Respect to GND | -0.6 +7 Vv Programming . Vpp Supply Voltage With Respect to GND | -0.6 +14 Vv Voce Supply Voltage With Respect to GND | -0.6 +7 Vv ESD Protection >2000 Vv NOTE: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at theses or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability. Operating Vec Tolerance Range Temperature Vec ud Rang e 12 15 -20 Commercial 0 C to +70C +5V +10% +10% +10% Industrial 40 C to +80C +5V + 10% +10% Military ~55 C to +125C +5V + 10% Recommentied Symbol! Parameter Conditions Min | Typ | Max | Unit Conditions Veco Supply Voltage All Speeds 45 5 5 | V Vin High-level Input Voltage | Veco =45Vto55V 2 Vv Vit Low-level Input Voltage | Voc =4.5Vto5.5V 0 08 | V May, 1993 56NAPC/PHILIPS SEMICOND bB1E D MM 6653924 0071834 &65 MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 DC CMiser = 7 Characteristics | Symbof| Parameter | Conditions Subtract: Min | Typ | Max| Min| Typ | Max | Unit lo. = 20 [A 0.01 | 0.1 Vv VoL Output Low Veco =4.5V Voltage lop = 8 MA Veo = 4.5V 0.15 | 0.45 Vv lon =20HA | 4 4 | 4 49 Vv Vou Output High Veco = 4.5 V . Voltage lon = -2 MA Voc =45V 24) 3.9 Vv Voc Standby Comm'! 50 | 100 HA Ispi Current (CMOS) - (Notes 2 and 4) Ind/Mil 75 | 150 pA Comm'! (Note 6) 16 | 35 7 10 | mA Active Current Comm (CMOS) (No (Note 7) 28 | 50 7 10 | mA lect Internal Memory - Block Selected) (Note 6 16 | 45 7 | 10 | ma (Notes 2 and 5) (Note 6) Ind/Mil (Note 7) 28 | 60 7 10 | mA Comm" 16 | 35 o | o |ma (Note 6) Active Current Comm og | 50 o | o |ma loo (CMOS) (EPROM | (Note 7) Block Selected) Ind/Mil (Notes 2.and5) | (Note 6) 16 | 45 0] 9 | mA Ind/Mil (Note 7) 28 | 60 0 QO | mA Comm! (Note 6) 47 | 80 7 10 | mA Active Current Comm'l 59 | 95 7 | 10 )ma loos (CMOS) (SRAM _ | (Note 7) Block Selected ind/Mil (Notes 2 and 5) (Note 6) 47 | 100 7 | 10 | ma Ind/Mil (Note 7) 59 | 115 7 10 |mA | Input Leakage Vin = 5.5 V _ u Current or GND 1 #01) 1 HA | Output Leakage Vout =5.5V } Lo Current or GND 10} +5 | 10 pA NOTES: 2. CMOS inputs: GND + 0.3 V or Voc + 0.3V. 3. TTL inputs: Vi < 0.8 V, Vii 2 2.0 V. 4. CSIVA19 is high and the part is in a power-down configuration mode. 5. Add 3.0 mA/MHz for AC power component (power = AC + DC). 6. Ten (10) PAD product terms active. (Add 380 2A per product term, typical, or 480 pA per product term maximum 7. Forty-one (41) PAD product terms active. May, 1993 57NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071835 ?T1 MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 AC Characteristics -90 -12 15 20 . Symbol Parameter - - - - CMiser=1) ynit Min | Max | Min | Max | Min | Max| Min |Max| Add: T1 ALE or AS Pulse Width 20 30 40 50 0 ns T2 Address Set-up Time 5 9 12 15 0 ns T3 Address Hoid Time 8 13 15 25 0 ns Leading Edge of Read T4 | to Data Active 9 0 o 0 0 ns T5 ALE Valid to Data Valid 100 140 170 200 10 ns T Address Valid to Data Valid 90 120 150 200 10 ns 17 | CSI Active to Data Valid 100 150 160 200 15 ns Leading Edge of Read T8 to Data Valid 32 38 55 60 0 ns T9 Read Data Hold Time 0 0 0 0 0 ns Trailing Edge of Read to T10 | Data High-Z 35 35 40 45 0 ns Trailing Edge of ALE or AS T11 | to Leading Edge of Write | 0 0 9 0 ns RD, E, PSEN, or DS T12 Pulse Width 40 45 60 75 0 ns T12A | WR Pulse Width 20 25 35 45 0 ns Trailing Edge of Write or T13 Read to Leading Edge Q 0 0 0 0 ns of ALE or AS Address Valid to Trailing T14 Edge of Write 90 120 150 200 0 ns CSI Active to Trailing Edge T15 of Write 100 130 160 200 0 ns T16 Write Data Set-up Time 20 25 30 40 0 ns T1i7 Write Data Hold Time 5 5 10 15 0 ns Port to Data Out Valid T18 Propagation Delay 30 30 35 45 0 ns T19 Port Input Hold Time 0 0 0 0 0 ns Trailing Edge of Write 20 to Port Output Valid 40 40 50 60 0 ns te1 | ADior Control to CSOi 6 | 25/6 |30| 6 |35|5 | 45 0 ns Valid T22 ADi or Control to CSOi 5 25 5 30 4 35 4 45 0 ns InvalidNAPC/PHILIPS SEMICOND bE D MM 6653924 0071834 638 MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 AC Characteristics (Cont.) -90 12 -15 -20 . Symbol Parameter - - - - CMiser=1) unit Min | Max | Min | Max | Min | Max | Min | Max| Add: Track Mode Address T23 Propagation Delay: 22 22 22 28 0 ns CSADOUT1 Already True Track Mode Address Propagation Delay: T23A CSADOUT1 Becornes 33 38 40 50 0 ns True During ALE or AS Track Mode Trailing Edge 724 of ALE or AS to Address 32 32 35 40 0 ns High-Z Track Mode Read T25 Propagation Delay 29 29 29 35 0 ns Track Mode Read T26 Hold Time 11 | 29 11 | 29 | 10 | 29 | 10 | 35 0 ns Track Mode Write Cycle, 727 Data Propagation Delay 20 20 20 30 0 ns Track Mode Write T28 Cycle, Write to Data 8 30 8 30 7 40 7 55 0 ns Propagation Delay Hold Time of Port A T29 Valid During Write 2 2 2 2 0 ns CSOi Trailing Edge 130 | CSiActive to CSOi Active | 9 | 40 | 9 | 45 | 9 | 45 | 8 | 60 0 ns CSI Inactive to CSOi T31 Inactive 9 40 9 45 9 45 8 60 0 ns Direct PAD Input as , T32 Hold Time 10 10 12 15 0 ns 733 | R/W Active to E High 20 20 30 40 ft) ns 734 | EEndto RW 20 20 30 40 0 ns T35 AS Inactive to E high 0 0 0 0 0 ns Address to Leading T36 Edge of Write 20 20 25 30 0 ns NOTES: 8. ADi = any address line. 9, TSOi = any of the chip-select output signals coming through Port B (CSO-CS7) or through Port C (C58-C510). 10. Direct PAD input = any of the following direct PAD input lines: CSV/A19 as transparent A19, RD/E/DS, WR or RM, transparent PCO-PC2, ALE (or AS). 11. Control signals RD/E/DS or WR or R/W. May, 1993 59NAPC/PHILIPS SENICOND Philips Semiconductors Microcontroller Peripherals bl1E D @ 6653924 0071837 S74 MESIC3 Preliminary specification Field-programmable microcontroller peripheral PSD311 Figure 1. Timing of 8-Bit Multiplexed Address/DataBus, CRRWR = 0 CSI/A19 as CSI Direct (12) PAD Input Multiplexed (13) (Inputs A0/ADO- A7/AD7 Active High PSEN WAMpp or RW as WR Any of PAO-PA7 as I/O Pin Any of PBO-PB7 as VO Pin Any of PAO-PA7 Pins as Address Outputs READ CYCLE STABLE INPUT 6 10 ADDRESS A DATA VALID 2 3 9 ADDRESS A See referenced notes on page 66. May, 1993 STABLE INPUT OUTPUT OUTPUTNAPC/PHILIPS SEMICOND b1E D MB 6653924 0071838 400 MESICI Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 Figure 2. Timing of 8-Bit Multiplexed Address/DataBus, CRRWR=1 READ CYCLE WRITE CYCLE 32 CSVAI9 as CSI 15 32 4.2) PAD Ineat y STABLE INPUT STABLE INPUT 6 14 Multiplexed (13) Inputs 10 14 AO/ADO- - A7/AD7 ADDRESS A DATA VALID ADDRESS B 2 3 9 3 Active High AS Active Low AS ADE as E WRVpp or R/W as R/W Any of PAQ-PA7 as VO Pin Any of PBO-PB7 as I/O Pin Any of PAO-PA7 Pins as Address Outputs ADDRESS A ADDRESS B See referenced notes on page 66. May, 1993 61NAPC/PHILIPS SEMICOND BLE D MM 6653924 0071839 347 MESIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 Figure 3. Timing of 8-Bit Data, Non-Multiplexed Address/DataBus, CRRWR = 0 READ CYCLE WRITE CYCLE 32 CSVA19 as CS| irect (12) p AD Input STABLE INPUT STABLE INPUT 6 14 A0-A15 STABLE INPUT STABLE INPUT 32 Multiplexed (13) Inputs 10 PA0-PA7 DATA VALID 9 Active High ALE Active Low ALE RD/E as RD WAV pp_or RW as WR Any of PBO-PB7 as I/O Pin See referenced notes on page 66. May, 1993 62NAPC/PHILIPS SEMICOND bLE D MM 6653924 00714840 O69 MBSICS Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 Figure 4. Timing of 8-Bit Data, Non-Multiplexed Address/DataBus, CRRWR=1 READ CYCLE WRITE CYCLE 32 CSVA19 as CSI : i 5 | Pp AD Input 3 STABLE INPUT STABLE INPUT | 6 14 A0-A15 STABLE INPUT STABLE INPUT 32 Multiplexed (13) Inputs 10 PAQ-PA7 DATA VALID 9 Active High ALE Active Low ALE RDVE as E WAMVpp or RW as R/W Any of PBO-PB7 OUTPUT as /O Pin See referenced notes on page 66. May, 1993 63NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071841 TTS MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 Figure 5. Chip-Select Output Timing 30 31 tsiaig ~ \ / as CSI \ Direct PAD ?) + INPUT STABLE Input Muttiplexed (2) PAD Inputs x 2 3 | ALE | (Multiplexed =f LY Mode Only) <-}> orALE \ / (Multiplexed | A Mode Only) 21 22 t > Pep Gso4i9T SOSCS A AN See referenced notes on page 66. May, 1993 64NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071384e 931 MBSICS Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 Figure 6. Port A as ADO-AD7 Timing (Track Mode), CRRWR = 0 READ CYCLE WRITE CYCLE Direct PAD Input STABLE INPUT STABLE INPUT (12,15) 2 Multiplexed PAD Inputs STABLE INPUT STABLE INPUT (16,18) 2 3 26 3 AO/ADO- A7/AD7 ADDRESS DATA VALID ADDRESS ALE or ALE RD/E as RD WRMVpp or RW as WR 24 PAO-PA? ADR OUT DATA IN ADR OUT csoi (14,17) See referenced notes on page 66. May, 1993 65NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals Field-programmable microcontroller peripheral bLE D WM 6653924 0071843 474 MBSIC3 Preliminary specification PSD311 Figure 7. Port A as ADO-AD7 Timing (Track Mode), CRRWR = 1 Direct PAD Input (12,15) Multiplexed PAD Inputs (16,18) AQO/ADO- A7/AD7 AS or AS RD/E as E WEWpp or RW as R/V PAO-PA7 $s 2 READ CYCLE WRITE CYCLE STABLE INPUT STABLE INPUT TABLE INPUT STABLE INPUT 3 26 3 ADDRESS DATA VALID ADDRESS 24 DATA IN ADR OUT CSdi (14,17) 12. Direct PAD input = any of the following direct PAD input lines: CSV/A19 as transparent A19, ores for Timing Abve, WR or RAW, transparent PCO-PC2, ALE in non-multiplexed modes. 13. Multiplexed inputs: any of the following inputs that are latched by the ALE (or AS): Diagrams AO/ADO-A15/AD15, CSIA19 as ALE dependent A19, ALE dependent PCO-PC2. May, 1993 14, CSOi = any of the chip-select output signals coming through Port B (CS0-CS7) or through Port C (CS8-CS10). 15. CSADOUT1, which internally enables the address transfer to Port A, should be derived only from direct PAD input signals, otherwise the address propagation delay is slowed down. 16. CSADIN and CSADOUT2, which internally enable the data-in or data-out transfers, respectively, can be derived from any combination of direct PAD inputs and multiplexed PAD inputs. 17. The write operation signals are included in the CSOi expression. 18. Multiplexed PAD inputs: any of the following PAD inputs that are latched by the ALE (or AS) in the multiplexed modes: A11/AD11-A15/AD15, CSI/A19 as ALE dependent A19, ALE dependent PCO-PC2. 19. CSOi product terms can include any of the PAD input signals except for reset and CSI. 66NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals b1E D MM 6653924 0071444 704 MBSTIC3 Preliminary specification Field-programmable microcontroller peripheral PSD311 Pin 29 | Symbol Parameter Conditions | Typical? | Max | Unit Capacitance - - : Cin Capacitance (for input pins only) Vin = 0 V 4 6 pF Cour | Capacitance (for input/output pins) Vout=0V 8 12 pF Cypp | Capacitance (for WR/Vpp or R/W/Vpp) | Vpp=0V 18 25 pF NOTES: 20. This paramter is only sampled and is not 100% tested. 21. Typical values are for Ts = 25C and nominal supply voltages. Figure 8. AC Testing Input/Output 30V Waveform x 4 ( TEST POINT > 1.5V OV Figure 9. 201V AC Testing Load Circult 1959 DEVICE UNDER TEST C, =30 pF (INCLUDING mies SCOPE AND JIG = CAPACITANCE) Erasure and To clear all locations of their programmed device. For maximum system reliability, Programming contents, expose the device to ultra-violet these sources should be avoided. If used in May, 1993 light source. A dosage of 15 W second/cm? is required. This dosage can be obtained with exposure to a wavelength of 2537 A and intensity of 12000 pW/cm? for 15 to 20 minutes. The device should be about 1 inch from the source, and all filters should be removed from the UV light source prior to erasure. The PSD3XX and similar devices will erase with light sources having wavelengths shorter than 4000 A. Although the erasure times will be much longer than with UV sources at 2537 A, exposure to fluorescent light and sunlight eventually erases the 67 such an environment, the package windows should be covered by an opaque substance. Upon delivery, or after each erasure, the PSD3XxX device has all bits in the PAD and EPROM in the 1 or high state. The config- uration bits are in the 0 or low state. The code, configuration, and PAD MAP data are loaded through the procedure of programmingNAPC/PHILIPS SEMICOND b1E D MM 6653924 007138645 640 MBSICS Philips Semiconductors Microcontroller Peripherais Preliminary specification Field-programmable microcontroller peripheral PSD311 Pin 44-Pin 52-Pin Assignments Pin Name PLOC/CLEC PQFP Package Package PSEN 1 46 WRVpp or RW 2 47 RESET 3 48 PB7 4 49 PB6 5 50 PB5 6 51 PB4 7 2 PB3 8 3 PB2 9 4 PBI 10 5 PBO 14 6 GND 12 7 ALE or AS 13 8 PA7 14 9 PA6 15 10 PA5 16 14 PA4 17 12 PA3 18 15 PA2 19 16 PA1 20 17 PAO 21 18 RD/E 22 19 ADO/AO 23 20 AD1/A1 24 21 AD2/A2 25 22 AD3/A3 26 23 AD4/A4 27 24 ADS/A5 28 25 AD6/A6 29 28 AD7/A7 30 29 A8 31 30 AQ 32 31 A10 33 32 GND 34 33 Alt 35 34 Al2 36 35 A13 37 36 A14 38 37 Ai5 39 38 PCO 40 44 PC1 41 42 PC2 42 43 A19/CSI 43 44 Veco 44 45 NOTE: 36. Pins 1, 13, 14, 26, 27, 39, 40, and 52 are No Connect. May, 1993 68NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals b1E D MM 66539e4 OO7364b 547 BESICS Preliminary specification Field-programmable microcontroller peripheral PSD311 Package Information = o _ & Ig Figure 10. ~ HEB e8a5 Drawing L4- gepdeW sc 888 44 Pin Ceramic SRS Ree Leaded Chip i a Carrier (CLEC) nn wh oe ane with Window PED 9 eh 37 At (Package Type L) PB1 10 7 36 A12 PBO 11 COU 35 At GND 12 34 GND ALE or AS 13 : 33 A10 PA7 14 : 32 AG PAS 15 31 A8& PAS 16 cc} 30 ADZ/A7 PA4 17 eT] 29 AD6/AG 22RaKRSRRRR Qe pguezezs2 an a =a 3 (TOP VIEW) i 838 8 3 2 Figure 11. Drawing J2 - iz 44 Pin Plastic kK 6 B Leaded Chip word riz .8NTB Carrler (PLCC) eeagel g <2 e (Package Type J) wewenne FEI Ppa 70 PB3 8 Y Pe2 9 U PB1 10 PBO 11 GND 12 ALE or AS 13 PA7 14 PA6 15 PAS 16 Pa4 17 U 22ST HRRARERR (TOP VIEW) 888299 May, 1993NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals BLE D MM 6653924 0071847 413 MESIC3 Pretiminary specification Field-programmable microcontroller peripheral PSD311 Figure 12, Drawing Q2- 52 Pin PQFP iz (Package Type Q) 5 ite @ gBSESER 22858 Sasesseseesysgysse DONO Oooo / N\ O Ne 1 C7 [139 NC Pea 2 Co [138 A15 Pa3 3 C4 [137 A14 Pp2 4 Co [136 A13 Pai 5 Co 135 A12 PBo 6 [J [34 Alt GND 7 Co [133 GND ALEor AS 8 [ f}32 A10 Pa? 9 CJ []31 A9 Pas 10 (J [130 As Pas 11 (J [] 20 AD7/A7 Paa 12 CJ [} 28 ADG/A6 NC 13 (J [727 NC \ / UUUUUUU UU UU ZSeereseRrageses qadaqdce (TOP VIEW) May, 1993 70NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071648 35T MESICI Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD311 Ordering Operating Spd.| Package Package Manufacturin Information Part Number ins ) Type. Drawing Temperature Procedure 9 nge PSD311-90 A 90 | 44-pin PLCC J2 Commercial Standard PSD311-90 KA 90 | 44-pinCLCC L4 Commercial Standard PSD311-12 A 120 | 44-pin PLCC J2 Commercial Standard PSD311-12KA | 120 | 44-pin CLCC L4 Commercial Standard PS$D311-12 B 120 | 52-pin PQFP Q2 Commercial Standard PSD311-15 A 150 | 44-pin PLCC J2 Commercial Standard PSD311-151 A 150 | 44-pin PLCC J2 Industrial Standard PSD311-15KA | 150 | 44-pin CLCC L4 Commercial Standard PSD311-151 KA | 150 | 44-pin CLCC L4 Industrial Standard PSD311-15 B 150 | 52-pin PQFP Q2 Commercial Standard PS0311-15! B 150 | 52-pin PQFP Q2 Industrial Standard PSD311-20 A 200 | 44-pin PLCC J2 Commercial Standard PSD311-201 A 200 | 44-pin PLCC J2 Industrial Standard PSD311-20 KA | 200 | 44-pin CLCC L4 Commercial Standard PSD311-201 KA | 200 | 44-pin CLOG L4 Industrial Standard PSD311-20 B 200 | 52-pin PQFP Q2 Commercial Standard PSD311-201 B 200 | 52-pin POFP Q2 Industrial Standard May, 1993 71