HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Data Sheet September 2001 27A, 600V, UFS Series N-Channel IGBTs with Anti-Parallel Hyperfast Diode This family of MOS gated high voltage switching devices combine the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. The IGBT used is the development type TA49171. The diode used in anti-parallel with the IGBT is the development type TA49188. The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. File Number Features * 27A, 600V, TC = 25oC * 600V Switching SOA Capability * Typical Fall Time. . . . . . . . . . . . . . . . 112ns at TJ = 150oC * Short Circuit Rating * Low Conduction Loss * Hyperfast Anti-Parallel Diode * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards Packaging JEDEC TO-220AB (ALTERNATE VERSION) Formerly developmental type TA49173. E C G COLLECTOR (FLANGE) Ordering Information PART NUMBER 4411.2 PACKAGE BRAND HGTP12N60B3D TO-220AB 12N60B3D HGTG12N60B3D TO-247 12N60B3D HGT1S12N60B3DS TO-263AB 12N60B3D JEDEC TO-263AB NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, i.e. HGT1S12N60B3DST. COLLECTOR (FLANGE) G Symbol E C JEDEC STYLE TO-247 E C G G E COLLECTOR (BOTTOM SIDE METAL) INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 (c)2001 Fairchild Semiconductor Corporation HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS UNITS Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES 600 V Collector Current Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 27 A At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 12 A Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES 110 A 20 V Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGEM 30 V Switching Safe Operating Area at TJ = 150oC (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . SSOA 96A at 600V Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 104 W Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.83 W/oC Reverse Voltage Avalanche Energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EARV 100 mJ Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, see Tech Brief 334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg -55 to 150 oC 300 260 oC oC Short Circuit Withstand Time (Note 2) at VGE = 12V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 5 s Short Circuit Withstand Time (Note 2) at VGE = 10V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 10 s CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Pulse width limited by maximum junction temperature. 2. VCE(PK) = 360V, TJ = 125oC, RG = 25. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER Collector to Emitter Breakdown Voltage Collector to Emitter Leakage Current Collector to Emitter Saturation Voltage Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current SYMBOL BVCES ICES VCE(SAT) VGE(TH) IGES TEST CONDITIONS MIN IC = 250A, VGE = 0V VCE = BVCES IC = IC110 , VGE = 15V - - V - - 250 A TC = 150oC - - 2.0 mA TC = 25oC TC = 150oC - 1.6 2.1 V - 1.7 2.5 V 4.5 4.9 6.0 V IC = 250A, VCE = VGE VGE = 20V - - 250 nA 96 - - A IC = IC110 , VCE = 0.5 BVCES - 7.3 - V VGE = 15V - 51 60 nC VGE = 20V - 68 78 nC - 26 - ns - 23 - ns - 150 - ns - 62 - ns - 304 350 J - 250 350 J - 22 - ns TJ = 150oC, RG = 25, VGE = 15V L = 100H, VCE = 600V Gate to Emitter Plateau Voltage VGEP On-State Gate Charge Qg(ON) IC = IC110 , VCE = 0.5 BVCES Current Turn-On Delay Time td(ON)I IGBT and Diode at TJ = 25oC ICE = IC110 VCE = 0.8 BVCES VGE = 15V RG = 25 L = 1mH Test Circuit (Figure 19) Current Fall Time trI td(OFF)I tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time td(ON)I trI td(OFF)I Current Fall Time tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF (c)2001 Fairchild Semiconductor Corporation UNITS 600 SSOA Current Rise Time MAX TC = 25oC Switching SOA Current Turn-Off Delay Time TYP IGBT and Diode at TJ = 150oC ICE = IC110 VCE = 0.8 BVCES VGE = 15V RG = 25 L = 1mH Test Circuit (Figure 19) - 23 - ns - 280 295 ns - 112 175 ns - 500 525 J - 660 800 J HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued) PARAMETER SYMBOL Diode Forward Voltage VEC Diode Reverse Recovery Time trr Thermal Resistance Junction To Case RJC TEST CONDITIONS MIN TYP MAX UNITS IEC = 12A - 1.7 2.1 V IEC = 12A, dIEC/dt = 200A/s - 32 40 ns IEC = 1.0A, dIEC/dt = 200A/s - 23 30 ns IGBT - - 1.2 oC/W Diode - - 1.9 oC/W NOTE: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Unless Otherwise Specified VGE = 15V 25 20 15 10 5 0 25 50 75 100 125 150 100 TJ = 150oC, RG = 25, VGE = 15V, L = 100H 90 80 70 60 50 40 30 20 10 0 0 TC , CASE TEMPERATURE (oC) TC 75oC 75oC 110oC 110oC 100 VGE 15V 10V 15V 10V 10 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RJC = 1.2oC/W, SEE NOTES 1 2 3 10 20 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT (c)2001 Fairchild Semiconductor Corporation 300 400 500 700 600 FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA 30 tSC , SHORT CIRCUIT WITHSTAND TIME (s) fMAX , OPERATING FREQUENCY (kHz) TJ = 150oC, RG = 25, L = 1mH, V CE = 480V 200 VCE , COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE 300 100 100 16 VCE = 360V, RG = 25, TJ = 125oC 14 90 ISC 12 80 10 70 8 60 50 6 tSC 40 4 2 10 11 12 13 14 30 15 ISC , PEAK SHORT CIRCUIT CURRENT (A) ICE , DC COLLECTOR CURRENT (A) 30 ICE , COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 4. SHORT CIRCUIT WITHSTAND TIME HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Unless Otherwise Specified (Continued) 70 TC = -55oC 60 TC = 150oC 50 40 TC = 25oC 30 20 DUTY CYCLE < 0.5%, VGE = 10V PULSE DURATION = 250s 10 0 0 2 4 6 8 10 ICE , COLLECTOR TO EMITTER CURRENT (A) ICE , COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 180 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s 160 140 120 100 TC = 150oC 80 60 TC = 25oC 40 20 0 0 FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE 6 8 10 2.5 RG = 25, L = 1mH, VCE = 480V 2.5 TJ = 25oC, TJ = 150oC, VGE = 10V 2.0 1.5 1.0 0.5 TJ = 25oC, TJ = 150oC, VGE = 15V 0 5 10 20 15 25 EOFF, TURN-OFF ENERGY LOSS (mJ) EON , TURN-ON ENERGY LOSS (mJ) 4 FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE 3.0 RG = 25, L = 1mH, VCE = 480V 2.0 1.5 TJ = 150oC; VGE = 10V OR 15V 1.0 0.5 TJ = 25oC; VGE = 10V OR 15V 0 30 5 ICE , COLLECTOR TO EMITTER CURRENT (A) 55 10 15 20 25 30 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 150 RG = 25, L = 1mH, VCE = 480V RG = 25, L = 1mH, VCE = 480V 50 125 T = 25oC, T = 150oC, V J J GE = 10V trI , RISE TIME (ns) tdI , TURN-ON DELAY TIME (ns) 2 VCE , COLLECTOR TO EMITTER VOLTAGE (V) VCE , COLLECTOR TO EMITTER VOLTAGE (V) 45 40 TJ = 25oC, TJ = 150oC, VGE = 10V 35 TJ = 25oC, TJ = 150oC, VGE = 15V 30 100 75 50 25 25 20 TC = -55oC TJ = 25oC and TJ = 150oC, VGE = 15V 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT (c)2001 Fairchild Semiconductor Corporation 30 0 5 10 15 20 25 30 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Typical Performance Curves 140 RG = 25, L = 1mH, VCE = 480V 275 130 250 120 225 tfI , FALL TIME (ns) td(OFF)I , TURN-OFF DELAY TIME (ns) 300 Unless Otherwise Specified (Continued) TJ = 150oC, VGE = 10V, VGE = 15V 200 TJ = 25oC, VGE = 10V, VGE = 15V 175 110 90 80 125 70 5 10 15 20 25 TJ = 150oC, VGE = 10V, VGE = 15V 100 150 100 RG = 25, L = 1mH, VCE = 480V TJ = 25oC, VGE = 10V OR 15V 60 30 5 10 ICE , COLLECTOR TO EMITTER CURRENT (A) 15 TC = -55oC DUTY CYCLE < 0.5%, VCE = 10V 160 PULSE DURATION = 250s TC = 25oC 140 120 100 TC = 150oC 80 60 40 20 0 5 6 7 8 9 11 10 12 13 30 25 14 Ig (REF) = 1mA, RL = 25, TC = 25oC 12 VCE = 600V 9 6 VCE = 200V VCE = 400V 3 0 4 20 FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT VGE , GATE TO EMITTER VOLTAGE (V) ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT 180 15 ICE , COLLECTOR TO EMITTER CURRENT (A) 15 0 5 10 15 20 25 30 35 40 45 50 Qg , GATE CHARGE (nC) VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 13. TRANSFER CHARACTERISTIC FIGURE 14. GATE CHARGE WAVEFORM 2.5 FREQUENCY = 1MHz CIES C, CAPACITANCE (nF) 2.0 1.5 1.0 COES 0.5 CRES 0 0 5 10 15 20 25 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE (c)2001 Fairchild Semiconductor Corporation HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS ZJC , NORMALIZED THERMAL RESPONSE Typical Performance Curves Unless Otherwise Specified (Continued) 100 0.5 0.2 0.1 10-1 t1 0.05 PD 0.02 t2 0.01 DUTY FACTOR, D = t1 / t2 PEAK TJ = PD x ZJC x RJC + TC SINGLE PULSE 10-2 -5 10 10-4 10-3 10-2 10-1 100 101 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 16. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE 35 TC = 25oC, dIEC/dt = 200A/s 30 tr , RECOVERY TIMES (ns) IEC , FORWARD CURRENT (A) 50 40 25oC 30 100oC 20 150oC 10 0 trr 25 ta 20 15 tb 10 5 0 0 0.5 1.0 1.5 2.0 2.5 VEC , FORWARD VOLTAGE (V) FIGURE 17. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP (c)2001 Fairchild Semiconductor Corporation 3.0 0 5 10 15 20 IEC , FORWARD CURRENT (A) FIGURE 18. RECOVERY TIMES vs FORWARD CURRENT HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Test Circuit and Waveform HGTP12N60B3D 90% 10% VGE EON EOFF L = 1mH VCE RG = 25 90% + - ICE VDD = 480V 10% td(OFF)I tfI trI td(ON)I FIGURE 19. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 20. SWITCHING TEST WAVEFORM Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gate insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2 ; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBDTM LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM . Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. (c)2001 Fairchild Semiconductor Corporation fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 20. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM . td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RJC . The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON and EOFF are defined in the switching waveforms shown in Figure 20. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF ; i.e., the collector current equals zero (ICE = 0). HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS TO-220AB (Alternate Version) 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A E OP INCHES A1 Q H1 TERM. 4 D L1 b1 c 1 2 3 e e1 J1 MAX MILLIMETERS MIN MAX NOTES A 0.170 0.180 4.32 4.57 - 0.048 0.052 1.22 1.32 2, 4 b 0.030 0.034 0.77 0.86 2, 4 b1 0.045 0.055 1.15 1.39 2, 4 c 0.018 0.022 0.46 0.55 2, 4 D 0.590 0.610 14.99 15.49 - E 0.395 0.405 10.04 10.28 e1 60o MIN A1 e b L SYMBOL 0.100 TYP 0.200 BSC H1 0.235 0.255 J1 0.095 0.105 L 0.530 0.550 - 2.54 TYP 5 5.08 BSC 5 5.97 6.47 - 2.42 2.66 6 13.47 13.97 - L1 0.110 0.130 2.80 3.30 3 OP 0.149 0.153 3.79 3.88 - Q 0.105 0.115 2.66 2.92 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Dimension (without solder). 3. Solder finish uncontrolled in this area. 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 3 dated 7-97. (c)2001 Fairchild Semiconductor Corporation HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E A INCHES A1 H1 MIN MAX MIN MAX A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 4, 5 TERM. 4 D L2 L1 L 1 3 b e c TERM. 4 0.450 (11.43) L3 0.350 (8.89) b2 0.700 (17.78) 3 0.150 (3.81) 1 b 0.030 0.034 0.77 0.86 4, 5 0.045 0.055 1.15 1.39 4, 5 b2 0.310 - 7.88 - 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 e1 J1 e1 0.080 TYP (2.03) 0.062 TYP (1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS 1.5mm DIA. HOLE NOTES b1 e b1 MILLIMETERS SYMBOL 0.100 TYP 0.200 BSC - 2.54 TYP 7 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 - J1 0.095 0.105 2.42 2.66 - L 0.175 0.195 4.45 4.95 - L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 - 8.01 - 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 10 dated 5-99. 4.0mm USER DIRECTION OF FEED 2.0mm TO-263AB 1.75mm C L 24mm TAPE AND REEL 24mm 16mm COVER TAPE 40mm MIN. ACCESS HOLE 30.4mm 13mm 330mm 100mm GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. (c)2001 Fairchild Semiconductor Corporation 24.4mm HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS TO-247 3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE A E INCHES TERM. 4 OS OP MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.180 0.190 4.58 4.82 - b 0.046 0.051 1.17 1.29 2, 3 Q OR D L1 b1 b2 c 0.070 1.53 1.77 1, 2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 D 0.800 0.820 20.32 20.82 - E 0.605 0.625 15.37 15.87 e1 b 3 2 0.060 e L 1 b1 b2 3 J1 e e1 2 1 BACK VIEW 0.219 TYP 0.438 BSC - 5.56 TYP 4 11.12 BSC 4 J1 0.090 0.105 2.29 2.66 5 L 0.620 0.640 15.75 16.25 - L1 0.145 0.155 3.69 3.93 1 OP 0.138 0.144 3.51 3.65 - Q 0.210 0.220 5.34 5.58 - LEAD 1 - GATE OR 0.195 0.205 4.96 5.20 - LEAD 2 - COLLECTOR OS 0.260 0.270 6.61 6.85 - LEAD 3 - EMITTER TERM. 4 - COLLECTOR NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. (c)2001 Fairchild Semiconductor Corporation HGTG12N60B3D, HGTP12N60B3D, HGT1S12N60B3DS Rev. A1 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM SMART STARTTM VCXTM OPTOLOGICTM FAST(R) BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnsignaTM FACTTM FACT QuietSerieTM FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench(R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER(R) STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET(R) STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. (c)2001 Fairchild Semiconductor Corporation Rev. H4