User's Guide SBAU230A - August 2014 - Revised December 2014 ADS8688EVM-PDK Evaluation Module ADS8688EVM-PDK This user's guide describes the operation and use of the ADS8688 evaluation module (EVM). The ADS8688 is an 8-channel integrated data acquisition system based on a 16-bit successive approximation (SAR) analog-to-digital converter (ADC). Each input channel on the device can support true bipolar input ranges of 10.24 V, 5.12 V, and 2.56 V, as well as unipolar input ranges of 0 V to 10.24 V and 0 V to 5.12 V. The input range selection is done by software programming the device internal registers and is independent for each channel. The device offers a 1-M, constant resistive input impedance irrespective of the selected input range This user's guide covers circuit description, schematic diagram, and bill of materials for the ADS8688EVM circuit board. Table 1 lists the related documents that are available through the Texas Instruments web site at www.ti.com. Table 1. Related Documentation Device Literature Number ADS8688 SBAS582 OPA376 SBOS406 OPA2209 SBOS426 OPA320 SBOS513 REG71055 SBAS221 TPA7A4901 SBVS121 TPS54060 SLVS919 TPS7A3001 SBVS125 SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 1 www.ti.com 1 2 3 4 5 6 7 Contents ADS8688EVM-PDK Overview ............................................................................................. 4 EVM Analog Interface ....................................................................................................... 5 2.1 Connecting Negative Inputs to Ground .......................................................................... 6 2.2 Using Onboard, Second-Order, Butterworth, Low-Pass Filters ............................................... 7 2.3 Selecting the Reference Mode for the ADS8688EVM ......................................................... 7 Digital Interface .............................................................................................................. 8 3.1 Serial Interface (SPI) ............................................................................................... 8 3.2 I2C Bus for the Onboard EEPROM ............................................................................... 8 3.3 SD Card .............................................................................................................. 8 Power Supplies .............................................................................................................. 9 ADS8688EVM-PDK Initial Setup ......................................................................................... 11 5.1 Default Jumper Settings .......................................................................................... 11 5.2 Software Installation .............................................................................................. 12 ADS8688EVM-PDK Kit Operation ....................................................................................... 18 6.1 About the Simple Capture Card ................................................................................. 18 6.2 Loading the ADS8688EVM GUI ................................................................................. 18 6.3 Configuring the ADS8688EVM .................................................................................. 19 6.4 Capturing the Data ................................................................................................ 22 6.5 Analyzing the Data ................................................................................................ 26 6.6 Phase Compensation ............................................................................................. 28 6.7 ADS8688EVM GUI Simulation Mode ........................................................................... 30 Bill of Materials, Schematics, and Layout ............................................................................... 31 7.1 Bill of Materials .................................................................................................... 31 7.2 Board Layouts ..................................................................................................... 34 List of Figures 1 ADS8688EVM Analog Input Connections for Channels AIN0, AIN1, AIN2, and AIN3 ............................. 5 2 ADS8688EVM Analog Input Connections for Channels AIN4, AIN5, AIN6, and AIN7 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 2 ............................ 5 Power-Supply Connections Diagram .................................................................................... 10 ADS8688EVM Default Jumper Settings ................................................................................. 11 Bottom View of the Simple Capture card with the microSD Memory Card Installed .............................. 13 Bottom View of the ADS8688EVM Board with the microSD Memory Card Installed ............................. 13 Connecting the ADS8688EVM Board to the Simple Capture Card .................................................. 14 LED Indicators on the Simple Capture Card............................................................................ 14 Destination Directory Screen ............................................................................................. 15 License Agreement Screen ............................................................................................... 15 Start Installation Screen ................................................................................................... 16 Progress Bar Screen ....................................................................................................... 16 Windows 7 Driver Installation Warning .................................................................................. 16 Installation Wizard Screen ................................................................................................ 17 Simple Capture Card Device Driver Completion ....................................................................... 17 Start Page of the ADS8688EVM GUI.................................................................................... 19 System Block Diagram View .............................................................................................. 20 Selecting the Input Range for the Channels ............................................................................ 20 Register Map View ......................................................................................................... 21 ADS8688EVM Jumper Settings .......................................................................................... 22 Manual Mode Data Capture .............................................................................................. 23 Data Capture in Auto Mode with Single Graph View .................................................................. 24 Data Capture in Auto Mode with Multi Graph View .................................................................... 25 Saving the Captured Data................................................................................................. 26 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated www.ti.com 25 Histogram Analysis ......................................................................................................... 27 26 FFT Analysis ................................................................................................................ 28 27 Phase Compensation Analysis ........................................................................................... 29 28 Simulation Mode ............................................................................................................ 30 29 ADS8688EVM PCB: Top Layer (L1) ..................................................................................... 34 30 ADS8688EVM PCB: Ground Layer (L2) ................................................................................ 35 31 ADS8688EVM PCB: Analog Power Layer (L3) 32 ADS8688EVM PCB: Digital Power Layer (L4) 33 34 ........................................................................ ......................................................................... ADS8688EVM PCB: Ground Layer (L5) ................................................................................ ADS8688EVM PCB: Bottom Layer (L6) ................................................................................. 36 37 38 39 List of Tables 1 Related Documentation ..................................................................................................... 1 2 J7: Analog Interface Connections 3 Connecting Negative Analog Inputs to Ground .......................................................................... 6 4 Using Onboard, Second-Order, Butterworth, Low-Pass Filters ........................................................ 7 5 Bypassing the Onboard, Second-Order, Butterworth, Low-Pass Filters.............................................. 7 6 Selecting the Reference for the ADS8688EVM .......................................................................... 7 7 External Reference Connections .......................................................................................... 7 8 Connector J19 Pin Out ...................................................................................................... 8 9 Jumper Settings for Generating HVDD and HVSS Using an Onboard Switching Regulator ...................... 9 10 Jumper Settings for Generating HVDD and HVSS from External High-Voltage Supplies ......................... 9 11 Power-Supply Connections ................................................................................................. 9 12 Default Jumper Configuration............................................................................................. 12 13 ADS8688EVM Bill of Materials ......................................................................................... .......................................................................................... SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 6 31 3 ADS8688EVM-PDK Overview 1 www.ti.com ADS8688EVM-PDK Overview The ADS8688EVM-PDK is a platform for evaluating the ADS8688 device. The ADS8688EVM-PDK consists of an ADS8688EVM board and a Simple Capture card. The Simple Capture card is an FPGAbased controller card that functions as an serial peripheral interface (SPITM) host and transfers data to the ADS8688EVM graphical user interface (GUI) via a USB interface. The ADS8688EVM GUI collects, analyzes, and records data from the ADS8688EVM board. The ADS8688EVM GUI is capable of collecting data from the ADS8688EVM in auto and manual modes, configuring the ADC program registers, and performing FFT analysis of data captured from the ADC. ADS8688EVM Features * Includes support circuitry as a design example to match ADC performance. * 3.3-V slave SPI. * Serial interface header for easy connection to the Simple Capture card. * Designed for a 5-V analog supply. * Integrated 4.096-V voltage reference. * Bipolar (10.24 V, 5,12 V, 2.56 V ) or unipolar (0 V to 10.24 V, 0 V to 5.12 V) input ranges for each channel. * Onboard, second-order, Butterworth, low-pass filters for four channels. * Onboard regulator for generating a 15-V bipolar supply for second-order, Butterworth, low-pass filters. * Capable of accepting a 100-mV signal on the negative analog inputs (AIN_xGND). ADS8688EVM GUI Features: * Captures data from the ADS8688EVM in auto and manual modes. * Configures the ADS8688 device program registers. * Enables and disables channels in auto mode. * FFT analysis and calculates the SNR, THD, and SINAD ac performance parameters. * Single and multiple graph views for captured data. * Includes a dc histogram for dc inputs. * Logs ADC data. Windows is a registered trademark of Microsoft Corporation. SPI is a trademark of Motorola. Samtec is a trademark of Samtec Inc. All other trademarks are the property of their respective owners. 4 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated EVM Analog Interface www.ti.com 2 EVM Analog Interface The ADS8688EVM is designed for easy interfacing to analog sources. The SamtecTM connector provides a convenient 10-pin, dual-row, header at J7. Figure 1 and Figure 2 show the ADS8688EVM analog input connections for channels AIN0 to AIN3 and channels AIN4 to AIN7, respectively. Table 2 lists the analog interface connections for J7. 2nd Order Butterworth Low Pass Filter ADS8688 Ax- J7 3.57k 2.2nF 6.65k OPA2209 + Ax+ J25,J31, J30,J15 1nF Optional 357 J8,J9, J10,J11 AIN_xP 10 0 357 10 nF AIN_xGND Bypass Path Figure 1. ADS8688EVM Analog Input Connections for Channels AIN0, AIN1, AIN2, and AIN3 Ax- J7 ADS8688 Ax+ Optional 357 AIN_xP 357 10 nF AIN_xGND Figure 2. ADS8688EVM Analog Input Connections for Channels AIN4, AIN5, AIN6, and AIN7 SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 5 EVM Analog Interface www.ti.com Table 2 summarizes the J7 analog interface connector. Table 2. J7: Analog Interface Connections Pin Number Signal J7.2 A6+ Positive analog input for channel AIN6 J7.4 A7+ Positive analog input for channel AIN7 J7.6 A0+ Positive analog input for channel AIN0 J7.8 A1+ Positive analog input for channel AIN1 J7.10 AUX+ Positive analog input for AUX channel J7.12 A2+ Positive analog input for channel AIN2 J7.14 A3+ Positive analog input for channel AIN3 J7.16 A4+ Positive analog input for channel AIN4 J7.18 A5+ Positive analog input for channel AIN5 J7.20 GND Analog ground connection J7.1 A6- Negative analog input for channel AIN6 J7.3 A7- Negative analog input for channel AIN7 J7.5 A0- Negative analog input for channel AIN0 J7.7 A1- Negative analog input for channel AIN1 J7.9 2.1 Description AUX- Connected to analog ground J7.11 A2- Negative analog input for channel AIN2 J7.13 A3- Negative analog input for channel AIN3 J7.15 A4- Negative analog input for channel AIN4 J7.17 A5- Negative analog input for channel AIN5 J7.19 GND Analog ground connection Connecting Negative Inputs to Ground The negative analog inputs for all channels (except for the AUX channel) are capable of accepting a 100mV signal. The negative analog inputs can either be connected to the analog ground or a 100-mV signal can be applied on these inputs. Table 3 describes the appropriate jumper settings for connecting these inputs to analog ground. Table 3. Connecting Negative Analog Inputs to Ground 6 Signal Jumper Position for Connecting to Analog Ground Position for Applying a 100-mV Signal A0- J22 Closed Open A1- J16 Closed Open A2- J26 Closed Open A3- J27 Closed Open A4- J28 Closed Open A5- J29 Closed Open A6- J24 Closed Open A7- J23 Closed Open AUX- NA Always connected to GND NA ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated EVM Analog Interface www.ti.com 2.2 Using Onboard, Second-Order, Butterworth, Low-Pass Filters The ADS8688EVM includes second-order, Butterworth, low-pass filters with a cutoff frequency of 22 kHz for channels AIN0, AIN1, AIN2, and AIN3. There is also a provision to bypass these filters. See Figure 1 for an analog input circuit for channels AIN0, AIN1, AIN2, and AIN3. Table 4 lists the jumper settings for using onboard, second-order, Butterworth, low-pass filters and Table 5 lists the jumper settings for bypassing these filters. Table 4. Using Onboard, Second-Order, Butterworth, Low-Pass Filters Channel Jumper Position Jumper Position AIN0 J25 Closed J8 Closed between pins 1 and 2 AIN1 J31 Closed J10 Closed between pins 1 and 2 AIN2 J30 Closed J11 Closed between pins 2 and 3 AIN3 J15 Closed J9 Closed between pins 2 and 3 Table 5. Bypassing the Onboard, Second-Order, Butterworth, Low-Pass Filters 2.3 Channel Jumper Position Jumper Position AIN0 J25 AIN1 J31 Open J8 Closed between pins 2 and 3 Open J10 AIN2 Closed between pins 2 and 3 J30 Open J11 Closed between pins 1 and 2 AIN3 J15 Open J9 Closed between pins 1 and 2 Selecting the Reference Mode for the ADS8688EVM The ADS8688EVM can either operate on an internal or external reference. Table 6 lists the jumper settings for selecting the reference. Table 7 describes the connections for the external reference. Table 6. Selecting the Reference for the ADS8688EVM Jumper Position for Using Internal Reference Position for Using External Reference J2 Closed Open Table 7. External Reference Connections Pin Number Signal Description J5.1 REFIN Input for external reference J5.2 GND Analog ground connection SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 7 Digital Interface 3 www.ti.com Digital Interface Connector J19 (Samtec part number ERF8-025-01-L-D-RZ-L-TR socket strip connector) provides the digital I/O connections between the ADS8688EVM board and the Simple Capture card. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. Table 8 summarizes the pin outs for connector J19. Table 8. Connector J19 Pin Out Pin Number 3.1 Signal Description J19.1 DAISY J19.4 EVM_PRESENT Daisy input for the ADC J19.5 REFSEL Reference selection input for the ADC J19.6 RST/PD Reset or power-down input for the ADC J19.8 A J19.11 EVM_ID_SDA I2C data for the onboard EEPROM J19.12 EVM_ID_SCL I2C clock for the onboard EEPROM J19.13 3V3_SDCC 3.3-V digital supply from the Simple Capture card J19.14 5V_SDCC Unregulated 5-V supply from the Simple Capture card J19.33, J19.34 SCLK EVM present, active low (connected to GND) No connection Clock input for the ADC J19.35 CS Chip-select input for the ADC J19.38 SDI Data input for the ADC J19.39 SDO Data output from the ADC J19.45-49 EVMSDxxxxx J19.2, J19.10, J19.16, J19.50 GND Digital connections for the onboard SD card Ground connections Serial Interface (SPI) The ADS8688 device uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) with clock speeds up to 17 MHz. The ADS8868xEVM offers 49.9- resistors between the SPI signals and J19 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal edges can cause overshoot; these 49.9- resistors slow down the signal edges in order to minimize signal overshoot. 3.2 I2C Bus for the Onboard EEPROM The ADS8688EVM has an I2C bus that records the board name and assembly date to communicate with the onboard EEPROM. The bus is not used in any form by the ADS8688 converter. 3.3 SD Card The ADS8688EVM has an SD card that contains the software files for the Simple Capture card. The contents of the SD card must not be deleted or altered. 8 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Power Supplies www.ti.com 4 Power Supplies The ADS8688EVM can be powered from the Simple Capture card if onboard buffers for active low-pass filters are not being used and the onboard regulator (U9) for generating high-voltage supplies (HVDD and HVSS) is disabled by closing jumper J17. The HVDD and HVSS supplies are only required for buffers U4 and U5. CAUTION Do not open jumper J17 if the ADS8688EVM must be powered only from the Simple Capture card and an external 5-V supply is not provided on J32. High-voltage supplies (HVDD and HVSS) for buffers U4 and U5 can be generated using the onboard regulator (U9) if an external 5-V dc supply is provided on J32. The external 5-V dc supply must be at least 200 mV above the unregulated 5-V supply of the Simple Capture card. The external 5-V dc supply must be capable of providing at least 500 mA of current. Table 9 provides jumper settings for generating HVDD and HVSS using the onboard switching regulator U9. Table 9. Jumper Settings for Generating HVDD and HVSS Using an Onboard Switching Regulator Jumper Position for Using an Onboard Switching Regulator J12 Closed between pins 1 and 2 J14 Closed between pins 1 and 2 J17 Open HVDD and HVSS for buffers U4 and U5 can also be generated by providing external high-voltage supplies on J18, as shown in Table 10. Table 11 and Figure 3 illustrate the power-supply connections for external supplies. Table 10. Jumper Settings for Generating HVDD and HVSS from External High-Voltage Supplies Jumper Position for Generating HVDD and HVSS from External Voltage Supplies J12 Closed between pins 2 and 3 J14 Closed between pins 2 and 3 J17 Closed Table 11. Power-Supply Connections Voltage Supply Signal Voltage Range Pin Number Note External 5 V EXT_5V 5 V to 5.5 V J32.2 Required only for generating HVDD and HVSS using the onboard switching regulator -- GND GND J32.1 -- External HVDD EXT_HVDD 16 V to 25 V J18.3 Required only for generating HVDD and HVSS from external high-voltage supplies External HVSS EXT_HVSS -16 V to -25 V J18.1 Required only for generating HVDD and HVSS from external high-voltage supplies -- GND GND J18.2 -- SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 9 Power Supplies www.ti.com Jumper for Selecting Source for HVSS Jumper for Selecting Source for HVDD Jumper for Disabling Onboard regulator for HVDD and HVSS External GND HVSS External HVDD GND External 5V Figure 3. Power-Supply Connections Diagram The AVDD analog supply for the ADS8688 is generated by converting an unregulated 5-V supply from the Simple Capture card or by converting an external 5-V supply to a regulated 5-V supply by using the REG71055 charge pump and the TPS7A4901 linear regulator. The DVDD digital supply for the ADC is derived from a 3.3-V supply from the Simple Capture card. 10 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Initial Setup www.ti.com 5 ADS8688EVM-PDK Initial Setup This section presents the steps required to setup the ADS8688EVM-PDK kit before operation. 5.1 Default Jumper Settings Figure 4 details the default jumper settings. Table 12 provides the configuration for these jumpers. Figure 4. ADS8688EVM Default Jumper Settings SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 11 ADS8688EVM-PDK Initial Setup www.ti.com Table 12. Default Jumper Configuration 5.2 Jumper Default Position J2 Closed J3 Open J4 Closed J5 Open J6 Open J8 Closed between pins 2 and 3 J9 Closed between pins 1 and 2 J10 Closed between pins 2 and 3 J11 Closed between pins 1 and 2 J12 Closed between pins 1 and 2 J13 Closed between pins 2 and 3 J14 Closed between pins 1 and 2 J15 Open J16 Closed J17 Closed J21 Closed J22 Closed J23 Closed J24 Closed J25 Open J26 Closed J27 Closed J28 Closed J29 Closed J30 Open J31 Open Software Installation This section presents the steps required to the install the software. NOTE: Ensure the microSD memory card included in the kit is installed in the microSD socket (P6) on the back of the Simple Capture card before connecting the EVM to the computer. Otherwise, as a result of improper boot up, Windows(R) cannot recognize the ADS8688EVMPDK as a connected device. Complete the following steps to install the software: 1. Verify the microSD memory cards are installed on the Simple Capture card and the ADS8688EVM board. 2. Verify jumpers are in the factory-default position and properly connect the hardware. 3. Install the ADS8688EVM-PDK software. 4. Complete the Simple Capture card device driver installation. Each task is described in the following subsections. 12 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Initial Setup www.ti.com 5.2.1 Verify the microSD Memory Card is Installed on the Simple Capture card The ADS8688EVM-PDK includes microSD memory cards that contain the EVM software and Simple Capture card firmware required for the EVM operation. NOTE: Ensure the microSD memory cards that contain the software are installed in the microSD socket on the back of the Simple Capture card and on the back of ADS8688EVM board. Figure 5 and Figure 6 show the bottom view of the Simple Capture card and ADS8688EVM, respectively, with the microSD card installed. Figure 5. Bottom View of the Simple Capture card with the microSD Memory Card Installed Figure 6. Bottom View of the ADS8688EVM Board with the microSD Memory Card Installed SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 13 ADS8688EVM-PDK Initial Setup www.ti.com The microSD memory cards are formatted at the factory with the necessary firmware files for the Simple Capture card to boot properly. In addition to the Simple Capture card firmware files (application and MLO files), the microSD memory cards contain the ADS8688EVM-PDK software installation files. 5.2.2 Verify Jumpers are in the Factory-Default Position and Connect the Hardware The ADS8688EVM-PDK includes both the ADS8688EVM and the Simple Capture card; however, the devices are shipped unconnected. Follow these steps to verify that the ADS8688EVM-PDK kit is configured and connected properly. 1. Verify the microSD card is installed on the back of the Simple Capture card ; see Figure 5. 2. Verify the microSD card is installed on the back of the ADS8688EVM; see Figure 6. 3. Verify the ADS8688EVM jumpers are configured as illustrated in Figure 4. 4. Connect the ADS8688EVM board to the Simple Capture card as Figure 7 illustrates. Figure 7. Connecting the ADS8688EVM Board to the Simple Capture Card 5. Connect the Simple Capture card to the computer through the micro USB cable. 6. Verify that the LED D5 power-good indicator is illuminated. Wait approximately ten seconds and verify that diode D2 blinks, indicating that USB communication with the host computer is functioning properly. Figure 8 shows the location of the LED indicators in the Simple Capture card . Figure 8. LED Indicators on the Simple Capture Card 14 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Initial Setup www.ti.com 5.2.3 Install the ADS8688EVM-PDK Software The ADS8688EVM software must be installed on the computer. This software supports the ADS688EVMPDK. The user must have administrator privileges to install the EVM software. The following steps list the directions to install the software. 1. Open the Windows explorer and locate the microSD memory card labeled ADS8688EVM in the browser as a removable storage device. 2. Navigate to the ...\ADS868xEVMGUI\Version x.x\Volume\ folder. 3. Run the installer by double-clicking the setup.exe file. This action installs the EVM GUI software and the required and Simple Capture card device driver components. 4. After the installer begins, a welcome screen displays. Click Next to continue. 5. A prompt appears with the destination directory; select the default directory under: ...\Program Files(x86)\Texas Instruments\ADS8684_8 EVM GUI\ as shown in Figure 9 and Figure 10. Figure 9. Destination Directory Screen Figure 10. License Agreement Screen 6. One or more software license agreements appear. Select the I Accept the License Agreement radial button and click Next. SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 15 ADS8688EVM-PDK Initial Setup www.ti.com 7. The Start Installation screen appears, as shown in Figure 11. Click Next. Figure 11. Start Installation Screen 8. A progress bar appears, as shown in Figure 12; this step takes a few minutes. Figure 12. Progress Bar Screen 9. The progress bar is followed by an installation complete notice. 5.2.4 Complete the Simple Capture Card Device Driver Installation During installation of the Simple Capture card device driver, a prompt may appear with the Windows security message shown in Figure 13. Select Install this driver software anyway to install the driver required for proper operation of the software. The drivers contained within the installers are safe for installation to your system. Figure 13. Windows 7 Driver Installation Warning 16 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Initial Setup www.ti.com NOTE: Driver installation prompts do not appear if the Simple Capture card device driver is already installed on your system. The following steps describe how to install the Simple Capture card device driver. 1. Immediately after the ADS8688 EVM software installation is complete, prompts appear to install the Simple Capture card device driver, as shown in Figure 14 and Figure 15. 2. A computer restart may be required to finish the software installation. If prompted, restart the computer to complete the installation. Figure 14. Installation Wizard Screen Figure 15. Simple Capture Card Device Driver Completion SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 17 ADS8688EVM-PDK Kit Operation 6 www.ti.com ADS8688EVM-PDK Kit Operation This section describes how to use the ADS8688EVM-PDK and ADS8688EVM GUI to configure the EVM and acquire data. 6.1 About the Simple Capture Card The Simple Capture card provides the USB interface between the computer and the ADS8688EVM. The controller board is designed around the AM335x processor, a USB 2.0, high-speed capability, 32-bit, ARM core. The Simple Capture card incorporates an onboard FPGA subsystem and 256MB of onboard DDR SRAM memory. The Simple Capture card is not sold as a development board, and is not available separately. TI cannot offer support for the Simple Capture card except as part of this EVM kit. 6.2 Loading the ADS8688EVM GUI The ADS8688EVM GUI provides control over the settings of the ADS8688. Adjust the ADS8688EVM settings when the EVM is not acquiring data. During acquisition, all controls are disabled and settings cannot be changed. When you change a setting on the ADS8688EVM GUI, the setting immediately updates on the board. Settings on the ADS8688EVM correspond to settings described in the ADS8688 product data sheet (available for download at www.ti.com); see the product data sheet for details. To load the ADS8688EVM GUI, follow these steps. Step 1. Make sure the PDK kit is configured and powered up as explained in Section 5.2.2. Step 2. Start the ADS8688EVM GUI. Go to StartAll ProgramsTexas InstrumentsADS8684_8 EVM GUI and click ADS8684_8 EVM GUI to run the software. Step 3. Verify that the software detects the ADS8688EVM. The GUI identifies the EVM that is connected to the controller and loads the settings. After the settings are loaded, the ADS8688EVM GUI is displayed on the top of GUI window; see Figure 16. Step 4. Verify that the Simulate Connection box is un-checked on the top right corner and connected is displayed on bottom edge of GUI window. 18 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Kit Operation www.ti.com Figure 16. Start Page of the ADS8688EVM GUI 6.3 6.3.1 Configuring the ADS8688EVM System Block Diagram View The ADS8688 channels can be configured by the system block diagram view in the GUI. The system block diagram can be activated by clicking on the Program Register button on the left side of the GUI window. A channel can be powered down by checking the AINx_PD box. if a channel is powered down, that channel turns grey in system block view. The voltage range for each channel can be selected from a drop-down menu corresponding to each channel in the system block diagram view; see Figure 17. Figure 18 displays the window for selecting the input voltage ranges. SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 19 ADS8688EVM-PDK Kit Operation www.ti.com Figure 17. System Block Diagram View Figure 18. Selecting the Input Range for the Channels 20 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Kit Operation www.ti.com 6.3.2 Register Map View All registers can be read or written by the register map view in the GUI. The register map view can be activated by clicking on the Register Map View button in the system block diagram view, as shown in Figure 17. The register map table provides a complete list of program registers present in the ADS8688 device. The user must provide data in hexadecimal for writing registers. The user also must select the register in the register map, provide data in the Write Data box, and click the Write Register button to write the register. For reading a register, the user must select the register in the register map and click the Read Register button. All registers can be read by clicking the Read All button. The values for all registers can be saved in a configuration file (.cfg) by the Save Config button. The saved configuration can be loaded back by using the Load Config button. Changes made in the register map view are reflected in the system block view and vice-versa. For details on the ADS8688 program registers, refer to the program register map in the ADS8688 data sheet. Figure 19 shows the register map view. Figure 19. Register Map View SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 21 ADS8688EVM-PDK Kit Operation 6.3.3 www.ti.com Jumper Settings for the ADS8688EVM The ADS8688EVM settings button on the left side of GUI window describes the jumper settings on the ADS8688EVM. The Reset and REFSEL jumpers are monitored by the GUI. If the reset jumper (J3) is open, the GUI switches to the Reset Program mode in the start page of the GUI. For details on different jumper settings, refer to Section 2 and Section 4. Figure 20 shows the ADS8688EVM GUI window for the jumper settings. Figure 20. ADS8688EVM Jumper Settings 6.4 Capturing the Data Data can be captured from ADS8688EVM either in manual mode or in auto mode. Manual mode captures data from one of the device channels whereas auto mode captures data from the channels that are powered up and selected in the auto channel sequence. The Section 6.4.1 and Section 6.4.2 sections provide the details for manual and auto mode, respectively. 22 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Kit Operation www.ti.com 6.4.1 Manual Mode Manual mode can be activated by clicking on the Manual Channel N button on the left side of the GUI window and by selecting Data Capture from the drop-down menu, as shown in Figure 21. In manual mode, data are captured for the channel selected by the Channel Name drop-down menu. The sampling rate and number of samples for the data capture can be entered in the ADC Capture Settings box. The ADS8688EVM GUI supports a sampling rate from 20 kSPS to 500 kSPS. The sampling rate is adjusted to the closest value obtained from Equation 1. Sampling Rate (kSPS) = 17000 / [34 + K] where * 0 K 816, and K is an integer. (1) The GUI supports a capture of 1024 samples to 8388608 samples. For sampling rates less than 100 kSPS, the maximum number of samples are limited to 131072 per capture. The number of samples are adjusted to the closest power of 2. The data captured are displayed in a graph in the GUI window. Figure 21. Manual Mode Data Capture SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 23 ADS8688EVM-PDK Kit Operation 6.4.2 www.ti.com Auto Mode Auto mode can be activated by clicking on the Auto with Reset Mode button and selecting Data Capture from the drop-down menu. In auto mode, data are captured sequentially for the channel selected in the auto channel sequence. The channels can be enabled or disabled by the check boxes corresponding to the channels. In auto mode, the sampling rate entered is an aggregate of the sampling rate for all channels enabled in the auto channel sequence. The effective sampling rate for a channel is the sampling rate for the device divided by the number of channels enabled. The sampling rate for the device must be entered in the ADC Capture Settings. Also in auto mode, the sampling rate follows the calculation of Equation 1. The number of samples to be captured per channel must be entered in the ADC Capture Settings box. The number of samples per channel value is adjusted to the closest power of 2 by the GUI. The GUI supports a maximum capture of 8388608 samples per capture. The maximum number of samples per channel that can be captured in auto mode is determined by Equation 2. (Number of Samples per Channel) x (Number of Channels Enabled) 8388608 (2) Data captured in auto mode can be viewed in single graph view or in multi graph view. In single graph view, data for an individual channel are displayed in a single graph. The channel for a single graph can be selected from the channel drop-down menu. In multi graph view, data for all enabled channels are displayed in multi graph view. Figure 22 and Figure 23 illustrate the data captured in auto mode. Figure 22. Data Capture in Auto Mode with Single Graph View 24 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Kit Operation www.ti.com Figure 23. Data Capture in Auto Mode with Multi Graph View SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 25 ADS8688EVM-PDK Kit Operation 6.4.3 www.ti.com Saving the Captured Data The data captured from the EVM can be stored in a .csv file by clicking the Log Data To File button, as shown in Figure 24. A window appears for selecting the location and entering the name of the file for saving the captured data. Figure 24. Saving the Captured Data 6.5 Analyzing the Data The ADS8688EVM GUI includes the histogram analysis and FFT analysis for data captured from the ADS8688EVM in auto or manual mode. Data can be analyzed with the Selected Analysis from the dropdown menu in the ADC capture settings. 26 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Kit Operation www.ti.com 6.5.1 Histogram Analysis Histogram testing is commonly used when testing ADCs. A histogram is merely a count of the number of times a code occurs in a particular data set. The Histogram Analysis page of the GUI creates a histogram of the data of the acquired data set and displays that data. The input channel (AINx) for the histogram analysis can be selected from the channel drop-down menu and the data capture settings can be entered in boxes on the left side of the graph. Figure 25 shows the histogram analysis page. Figure 25. Histogram Analysis The following parameters are calculated using the histogram analysis. * Code Spread: Is the number of different codes captured for a certain input. * Code Peak: Is the code with the maximum number of hits. * Sigma: Is the standard deviation of all the codes captured. * Mean: Is the average of all the codes captured for a certain input. 6.5.2 FFT Analysis The FFT Analysis page in the GUI performs the fast fourier transform (FFT) of the captured data and displays the resulting frequency domain plots. This page also calculates key ADC dynamic performance parameters, such as signal-to-noise ratio (SNR), total harmonic distortion (THD), signal-to-noise and distortion ratio (SINAD), and spurious-free dynamic range (SFDR). Figure 26 illustrates the FFT performance analysis display. The input channel (AINx) for FFT analysis can be selected from the channel drop-down menu and the data capture settings can be entered in boxes on the left side of the graph. The FFT calculated parameters are shown on the bottom side of the graph. SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 27 ADS8688EVM-PDK Kit Operation www.ti.com Figure 26. FFT Analysis Input signal frequency for FFT analysis: * Coherent Fi: Is the desired input signal frequency calculated by the GUI for maintaining coherency. * Actual Fi: Is the actual signal frequency provided by the analog source to the ADS8688. The user sets the input signal frequency close to the coherent Fi and enters the set value of the input signal frequency in the Actual Fi box. The GUI uses a 7-term Blackman-Harris window to minimize spectral leakage. 6.6 Phase Compensation The ADS8688EVM GUI includes an analysis page for compensating for the phase of signals captured in auto mode. When the signals on different channels are sampled in auto mode, a deterministic phase difference between signals is introduced resulting from the time difference between sampling instants. The phase difference is dependent on sampling rate, input signal frequency, number of channels, and initial phase difference. The phase compensation analysis page compensates for the introduced phase difference and provides the results after phase compensation. For details on phase compensation, refer to the TIPD167 Verified Reference Design, Phase Compensated 8-CH Multiplexed Data Acquisition System for Power Automation (TIDU427). The phase compensation analysis page can be activated from the Smart App menu. Figure 27 displays the phase compensation analysis page. 28 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Kit Operation www.ti.com Figure 27. Phase Compensation Analysis SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 29 ADS8688EVM-PDK Kit Operation 6.7 www.ti.com ADS8688EVM GUI Simulation Mode The ADS8688EVM GUI can be run in simulation mode by clicking on the Simulate Connection check-box on the top right side of the GUI window. In simulation mode, the GUI does not connect to the ADS8688EVM board and only displays the results for one set of captured data stored in the computer. Figure 28 shows the ADS8688EVM GUI running in simulation mode. Figure 28. Simulation Mode 30 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Bill of Materials, Schematics, and Layout www.ti.com 7 Bill of Materials, Schematics, and Layout Schematics for the ADS8688EVM are appended to this user's guide. The bill of materials is provided in Table 13. Section 7.2 shows the PCB layouts for the ADS8688EVM. 7.1 Bill of Materials NOTE: All components are compliant with the European Union Restriction on Use of Hazardous Substances (RoHS) Directive. Some part numbers may be either leaded or RoHS. Verify that purchased components are RoHS-compliant. (For more information about TI's position on RoHS compliance, see www.ti.com.) Table 13. ADS8688EVM Bill of Materials Item No. Qty Ref Des 1 1 !PCB 2 4 3 4 Description Vendor Part Number Printed Circuit Board Any PRJ_Number C1-C3, C6 CAP, CERM, 0.1uF, 25V, +/-5%, X7R, 0603 AVX 06033C104JAT2A 1 C10 CAP, CERM, 1uF, 16V, +/-10%, X5R, 0603 1 C11 CAP, CERM, 3000pF, 50V, +/-5%, C0G/NP0, 0603 5 6 C16, C24, C26, C30, C45, C64 CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0603 AVX 06035C104KAT2A 6 4 C17, C22, C27, C28 CAP, CERM, 2200pF, 50V, +/-5%, C0G/NP0, 0603 TDK C1608C0G1H222J 7 4 C23, C25, C29, C31 CAP, CERM, 1000pF, 50V, +/-5%, C0G/NP0, 0402 MuRata GRM1555C1H102JA01D 8 4 C32, C35, C49, C50 CAP, CERM, 22uF, 25V, +/-10%, X7R, 1210 MuRata GRM32ER71E226KE15L 9 3 C34, C36, C53 CAP, CERM, 10uF, 25V, +/-10%, X7R, 1206 MuRata GRM31CR71E106KA12L 10 2 C37, C54 CAP, CERM, 10uF, 35V, +/-10%, X7R, 1206 Taiyo Yuden GMK316AB7106KL 11 15 C4, C12-C15, C18-C21, C38-C41, C56, C58 TDK C1608C0G1H103J080AA 12 1 C42 CAP, CERM, 0.22uF, 16V, +/-10%, X7R, 0603 TDK C1608X7R1C224K 13 2 C44, C46 CAP, CERM, 2.2uF, 10V, +/-10%, X7R, 0603 MuRata GRM188R71A225KE15D 14 1 C48 CAP, CERM, 10uF, 50V, +/-20%, X7R, 2220 TDK C5750X7R1H106M 15 1 C5 CAP, CERM, 10uF, 6.3V, +/-20%, X5R, 0603 Kemet C0603C106M9PACTU 16 1 C51 CAP, CERM, 0.1uF, 25V, +/-5%, X7R, 0603 Kemet C0603C104J3RAC 17 1 C52 CAP, CERM, 0.39uF, 16V, +/-10%, X7R, 0603 MuRata GRM188R71C394KA88D 18 1 C57 CAP, CERM, 470pF, 50V, +/-10%, X7R, 0603 TDK C1608X7R1H471K 19 2 C59, C60 CAP, CERM, 10uF, 35V, +/-10%, X7R, 1210 MuRata GRM32ER7YA106KA12L 20 7 C7, C33, C43, C47, C55, C61, C62 CAP, CERM, 10uF, 10V, +/-10%, X7R, 0805 MuRata GRM21BR71A106KE51L 21 1 C8 CAP, CERM, 22uF, 16V, +/-20%, X7R, 1210 TDK C3225X7R1C226M 22 2 C9, C63 CAP, CERM, 1uF, 16V, +/-10%, X7R, 0603 TDK C1608X7R1C105K 23 2 D2, D4 Diode, Schottky, 60V, 2A, SMA 24 2 D3, D5 25 2 D6, D8 CAP, 10000pF, 0603, 5%, 50V, C0G Kemet C0603C105K4PACTU MuRata GRM1885C1H302JA01D Diodes Inc. B260A-13-F Diode, Zener, 5.6V, 500mW, SOD-123 ON Semiconductor MMSZ4690T1G Diode, Zener, 27V, 500mW, SOD-123 Vishay-Semiconductor MMSZ4711-V SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback ADS8688EVM-PDK Evaluation Module Copyright (c) 2014, Texas Instruments Incorporated 31 Bill of Materials, Schematics, and Layout www.ti.com Table 13. ADS8688EVM Bill of Materials (continued) Item No. Qty Ref Des 26 1 D7 27 2 D9, D10 28 6 FID1-FID6 29 4 30 31 32 Description Diode, Zener, 3.9V, 500mW, SOD-123 Diode, Schottky, 30V, 0.2A, SOT-23 Vendor Part Number ON Semiconductor MMSZ4686T1G Diodes Inc. BAT54C-7-F Fiducial mark. There is nothing to buy or mount. N/A N/A H1-H4 Bumpon, Hex, 0.063mil, 11mm Dia, Lt Brn 3M SJ5202 2 J1, J7 Header, 100mil, 10x2, SMD 1 J18 Terminal Block, 6A, 3.5mm Pitch, 3-Pos, TH 32 1 J19 33 19 J2-J6, J15-J17, J21-J31 34 1 J20 35 2 J32, J33 36 7 J8-J14 37 1 L1 38 8 R1, R79-R85 39 5 R11, R21, R22, R74, R76 40 3 R13, R15, R18 41 1 R19 42 17 R2, R3, R5-R10, R14, R16, R86-R91, R93 43 16 Samtec, Inc. TSM-110-01-T-DV-P On-Shore Technology, Inc. ED555/3DS Receptacle, Micro High Speed Socket Strip, 0.8mm, 25x2, R/A, SMT Samtec, Inc. ERF8-025-01-L-D-RA-L-TR Header, TH, 100mil, 2x1, Gold plated, 230 mil above insulator Samtec, Inc. TSW-102-07-G-S Molex 502570-0893 SD Memory Card Connector Terminal Block, 6A, 3.5mm Pitch, 2-Pos, TH Header, TH, 100mil, 3x1, Gold plated, 230 mil above insulator -- On-Shore Technology, Inc. ED555/2DS Samtec, Inc. TSW-103-07-G-S Wurth Electronics 744870471 RES, 10.0k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW040210K0FKED RES, 10.0Meg ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW040210M0FKED Yageo America RC0603FR-0747KL RES, 100 ohm, 1%, 0.1W, 0603 Vishay-Dale CRCW0603100RFKEA RES, 49.9 ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW040249R9FKED R23-R32, R34, R35, R37, R38, R40, R41 RES, 357 ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW0402357RFKED NI NI Yageo America RC0402JR-070RL R36, R44, R48, R52, R94-R96, R98R100, R102, R103, R107 RES, 47.0k ohm, 1%, 0.1W, 0603 44 13 Resistor, Uninstalled 45 16 46 4 R42, R46, R50, R54 RES, 3.57k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW04023K57FKED 47 4 R43, R45, R51, R53 RES, 6.65k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW04026K65FKED 48 1 R55 RES, 576k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW0402576KFKED 49 2 R56, R71 RES, 232k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW0402232KFKED 50 1 R57 RES, 182k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW0402182KFKED 51 4 R58, R60, R62, R72 RES, 499k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW0402499KFKED 52 2 R59, R73 RES, 20k ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW040220K0JNED 53 1 R63 RES, 33k ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW040233K0JNED 54 2 R64, R75 RES, 82k ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW040282K0JNED 55 1 R65 RES, 15k ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW040215K0JNED 56 1 R66 RES, 1.1k ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW04021K10JNED 57 1 R67 RES, 44.2k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW040244K2FKED 58 1 R68 RES, 412k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW0402412KFKED 59 1 R70 RES, 20.5k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW040220K5FKED R4, R33, R39, R47, R49, R61, R69, R77, RES, 0 ohm, 5%, 0.063W, 0402 R78, R92, R97, R101, R104-R106, R108 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Bill of Materials, Schematics, and Layout www.ti.com Table 13. ADS8688EVM Bill of Materials (continued) Item No. Qty Ref Des 60 1 SD1 61 26 SH-J2-SH-J6, SH-J8-SH-J17, SH-J21SH-J31 62 1 TP11 63 6 TP12-TP17 64 9 TP2-TP10 Description Vendor Part Number SanDisk SDSDQ-002G 3M 969102-0000-DA Test Point, Miniature, Black, TH Keystone 5001 Test Point, Miniature, Red, TH Keystone 5000 Test Point, Miniature, White, TH Keystone 5002 Op Amp, Precision, 20MHz, 0.9pA, Low-Noise, RRIO, CMOS, with Shutdown Texas Instruments OPA320AIDBVR Texas Instruments TPS7A3001DGN SanDisk MicroSD Card, 2GB Shunt, 100mil, Gold plated, Black 65 2 U1, U3 66 1 U10 IC, -3V to -36V, -200mA, Ultralow Noise, High-PSRR LDO Negative Linear Regulator 67 1 U11 IC, 2K, Serial EEPROM Atmel AT24C02B 68 1 U2 16 bit 500KSPS 8 Channel SAR ADC Texas Instruments ADS8688IDBT 69 2 U4, U5 OpAmp, Low Noise, Low Power, 36V Texas Instruments OPA2209AIDGKR IC, VIN 3V to 35V, 150mA, Ultralow Noise, High-PSRR, LDO Regulator Texas Instruments TPS7A4901DGN 70 2 U6, U7 71 1 U8 IC, SWITCHED CAP, BUCK BOOST CONVERTER 1.8V to 5.5V in 65uA Texas Instruments REG71055DDC 72 1 U9 Buck Inverting Buck-Boost Step Down Regulator with 3.5 to 60 V Input and 0.8 to 58 V Output, -40 to 150 degC, 10-Pin MSOP-PowerPAD (DGQ), Green (RoHS & no Sb/Br) Texas Instruments TPS54060DGQ SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback ADS8688EVM-PDK Evaluation Module Copyright (c) 2014, Texas Instruments Incorporated 33 Bill of Materials, Schematics, and Layout 7.2 www.ti.com Board Layouts Figure 29 through Figure 34 show the PCB layouts for the ADS8688EVM. NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid out; these figures are not intended to be used for manufacturing ADS8688EVM PCBs. Figure 29. ADS8688EVM PCB: Top Layer (L1) 34 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Bill of Materials, Schematics, and Layout www.ti.com Figure 30. ADS8688EVM PCB: Ground Layer (L2) SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 35 Bill of Materials, Schematics, and Layout www.ti.com Figure 31. ADS8688EVM PCB: Analog Power Layer (L3) 36 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Bill of Materials, Schematics, and Layout www.ti.com Figure 32. ADS8688EVM PCB: Digital Power Layer (L4) SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 37 Bill of Materials, Schematics, and Layout www.ti.com Figure 33. ADS8688EVM PCB: Ground Layer (L5) 38 ADS8688EVM-PDK Evaluation Module SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Bill of Materials, Schematics, and Layout www.ti.com Figure 34. ADS8688EVM PCB: Bottom Layer (L6) SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated ADS8688EVM-PDK Evaluation Module 39 PIR102 PIR101 COC4 C4 10.0k RST/PD DAISY PIC401 PIC402 PIJ401 PIJ402 1 2 PIJ301 PIJ302 1 2 PIJ201 PIJ20 1 2 REFSEL 0.01uF AVDD COC2 C2 PIC201 COSH0J4 SH-J4 COSH0J5 SH-J5 COSH0J6 SH-J6 COSH0J8 SH-J8 COSH0J9 SH-J9 PIC601 PIC602 COSH0J10 SH-J10 COSH0J11 SH-J11 COSH0J12 SH-J12 PIR1901 PIR1902 1 PIU101 COU1 U1 4 OPA320AIDBVR V+ V- 100 PIR801 3 PIU103 PIU102 COC6 C6 0.1F NLA\ A COSH0J3 SH-J3 0.1F PIU104 COR19 R19 2 COSH0J2 SH-J2 PITP10 1 5 NLREFOUT GND PIU105 RefOut COTP10 TP10 REFOUT A GND PIC202 GND Notes 09/16/2013 Initial Release B 12/09/2013 Added RefOut, Aux Buffer Ckts C 03/13/2014 Added SD Card, minor value changes A PIR401 PITP901 COTP9 TP9 NLR\EFS\EL SDI GND NLR\ST\0PD\ NLDAISY PIR501 Date A PIR901 NLSDI NLSCLK NLC\S\ SDO PITP801 COTP8 TP8 COSH0J13 SH-J13 COSH0J14 SH-J14 COSH0J15 SH-J15 COSH0J16 SH-J16 COSH0J17 SH-J17 COSH0J21 SH-J21 COSH0J22 SH-J22 COSH0J23 SH-J23 COSH0J24 SH-J24 COSH0J25 SH-J25 6 Revision History SCLK COJ4 J4 5 A107012CT-ND TSM-110-01-T-DV-P NL3V30LP NLVBUS0LP 3V3_LP PIJ101 1 2 VBUS_LP PIJ102 NLJ103 J1-3 3 4 PIJ103 PIJ104 NLJ105 J1-5 5 6 PIJ105 PIJ106 NLJ107 J1-7 7 8 PIJ107 PIJ108 NLJ109 J1-9 9 10 GND PIJ109 PIJ1010 NLJ1011 J1-11 11 12 PIJ1011 PIJ1012 NLJ1014 13 14 J1-14 PIJ1013 PIJ1014 NLJ1016 15 16 J1-16 PIJ1015 PIJ1016 PIR202 PIR302 NLJ1018 17 18 J1-18 PIJ1017 PIJ1018 COR2 COR3 NLJ1020 R2 R3 PIR702 PIR602 19 20 J1-20 PIJ1019 PIJ1020 COR7 COR6 PIR502 PIR402 49.9 49.9PIR802 R7 R6 COR8 COR5 COR4 COJ1 R5 R4 49.9 49.9 PIR201 PIR301 R8 J1 P I R 9 0 2 P I R 7 0 1 PIR601 49.9 49.9 0 PITP201 COR9 R9 COTP2 TP2 PITP301 49.9 COTP3 PITP501 PITP401 PITP701 PITP601 TP3 COTP5 COTP4 COTP7 COTP6 TP5 TP4 TP7 TP6 CS COJ3 J3 4 DAISY COJ2 J2 3 COR1 R1 REFSEL 2 RST/PD 1 AVDD COJ5 J5 COC3 C3 V+ V- 3 PIU303 PIR1 02 PIU302 COR11 R11 10.0Meg 2 PIC301 PIC302 0.1F B PIR1 01 COR13 R13 COU3 GND U3 OPA320AIDBVR COR10 1 PIR1001R10 PIU301 PIR1002 PIC1 01 49.9 COC11 C11 PIC1 02 3000pF COR14 R14 PIR1401 PIR1301 GND 47.0k COR15 R15 PIR1501 1 2 PIR1502 47.0k COR18 R18 PIR1801 NLREFIN REFIN AVDD PIR1402 49.9 GND REFOUT RST/PD PIU202 DAISY PIU203 PIR1802 1 RSTZ/PDZ 35 NC PIU2035 9 10 PIU2010 11 PIU2011 NLA60 A6+ PIR2301 PIR2302 COR23 R23 357 NLA70 A7+ PIR2701 PIR3902 COC22 C22 2200pF PIR4401 PIR3901 6PIU406 PIR4402 NI GND 1000pF PIR4502 PIR4601 PIR7601 PIR3701 COJ10 J10 COR29 R29 PIR2901 PIR3102 COR34 R34 PIR3401 PIR3702 PIR2902 14 PIC1401 PIU2014 AIN_7P COC14 C14 15 PIC1402 0.01uF PIU2015 AIN_7GND 357 PIR3402 357 357 NLA10 3 A1+ PIJ1003 NLA10 A1- 2 PIJ1002 1 PIJ1001 COR40 R40 PIR4001 AUX_GND PIR2502 357 PIR4002 357 12 PIU2012 AIN_6P COC12 C12 0.01uF PIU2013 13 AIN_6GND PIC1901 PIC1902 PIC20 1 PIC20 2 COC19 C19 16 PIU2016 AIN_0P 0.01uF 17 PIU2017 AIN_0GND 18 PIC501 SDO PIC502 COC5 C5 10F PIC2602 AGND 26 AIN_5GND PIU2026 AIN_1GND PIC1301 PIC1302 PIC1501 24 PIC1502 AIN_4GND PIU2024 23 AIN_3P PIU2023 PIC1801 22 AIN_3GND PIU2022 PIC1802 PIC2101 PIC2102 AIN2_GND GND COR24 R24 PIR2401 COC13 C13 COR26 R26 NLA50 0.01uF PIR2601 PIR2602 A5COR28 R28 357 PIR2801 COC15 C15 COR30 R30 0.01uF PIR3001 NLA40 PIR3002A4COR32 R32 PIR3201 357 COC18 C18 0.01uF COC21 C21 0.01uF COR35 R35 357 NLA30 A3COR38 R38 PIR3801 COR41 R41 NLA20 A2- PIR3501 PIR4101 PIR3502 PIR4102 PIR2402 NLA50 A5+ 357 V+ V- PIU5033 PIU504 COC30 C30 PIC3002 NLA40 A4+ 357 PIR2802 COJ9 J9 GND COR47 R47 0 COR48 R48 COU5A U5A PIR4701 PIR4801 PIU5022 1PIU501 PIC3001 357 A3+ COJ23 J23 PIJ7019 1 PIJ2601 2 PIJ2602 J26 COJ26 1 PIJ2701 2 PIJ2702 1 PIJ2801 2 PIJ2802 J27 COJ27 1 PIJ2901 2 PIJ2902 J28 COJ28 COJ11 J11 357 A2+ 3 PIJ1103 357 PINT102 1 7PIU507 COJ25 J25 A0+ COR52 PIR4901 R52 COC16 C16 PIC1602 PIU5055 PIR5201 PIR3 02 COC17 C17 2200pF COR33 R33 0 COR36 R36 2PIU402 PIR3601 PIR3602 NI 3PIU403 PIU408 PIC3101 PIC3102 PIR2102 PIR5301 PIR3 01 TSM-110-01-T-DV-P COR53 R53 COR21 R21 6.65k GND PIR4302 PIR2 02 R43 COR43 6.65k PIR4301 COR22 R22 PIR2 01 PICCOC23 2C23 301 PIC21000pF 302 PIU401 AUX- Net-Tie This allows the connection of two nets, without compiler errors or a physical component. COC24 C24 PIC2402 CO!PCB 2 A1+ 3.57k PIJ302 PIJ30 1 This design uses SanDisk Micro SD Card, 2GB, p/n SDSDQ-002G COH1 H1 Bumpers to be placed on backside of board COH2 COH3 COH4 H2 H3 H4 NLA20 A2+ J30 COJ30 PIC2401 0.1F GND HVSS GND PIR4201 PCB Number: PRJ_Number PCB Rev: PCB_Rev COR54 R54 PIR5402 GND COSD1 PIU40 PIR4202 COR42 R42 3.57k PIR5302 PIR5401 GND OPA2209AIDGKR 1 V+ V- COC28 C28 2200pF GND PIR210 PIC1601 COU4A U4A PIC2801 PIC2802 PIR5202 NI 0.1F PIC1701 PIC1702 PIJ7020 COFID1 FID1 COFID2 FID2 COFID3 FID3 COFID4 FID4 COFID5 FID5 COFID6 FID6 PIU506 OPA2209AIDGKR COC31 C31 1000pF HVDD SJ5202 SJ5202 SJ5202 SJ5202 Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application. 1 2 PIJ3102 PIJ3101 1 COR49 R49 0 COU5B U5B GND PINT101 C TSW-103-07-G-S PIJ2501 2 PIJ2502 COTP11 TP11 GND COJ15 J15 1 PIJ1101 2 PIJ1102 PIR4902 PITP1 01 NT1 CONT1 NLA30 A3+ PIJ1502 PIJ1501 TSW-103-07-G-S PIR3802 GND J29 COJ29 D PIR50 1 COR50 R50 3.57k 6 A6+ A7+ A0+ A1+ AUX+ A2+ A3+ A4+ A5+ GND 2 1 ANALOG INPUTS A107012CT-ND COJ24 COJ7 J24 J7 A61 2 PIJ701 PIJ702 A7- PIJ703 3 4 PIJ704 A0- PIJ705 5 6 PIJ706 A17 8 PIJ707 PIJ708 NLAUX0 AUX9 10 PIJ709 PIJ7010 A211 12 PIJ7011 PIJ7012 A313 14 PIJ7013 PIJ7014 A4- PIJ7015 15 16 PIJ7016 A5- PIJ7017 17 18 PIJ7018 19 20 PIR5101 PIR50 2 2 PIJ902 1 PIJ901 10.0Meg COJ22 J22 PIR4602 GND 8 2 1 PIJ2401 PIJ2402 4 COJ16 J16 2 1 PIJ2301 PIJ2302 GND COC29 R51 COR51 C29 6.65k ADS8688DBT 10.0Meg 2 1 PIJ2201 PIJ2202 PIR5102 0.1F HVSS COR46 R46 3.57k 2 1 PIJ1601 PIJ1602 PIR4802 NI PIC2901 PIR7402 COR74 R74PIC2902 PIR7401 3 PIJ903 PIR3202 PIC2701 COC27 C27 PIC2702 2200pF PIR4702 PIU508 OPA2209AIDGKR 25 AIN_4P PIU2025 20 PIU2020 PIC2601 0.1F GND 1F 28 PIU2028 27 AIN_5P PIU2027 B HVDD COC26 C26 32 PIU2032 21 AIN_2P PIU2021 PIU2018 AIN_1P COC20 C20 0.01uF 19 PIU2019 34 DVDD PIU2034 29 AGND PIU2029 AUX_IN PIC1201 PIC1202 357 NLA00 A0- COR37 R37 COC25 PIC25C25 01 OPA2209AIDGKR PIR7602 R76 PIC2502 COR76 COR45 R45 6.65k C COJ8 J8 7 PIU407 5PIU405 PIR4501 NLA60 A6- COR25 R25 PIR2501 NLA70 A7COR31 R31 PIR3101 2 PIJ802 1 PIJ801 COU4B U4B 0 COR44 R44 NLA00 A0+ 3 PIJ803 COR39 R39 10.0Meg PIC2 01 PIC2 02 COR27 R27 PIR2702 357 PIJ210 PIJ2102 NLSDO GND 31 AGND PIU2031 COC63 AVDD C63 30 GND PIC6301 PIC6302 AVDD PIU2030 PIU209 AVDD GND PIR1602 49.9 DVDD 33 DGND PIU2033 AGND 8 PIU208 AGND GND 37SCLK SCLK PIU2037 36COR16 R16 SDO PIU2036 PIR1601 DAISY 4 PIU204 REFSELZ 5 PIU205 REFIO COJ6 J6 COJ21 J21 38CS CS~ PIU2038 SDI PIC801 PIC901 6 COC8 COC9 PIU206 REFGND C8 C9 PIC802 22F PIC902 1F PIU207 7 REFCAP GND PIJ602 2 3 REFSEL 47.0k PIC10 2 COC10 C10 PIC10 1 1F GND PIJ601 PIR1302 PIU201 2 1 5 NLAUX0 AUX+ 1 REFIN PIJ501 2 PIJ502 ADS8688DBT 0.1F 4 PIU304 COU2 U2 SDI 10.0Meg PIU305 DVDD COC7 C7 10F 1000pF PIC701 PIC702 COC1 C1 PIC101 PIC102 8 COSH0J30 SH-J30 COSH0J31 SH-J31 4 COSH0J29 SH-J29 1 2 COSH0J26 SH-J26 COSH0J27 SH-J27 COSH0J28 SH-J28 COJ31 J31 3 4 5 DRAFTSMAN: B McKay DESIGNER: B McKay CHECKER: Lokesh Ghulyani ENGINEER: Lokesh Ghulyani APPROVED: B McKay RELEASED: B McKay DATE: 3/13/2014 DATE: 3/13/2014 DATE: 3/13/2014 DATE: 3/13/2014 DATE: 3/13/2014 DATE: 3/13/2014 T (c) Texas Instruments 2014 I D http://www.ti.com TITLE: SCHEMATIC, EVM, ADS8688 SCALE N B SIZE 6573934 6 C SHEET REV 1 1 PIU603 182k NC 4PIU604 GND COC40 SS/NR PIC40 1 5 EN PIU605 PIC40 2 PIU6066 PIU609 COR62 R62 9 COR77 R77 PIR6201 499k 2 PIR6302 REG710NA-XXX GND HVDD PIL104COL1 4 2 NL5V0SDCC PIR105015V_SDCC L1 744870471 GND PIC4601 PIC4602 COC46 C46 2.2F PIC4701 PIC4702 COC47 C47 10F COR65 R65 PIR6501 PID301 PIR6502 PIC4801 PIC4802 PID302 COD3 D3 MMSZ4690T1G 5.6V PIC5102 PIC5101 COC51 C51 0.1F 5V 2 PIU902 COC48 C48 PIU903 3 EN 10F 4 PIU904 SS/TR COC45 C45 1 BOOT PIU901 PIC4502 PIC4501 7 VSENSE PIU907 6 PWRGD PIU906 5 PIU905 RT/CLK 11 PP PIU9011 COR68 8 R68 9 PIU908 COMP GND PIU909 412k PIR6801 TPS54060DGQ PIR6802 PIL10 0.1F 10 PH PIU9010 VIN PIR6 02 P18V PIR6701 PIR6702 44.2k COR66 R66 COR67 R67 PIR6 01 PID401 PID402 1.1k PIR5602 PIL103 PIC4901 PIC4902 COD4 D4 B260A-13-F 60V PIC50 1 PIC50 2 COC49 C49 22F PIR5902 N18V PIC3902 PIR7001 20.5k PIC5201 PITP1COTP17 701 TP17 PIR10602 PID701 1 0 PIC610 ED555/2DS NL3V30SDCC COR78 3V3_SDCC PIR7801 R78 0 COR108 R108 NL3V30LP 3V3_LP GND PIR10801 PIR7802 PIC6102 COC61 C61 10F PIR10802 PID702 COD7 D7 MMSZ4686T1G 3.9V 1 PIJ1801 2 PID602 PID801 445-1454-6-ND PIC60 2 PIC60 1 82k COR64 R64 COU10 U10 COTP15 TP15PITP1501 1PIU1001 COR71 R71 PIC5301 PIC5202 PIC5302 PIR7102 COC53 C53 10F 232k COC56 C56 PIC5601 PIC5702 TPS7A3001DGN PIU10088 PIC5401 PIR7101 PIC5602 0.01uF PIR7302 2PIU1002 COR73 R73 3 TPS7A30XXDGN COR72 R72 499k PIC5402 10F PIR7201 6 PIU1003 PIU1006 PIR7301 4PIU1004 PIU1005 20k 5 PIC5801 COC58 PIC5802 9 COD6 D6 PIR7202 COC54 C54 PIU10077 B PIR7501 PIR7502 82k COR75 R75 1 COC59 C59 10F PIR6402 GND MMSZ4711-V 27V 1 PIR10601 2 2 PIJ3302 1 PIJ3301 3 PIJ1803 2 PIJ1802 COR60 R60 499k PIR60 1 PIR6401 PIU10 9 PID601 COC60 C60 10F PID802 2 DVDD COR106 R106 ED555/3DS COJ18 J18 COJ33 J33 PIC5902 PIC5901 PIR60 2 NLEXT0HVSS EXT_HVSS 470pF 445-1454-6-ND A COC37 C37 10F GND 0.39F COC57 C57 PIC5701 PIC3701 COC41 PIC3702 SS/NR PIC410 5 EN PIU705 PIC4102 PIU7066 EXT_HVDD B PG TPS7A49XXDGN TSW-103-07-G-S COJ14 J14 1 PIJ1401 2 PIJ1402 3 PIJ1403 COC52 C52 COR70 R70 PIR7002 PIU7077 SNS/FB PIU709 HVSS COJ17 J17 PIU7088 2PIU702 COR59 3 R59 PIU703 NC 20k PIR5901 4PIU704 GND COC50 C50 22F GND 1 PIJ1701 COU7 TPS7A4901DGN U7 1PIU701 OUT IN PIR5601 0.01uF 2 PIJ1702 PIR7702 0 PITP1TP13 3COTP13 01 COR56 R56 PIC3601 COC36 C36 COC39 PIC3602 10F 232k C39 PIC3501 COC35 C35 PIC322F 502 PIC3901 COU9 U9 GND PIR7701 PIL102 0 15k AVDD COR105 R105 PIR10502 PIC3201 COC32 C32 PIC3202 22F B260A-13-F 60V PITP1401 499k GND PITP1601 0 COD10 D10 BAT54C-7-F 30V PID10 1 GND TSW-103-07-G-S COU8 U8 COC42 5V5 C42 COTP14 REG71055DDC TP14 1PIU801 6 VOUT CPM+PIU806 PIC4201 PIC4202 PIC4301 PIC4 01 COC43 COC44 C43 C44 2PIU802 0.22F PIU8055 GND VIN PIC4302 10F PIC4 02 2.2F PIR6301 COR63 R63 3PIU803 4 ENA CPM- PIU804 33k COR58 R58 PIR5801 PIR6202 TPS7A49XXDGN COTP16 TP16 PID10 2 3 PID1003 TSW-103-07-G-S COJ12 J12 1 PIJ1201 2 PIJ1202 3 PIJ1203 NLEXT0HVDD EXT_HVDD P18V PID202 PID201 9 COR57 R573 PID903 NLVBUS0LP VBUS_LP PIR6102 3 PIR5702 7 PG PIU607 SNS/FB C40 PIC3802 0.01uF 2PIU602 COD5 D5 MMSZ4690T1G 5.6V PIR6101 1 PIC3401 COC34 C34 PIC3402 10F PIR5802 0.01uF PIC3801 PIR5701 PID502 COD2 D2 COR61 R61 BAT54C-7-F 30V 1 8 IN PIU608 OUT 1 PID901 PIJ1301 PIR5501 PWPD PIR5502 1 2 PIJ1302 3 PIJ1303 2 PID902 1 1PIU601 COR55 R55 PIC3 01 COC33 C33 COC38 PIC3 02 10F 576k C38 COC55 C55 10F COJ13 J13 HVDD TPS7A4901DGN PID501 2 COU6 U6 5V A PIC5 01 PIC5 02 ED555/2DS COTP12 TP12 5V NLEXT05V EXT_5V PIR6902 0 1 1 PIJ3201 3 COR69 2 PIR6901 R69 PIJ3202 6 C41 COD9 D9 COJ32 J32 PITP1201 5 0.01uF 4 0.01uF C58 3 PWPD 2 2 1 EXT_HVSS GND COD8 D8 MMSZ4711-V 27V GND 0 DVDD DVDD C EVMSDDATA3 EVMSDDATA1 EVMSDCLK SDO COR92 R92 PIR9201 PIR9202 CS SCLK COR90 R90 PIR9001 COR93 R93 PIR9301 PIR9002 49.9 PIR9302 SCLK COR99 R99 PIR9901 PIR9902 SDI R100 COR100 PIR10001 PIR10002 0 49.9 NI NI 3V3_SDCC EVM_ID_SDA NLR\E\F\S\E\L\ REFSEL COR91 R91 PIR9101 PIR9102 DAISY COR89 R89 NLDAISY PIR8901 PIR8902 49.9 49.9 COJ19 J19 49 PIJ19049 47 PIJ19047 45 PIJ19045 43 PIJ19043 41 PIJ19041 39 PIJ19039 37 PIJ19037 35 PIJ19035 33 PIJ19033 31 PIJ19031 29 PIJ19029 27 PIJ19027 25 PIJ19025 23 PIJ19023 21 PIJ19021 19 PIJ19019 17 PIJ19017 15 PIJ19015 13 PIJ19013 11 PIJ19011 9 PIJ1909 7 PIJ1907 5 PIJ1905 3 PIJ1903 1 PIJ1901 50 PIJ19050 48 PIJ19048 46 PIJ19046 44 PIJ19044 42 PIJ19042 40 PIJ19040 38 PIJ19038 36 PIJ19036 34 PIJ19034 32 PIJ19032 30 PIJ19030 28 PIJ19028 26 PIJ19026 24 PIJ19024 22 PIJ19022 20 PIJ19020 18 PIJ19018 16 PIJ19016 14 PIJ19014 12 PIJ19012 10 PIJ19010 8 PIJ1908 6 PIJ1906 4 PIJ1904 2 PIJ1902 COR94 R94 PIR9401 EVMSDDATA2 EVMSDDATA0 EVMSDCMD COR98 NLSDO R98 SDO PIR9801 PIR9802 NI COR88 NLSDI R88 SDI PIR8801 PIR8802 49.9 COR101 NLSCLK R101 SCLK PIR10101 PIR10102 COR103 NLC\S\ R103 0 CS PIR10301 PIR10302 COR107 R107 NI SCLK PIR10701 PIR10702 NI PIR9402 NI PIR7902 PIR80 2 PIR8102 PIR8202 PIR8302 PIR8402 PIR7901 PIR80 1 PIR8101 PIR8201 PIR8301 PIR8401 COR95 R95 PIR9501 PIR9502 NLEVM0ID0SCL 6PIU1106 EVM_ID_SCL SCL 3 A2 PIU1103 COR96 R96 PIR9602 7PIU1107 WP 2 A1 PIU1102 8PIU1108 VCC 1 A0 PIU1101 PIR9601 PIC6401 PIC6402 AT24C02C-SSHM-B-ND COU11 U11 NLEVM0ID0SDA 5PIU1105 EVM_ID_SDA 4 SDA GND PIU1104 COC64 C64 0.1F NI NI PIR10401 AT24C02B COR104 R104 0 COR102 R102 PIR10201 PIR10402 PIR8502 COR79 COR80 COR81 R82 COR82 COR83 COR84 R79 R80 R81 R83 R84 10.0k 10.0k 10.0k 10.0k 10.0k 10.0k COR97 R97 0 PIR9701 PIJ2001 NLEVMSDDATA3 EVMSDDATA3 PIJ2002 NLEVMSDCMD EVMSDCMD PIR9702 COC62 C62 10F PIR10202 NLEVMSDCLK EVMSDCLK NI GND 2 3 PIJ2003 DATA2 CD PIJ2009 Shell PIJ2000 PIR8501 CD/DATA3 CDM 4 PIJ2004 VDD PIC6202 PIC6201 GND 1 C COR85 R85 10.0k COJ20 J20 NLEVMSDDATA2 EVMSDDATA2 5 PIJ2005 CLOCK 6 PIJ2006 VSS EVMSDDATA0 NLEVMSDDATA0 GND NLEVMSDDATA1 EVMSDDATA1 5V_SDCC EVM_ID_SCL 7 PIJ2007 DATA0 8 PIJ2008 DATA1 502570-0893 GND GND R86 COR86 PIR8601 COR87 R87 PIR8701 NLA\A PIR8602 49.9 49.9 PIR8702 RST/PD NLR\S\T\0P\D\ ERF8-025-01-L-D-RA-L-TR D D GND T SCALE N 1 2 3 4 5 (c) Texas Instruments 2014 I B SIZE http://www.ti.com 6573934 6 C SHEET REV 2 2 Revision History www.ti.com Revision History Changes from Original (August 2014) to A Revision ..................................................................................................... Page * Changed all instances of "SDCC Controller board" to "Simple Capture card" throughout this document ..................... 1 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 40 Revision History SBAU230A - August 2014 - Revised December 2014 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an "EVM" or "EVMs") to the User ("User") in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions. 1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM ("Software") shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software 1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system. 2 Limited Warranty and Related Remedies/Disclaimers: 2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement. 2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as mandated by government requirements. TI does not test all parameters of each EVM. 2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period. 3 Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter. 3.1.2 For EVMs annotated as FCC - FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant: CAUTION This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: * * * * Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. 3.2 Canada 3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 Concerning EVMs Including Radio Transmitters: This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concernant les EVMs avec appareils radio: Le present appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisee aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioelectrique subi, meme si le brouillage est susceptible d'en compromettre le fonctionnement. Concerning EVMs Including Detachable Antennas: Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Concernant les EVMs avec antennes detachables Conformement a la reglementation d'Industrie Canada, le present emetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inferieur) approuve pour l'emetteur par Industrie Canada. Dans le but de reduire les risques de brouillage radioelectrique a l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnee equivalente (p.i.r.e.) ne depasse pas l'intensite necessaire a l'etablissement d'une communication satisfaisante. Le present emetteur radio a ete approuve par Industrie Canada pour fonctionner avec les types d'antenne enumeres dans le manuel d'usage et ayant un gain admissible maximal et l'impedance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est superieur au gain maximal indique, sont strictement interdits pour l'exploitation de l'emetteur 3.3 Japan 3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 3.3.2 Notice for Users of EVMs Considered "Radio Frequency Products" in Japan: EVMs entering Japan are NOT certified by TI as conforming to Technical Regulations of Radio Law of Japan. If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs: 1. 2. 3. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry's Rule for Enforcement of Radio Law of Japan, Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan. SPACER SPACER SPACER SPACER SPACER 1. 2. 3. 61118328173 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI's recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees. 4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User's handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements. 5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. SPACER SPACER SPACER SPACER SPACER SPACER SPACER 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. 6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF THE EVM. 7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. 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