SLUS362A - FEBRUARY 1997 - REVISED NOVEMBER 2000 D Complies With SPI-2 and SPI-3 Standards D 2.75-V to 7-V Operation D 1.8-pF Channel Capacitance during D D D D -650-mA Sourcing Current for Termination D +400-mA Sinking Current for Active Negation Drivers D Trimmed Termination Current to 4% D Trimmed Impedance to 7% D Current Limit and Thermal Shutdown Disconnect 0.5-A Supply Current in Disconnect Mode 110-/2.5-k Programmable Termination Completely Meets SCSI Hot Plugging Protection description The UCC5610 provides 18 lines of active termination for a SCSI (small computer systems interface) parallel bus. The SCSI standard recommends active termination at both ends of the cable. The UCC5610 is ideal for high performance 3.3-V SCSI systems. The key features contributing to such low operating voltage are the 0.1-V drop-out regulator and the 2.75-V reference. During disconnect the supply current is typically only 0.5 A, which makes the IC attractive for battery powered systems. The UCC5610 is designed with an ultralow-channel capacitance of 1.8 pF, which eliminates effects on signal integrity from disconnected terminators at interim points on the bus. The UCC5610 can be programmed for either a 110- or 2.5-k termination. The 110- termination is used for standard SCSI bus lengths and the 2.5-k termination is typically used in short bus applications. When driving the TTL compatible DISCNCT pin directly, the 110- termination is connected when the DISCNCT pin is driven low, and disconnected when driven high. When the DISCNCT pin is driven through an impedance between 80 k and 150 k, the 2.5-k termination is connected when the DISCNCT pin is driven low, and disconnected when driven high. block diagram 3 UDG-94128-1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SLUS362A - FEBRUARY 1997 - REVISED NOVEMBER 2000 description (continued) The power amplifier output stage allows the UCC5610 to source full termination current and sink active negation current when all termination lines are actively negated. The UCC5610 is pin for pin compatible with Unitrode's other 18-line SCSI terminators, allowing lower capacitance and lower voltage upgrades to existing systems. The UCC5610, as with all Unitrode terminators, is completely hot-pluggable and appears as high impedance at the terminating channels with VTRMPWR = 0 V or open. Internal circuit trimming is utilized, first to trim the 110- termination impedance to a 7% tolerance, and then most importantly, to trim the output current to a 4% tolerance, which maximizes noise margin. Other features include thermal shutdown and current limit. This device is offered in low thermal resistance versions of the industry standard 28-pin wide body SOIC and 28-pin PLCC. DWP PACKAGE TOP VIEW 28 27 26 25 24 23 22 21 20 19 18 17 16 15 LINE11 LINE10 REG TRMPWR LINE9 LINE8 LINE7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 GND LINE18 LINE17 LINE16 LINE15 LINE14 GND* GND* GND* LINE13 LINE12 LINE11 LINE10 REG LINE12 LINE13 LINE14 LINE15 LINE16 LINE17 LINE18 5 4 3 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 * DWP package pin 28 serves as signal ground; pins 7, 8, 9, 20, 21, 22 serve as heatsink/ground. * QP package pins 12-18 serve as both heatsink and signal ground. AVAILABLE OPTIONS PACKAGED DEVICES{ TJ 0C to 70C SOIC (DWP) PLCC (QP) UCC5610DWP UCC5610QP Available tape and reeled. Add TR suffix to device type to order quantities of 1000 devices per reel. 2 LINE6 LINE5 LINE4 LINE3 LINE2 LINE1 DISCNCT GND* GND* GND* GND* GND* GND* GND* DISCNCT LINE1 LINE2 LINE3 LINE4 LINE5 GND* GND* GND* LINE6 LINE7 LINE8 LINE9 TRMPWR QP PACKAGE TOP VIEW POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SLUS362A - FEBRUARY 1997 - REVISED NOVEMBER 2000 absolute maximum ratings over operating free-air temperature (unless otherwise noted)} Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V Regulator output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self-regulating Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65Cto 150C Operating temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to 150C Lead temperature (soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Interface Products Data Book (TI Literature Number SLUD002) for thermal limitations and considerations of packages. recommended operating conditions Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.75 V to 5.25 V Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 5 V Disconnect input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to Termpwr electrical characteristics, these specifications apply for TA = 0C to 70C, TRMPWR = 3.3 V, DISCNCT = 0 V, RDISCNCT = 0 , TA = TJ, (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Supply Current Section Termpwr supply current Power down mode All termination lines = open 1 2 mA All termination lines = 0.2 V 415 455 mA DISCNCT = termpwr 0.5 5 A 110 117.7 Output Section (110 - Terminator Lines) Terminator impedance See Note 4 Output high voltage See Note 1 Max output current 102.3 VLINE = 0.2 V, VLINE = 0.2 V TJ = 25C VLINE = 0.2 V, See Note 1 TRMPWR = 3 V, VLINE = 0.2 V, VLINE = 0.5 V TRMPWR = 3 V, 2.5 2.7 3.0 -25.4 -23 -22.1 mA V -25.4 -23 -21 mA TJ = 25C -25.4 -23 -20.2 mA See Note 1 -25.4 -23 -19 mA -22.4 mA Output leakage DISCNCT = 2.4 V, TRMPWR = 0 V to 5.25 V 10 400 nA Output capacitance DISCNCT = 2.4 V, See Note 2, DWP package 1.8 2.5 pF See Note 3, Output Section (2.5 k - Terminator Lines) (RDISCNCT = 80 k) Terminator impedance 2 2.5 3 k 2.5 2.7 3.0 V -1.4 -1 -0.7 mA -1.5 -1 -0.6 mA DISCNCT = 2.4 V, TRMPWR = 0 to 5.25 V 10 400 nA DISCNCT = 2.4 V DWP package 1.8 2.5 pF Output high voltage TRMPWR = 3 V, See Note 1 Max output current VLINE = 0.2 V VLINE = 0.2 V, TRMPWR = 3 V, Output leakage Output capacitance NOTES: 1. 2. 3. 4. See Note 2, See Note 1 See Note 3, Measuring each termination line while other 17 are low (0.2 V). Ensured by design. Not production tested. Output capacitance is measured at 0.5 V. Tested by measuring IOUT with VOUT = 0.2 V and VOUT = VREG - 0.1 V then calculating the impedance. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SLUS362A - FEBRUARY 1997 - REVISED NOVEMBER 2000 electrical characteristics, these specifications apply for TA = 0C to 70C, TRMPWR = 3.3 V, DISCNCT = 0 V, RDISCNCT = 0 , TA = TJ, (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Regulator Section Regulator output voltage 5.25 V > TRMPWR > 3 V 2.5 2.7 3.0 V Drop out voltage All termination lines = 0.2 V Short circuit current Sinking current capability VREG = 0 V VREG = 3 V 0.1 0.2 -800 -650 -450 mA Thermal shutdown See Note 2 200 400 170 800 mA C Thermal shutdown hysteresis See Note 2 10 C V Disconnect Section Disconnect threshold RDISCNCT = 0 & 80 k Input current DISCNCT = 0 V 0.8 1.5 2.0 V 30 50 A NOTES: 2. Ensured by design. Not production tested. APPLICATION INFORMATION UDG-94130 Figure 1. Typical SCSI Bus Configurations Utilizing a UCC5610 Device 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 8-Mar-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) UCC5610DWP NRND SOIC DW 28 TBD Call TI Call TI UCC5610DWPG4 NRND SOIC DW 28 TBD Call TI Call TI UCC5610DWPTR NRND SOIC DW 28 TBD Call TI Call TI UCC5610DWPTRG4 NRND SOIC DW 28 TBD Call TI Call TI UCC5610QP NRND PLCC FN 28 TBD Call TI Call TI UCC5610QPTR NRND PLCC FN 28 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPLC004A - OCTOBER 1994 FN (S-PQCC-J**) PLASTIC J-LEADED CHIP CARRIER 20 PIN SHOWN Seating Plane 0.004 (0,10) 0.180 (4,57) MAX 0.120 (3,05) 0.090 (2,29) D D1 0.020 (0,51) MIN 3 1 19 0.032 (0,81) 0.026 (0,66) 4 E 18 D2 / E2 E1 D2 / E2 8 14 0.021 (0,53) 0.013 (0,33) 0.007 (0,18) M 0.050 (1,27) 9 13 0.008 (0,20) NOM D/E D2 / E2 D1 / E1 NO. OF PINS ** MIN MAX MIN MAX MIN MAX 20 0.385 (9,78) 0.395 (10,03) 0.350 (8,89) 0.356 (9,04) 0.141 (3,58) 0.169 (4,29) 28 0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58) 0.191 (4,85) 0.219 (5,56) 44 0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66) 0.291 (7,39) 0.319 (8,10) 52 0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20) 0.341 (8,66) 0.369 (9,37) 68 0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91) 84 1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45) 4040005 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. 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