ZXGD3111N7
Document Number DS38273 Rev. 4 - 2
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ZXGD3111N7
200V ACTIVE OR'ING MOSFET CONTROLLER IN SO-7
Description
The ZXGD3111N7 is a 200V Active OR’ing MOSFET Controller
designed for driving a very low RDS(ON) Power MOSFET as an ideal
diode. This replaces the standard rectifier to reduce the forward
voltage drop and overall increase the power transfer efficiency.
The ZXGD3111N7 can be used on both high-side and low-side power
supply units (PSU) with rails up to ±200V. It enables very low RDS(ON)
MOSFETs to operate as ideal diodes as the turn-off threshold is
only -3mV with ±2mV tolerance. In the typical 48V configuration, the
standby power consumption is <50mW as the low quiescent supply
current is <1mA. During PSU fault condition, the OR’ing Controller
detects the power reduction and rapidly turns off the MOSFET in
<600ns to block reverse current flow and avoid the common bus
voltage dropping.
Applications
Active OR’ing Controller in:
(N+1) Redundant Power Supplies
Telecom and Networking
Data Centers and Servers
Pin Functions
Pin Number
Pin Name
Pin Function and Description
1, 2
GND
Ground
Connect this pin to the MOSFET source terminal and ground reference point.
3
VCC
Power Supply
This supply pin should be closely decoupled to ground with a X7R type capacitor.
4
GATE
Gate Drive
This pin sources (ISOURCE) and sinks (ISINK) current into the MOSFET gate. If VCC > 12V, then the GATE-to-GND
will clamp at 12V. The turn-on time of the MOSFET can be programmed through an external gate resistor (RG).
5, 6
PGND
Power Ground
Connect this pin to the MOSFET source terminal and ground reference point.
7
DRAIN
Drain Sense
Connect this pin to the MOSFET drain terminal to detect the change in drain-source voltage.
Top View
SO-7
ZXGD3112
DRAIN GATE
Vcc
GND
C1
VG
VD
Typical Configuration for
Low-Side -ve Supply Rail
-ve Vout
GND
Power Supply
-ve Rail
GND Rail
VS
PGND
ZXGD3111
Top View
Pin-Out
GND
GND
GND
GND
PGND
GND
GND
VCC
PGND
DRAIN
1
2
3
GATE
5
6
7
4
ZXGD3111N7
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ZXGD3111N7
Ordering Information (Note 4)
Part Number
Marking
Reel Size (inches)
Tape Width (mm)
Quantity per Reel
ZXGD3111N7TC
ZXGD3111
13
12
2,500
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and
Lead-free.
3. Halogen- and Antimony-free "Green‖ products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
4. For packaging details, go to our website at https://www.diodes.com/design/support/packaging/diodes-packaging/.
Marking Information
Absolute Maximum Ratings (Voltage relative to GND, @TA = +25°C, unless otherwise specified.)
Characteristic
Symbol
Value
Unit
Supply Voltage
VCC
25
V
Drain Pin Voltage
VD
-3 to 200
V
Gate Output Voltage
VG
-3 to VCC +3
V
Gate Driver Peak Source Current
ISOURCE
2
A
Gate Driver Peak Sink Current
ISINK
5
A
Thermal Characteristics (@TA = +25°C, unless otherwise specified.)
Characteristic
Symbol
Value
Unit
Power Dissipation
Linear Derating Factor
(Note 5)
PD
490
3.92
mW
mW/°C
(Note 6)
655
5.24
(Note 7)
720
5.76
(Note 8)
785
6.28
Thermal Resistance, Junction to Ambient
(Note 5)
RθJA
255
°C/W
(Note 6)
191
(Note 7)
173
(Note 8)
159
Thermal Resistance, Junction to Lead
(Note 9)
RθJL
135
°C/W
Operating and Storage Temperature Range
TJ, TSTG
-50 to +150
°C
ESD Ratings (Note 10)
Characteristic
Symbol
Value
Unit
JEDEC Class
Electrostatic Discharge – Human Body Model
ESD HBM
2,000
V
2
Electrostatic Discharge – Machine Model
ESD MM
200
V
B
Notes: 5. For a device surface mounted on minimum recommended pad layout FR4 PCB with high coverage of single sided 1oz copper, in still air conditions; the
device is measured when operating in a steady-state condition.
6. Same as Note 5, except Pin 3 (VCC) and pins 5 and 6 (PGND) are both connected to separate 5mm x 5mm 1oz copper heat-sinks.
7. Same as Note 6, except both heat-sinks are 10mm x 10mm.
8. Same as Note 6, except both heat-sinks are 15mm x 15mm.
9. Thermal resistance from junction to solder-point at the end of each lead on pins 2 and 3 (GND) and pins 5 and 6 (VCC).
10. Refer to JEDEC specification JESD22-A114 and JESD22-A11.
ZXGD = Product Type Marking Code, Line 1
3111 = Product Type Marking Code, Line 2
YY = Year (ex: 18 = 2018)
WW = Week (01 to 53)
ZXGD
3111
YY WW
ZXGD3111N7
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ZXGD3111N7
Thermal Derating Curve
020 40 60 80 100 120 140 160
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 15mm x 15mm
5mm x 5mm
Minimum
Layout
Derating Curve
Junction Temperature (OC)
Max Power Dissipation (W)
10mm x 10mm
Electrical Characteristics (@VCC = 12V, TA = +25°C, unless otherwise specified.)
Characteristic
Symbol
Min
Typ
Max
Unit
Test Condition
Input Supply
Operating Supply Voltage
VCC
4
—
20
V
Quiescent Current
IQ
—
200
—
µA
-0.6V ≤ VDRAIN ≤ 200V
Gate Driver
Gate Peak Source Current
ISOURCE
—
0.66
—
A
CL = 47nF
Gate Peak Sink Current
ISINK
—
3.3
—
Gate Peak Source Current (Note 11)
ISOURCE
1
—
—
A
VGATE = 5V and VDRAIN = -1V
Gate Peak Sink Current (Note 11)
ISINK
1.8
—
—
A
VGATE = 5V and VDRAIN = 1V
Detector Under DC Condition
Turn-Off Threshold Voltage
VT
-5
-3
-1
mV
VG ≤1V
Load: 50nF
Capacitor Connected
in Parallel with 50kΩ
Resistor
Gate Output Voltage
VG(OFF)
—
0.1
0.3
V
VDRAIN ≥ 0mV &
VCC = 12V
VG
—
9.2
—
VDRAIN = -8mV &
VCC = 12V
VG(OFF)
—
0.1
0.3
VDRAIN ≥ 0mV &
VCC = 4V
VG
—
3.2
—
VDRAIN = -8mV &
VCC = 4V
VG(OFF)
—
0.1
0.3
VDRAIN ≥ 0mV &
VCC = 20V
VG
—
12
—
VDRAIN = -8mV &
VCC = 20V
Switching Performance
Turn-On Propagation Delay
tD(RISE)
—
400
—
ns
CL = 47nF
Rise and Fall Measured 10% to 90%
Refer to Application Test Circuit Below
Gate Rise Time
tR
—
695
—
Turn-Off Propagation Delay
tD(FALL)
—
400
—
Gate Fall Time
tF
—
131
—
Note: 11. Measured under pulsed conditions. Pulse width ≤ 300μs. Duty cycle ≤ 2%.
ZXGD3111N7
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ZXGD3111N7
Layout Considerations
The GATE Pin should be close to the MOSFET gate to minimize trace resistance and inductance to maximize switching performance. While the
VCC to GND Pin needs an X7R type capacitor closely decoupling the supply. Trace widths should be maximized in the high current paths through
the MOSFET and ground return loop in order to minimize the effects of circuit resistance and inductance. The ground return loop should also be
as short as possible. For thermal consideration, the main heat path is from Pin 3 (VCC), and pins 5 and 6 (PGND). For best thermal performance,
the copper area connected to Pin 3 (VCC), and pins 5 and 6 (PGND) should be maximized.
Active OR’ing or (N+1) Redundancy Application
PSU
(A)
OR-ing Rectifier
Common +ve Bus
OR-ing Rectifier
PSU
(B)
LOAD
+ve Rail
GND
Critical systems require fault-tolerant power supply that can be achieved by paralleling two or more PSUs into (N+1) redundancy configuration.
During normal operation, usually all PSUs equally share the load for maximum reliability. If one of the PSUs is unplugged or fails, then the other
PSU fully supports the load. To avoid the faulty PSU from affecting the common bus, then an OR’ing rectifier blocks the reverse current flow into
the faulty PSU. Likewise during hot-swapping, the OR’ing rectifiers isolate a PSU’s discharged output capacitors from the common bus.
As the load current is in the tens of amps then a standard rectifier has a significant forward voltage drop. This both wastes power and significantly
drops the potential on low voltage rails. Hence, very low RDS(ON) Power MOSFETs can replace the standard rectifiers and the ZXGD3111 controls
the MOSFET as an ideal diode.
Functional Block Diagram
The device is comprised of a differential amplifier and high current driver. The differential amplifier acts as a detector and monitors the DRAIN-to-
GND Pin voltage difference. When this difference is less than the threshold voltage (VT), then a positive output voltage approaching VCC is given
on the GATE Pin. If VCC > 12V, then the GATE-to-GND will clamp at 12V. Conversely, when the DRAIN-to-GND Pin voltage difference is greater
than VT, then GATE Pin voltage is rapidly reduced towards the GND voltage.
GATE
Vcc
GND
Driver
+
Differential
amplifier
-
Threshold
voltage
DRAIN
PGND
ZXGD3111
ZXGD3111N7
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ZXGD3111N7
Typical Application Circuits
Focus Application of the ZXGD3111 OR’ing Controller is for Redundant Low-Side -48V Power Supply Rail
ZXTR2012 (HV input, 12V output regulator) is suggested to power the VCC of ZXGD3111 from high voltage rail.
Example of the ZXGD3111 OR’ing Controller in a Redundant High-Side +48V Power Supply Rail with VCC Supply
ZXGD3111
ZXGD3111
ZXGD3111
ZXGD3111
ZXGD3111N7
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ZXGD3111N7
Operation in Typical Application
The ZXGD3111 operation is described step-by-step with reference to the typical application circuits and the timing diagram below:
1. The ZXGD3111 differential amplifier monitors the MOSFET’s drain-source voltage (VDS).
2. At system start up, the MOSFET body diode is forced to conduct current from the input PSU to the load and VDS is approximately -0.6V
as measured by the differential amplifier between DRAIN-to-GND pins.
3. As VDS < VT (threshold voltage), the differential amplifier outputs a positive voltage approaching VCC with respect to GND. This feeds
the driver stage from which the GATE Pin voltage rises towards VCC. If VCC > 12V, then the GATE-to-GND will clamp at 12V.
4. The sourcing current out of the GATE Pin drives the MOSFET gate to enhance the channel and turn it on.
5. If a short condition occurs on the input PSU, it causes the MOSFET VDS to increase.
6. When VDS > VT, then the differential amplifier’s output goes to GND and the driver stage rapidly pulls the GATE Pin voltage to GND,
turning off the MOSFET channel. This prevents high reverse current flow from the load to the PSU which could pull down the common
bus voltage causing catastrophic system failure.
MOSFET
Drain Voltage
VDS
MOSFET
Gate Voltage
VGS
MOSFET
Drain Current
tD(RISE)
VT
VGND
tR
tF
tD(FALL)
ID
VGND
VCC
0A
-0.6V
ZXGD3111N7
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ZXGD3111N7
Typical Electrical Characteristics (@TA = +25°C, unless otherwise specified.)
-10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0
0
2
4
6
8
10
12
14
16
18
20
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0
0
2
4
6
8
10
-50 0 50 100 150
-2.0
-1.8
-1.6
-1.4
-1.2
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
-50 -25 0 25 50 75 100 125 150
400
800
1200
1600
2000
020 40 60 80 100
0
100
200
300
400
500
-10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0
0
2
4
6
8
10
12
14
16
18
20
VCC = 4V
Capacitive load and
50k pull down resistor
VCC = 20V
VCC = 12V
VCC = 10V
Transfer Characteristic
VG Gate Voltage (V)
VD Drain Voltage (mV)
TA = 150OC
TA = 25OCTA = 85OC
TA = 125OC
TA = -50OC
Transfer Characteristic
VG Gate Voltage (V)
VD Drain Voltage (mV)
VCC = 12V
50k pull down
VCC = 12V
VG = 1V
50k pull down
Drain Sense Voltage vs Temperature
VD Drain Voltage (mV)
Temperature (OC)
TOFF = tD2 + tF
TON = tD1 + tR
Switching vs Temperature
Switching Time (ns)
Temperature (OC)
VCC = 12V
CL=47nF
VCC = 4V
VCC = 10V VCC = 12V
VCC = 20V
Supply Current vs Capacitive Load
Capacitance (nF)
Supply Current (mA)
f=250kHz
Capacitive load only
VCC = 4V
VCC = 20V
VCC = 12V
VCC = 10V
Transfer Characteristic
VG Gate Voltage (V)
VD Drain Voltage (mV)
ZXGD3111N7
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Typical Electrical Characteristics (Cont.) (@TA = +25°C, unless otherwise specified.)
-1.0 -0.5 0.0 0.5 1.0 1.5 2.0
-2
0
2
4
6
8
10
12
-1.0 -0.5 0.0 0.5 1.0 1.5 2.0
-2
0
2
4
6
8
10
12
110 100
300
600
900
1200
-1 0 1 2 3 4 5
0.0
0.2
0.4
0.6
0.8
1.0
110 100
0
2
4
10 100 1000 10000 100000
0.1
1
10
100
-150
-100
-50
0
50
100
150
-150
-100
-50
0
50
100
150
54 53 52 51 50
0
-1
-2
-3
-4
-5
V=12V
CL=47nF
VD
Switch Off Speed
Gate Voltage (V)
Time (s)
VG
DrainVoltage (mV)
Drain Voltage (mV)
V=12V
CL=47nF
VG
VD
Switch On Speed
GateVoltage (V)
Time (s)
VCC=12V
TON = tD1 + tR
TOFF = tD2 + tF
Switching vs Capacitive Load
Time (ns)
Capacitance (nF)
Sink Current Time Scale (s)
Gate Drive Sink Current (A)
V=12V
CL=47nF
ISOURCE ISINK
Gate Drive Current
Gate Drive Source Current (A)
source Current Time Scale(s)
VCC=12V
ISINK
Gate Current vs Capacitive Load
Peak Drive Current (A)
Capacitance (nF)
-ISOURCE
CL=100nF
CL=47nF
CL=10nF
CL=4.7nF
CL=1nF
VCC=12V
Supply Current vs Frequency
Frequency (Hz)
Supply Current (mA)
ZXGD3111N7
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Package Outline Dimensions
Please see http://www.diodes.com/package-outlines.html for the latest version.
SO-7
SO-7
Dim
Min
Max
Typ
A2
1.40
1.50
1.45
A1
0.10
0.20
0.15
b
0.30
0.50
0.40
c
0.15
0.25
0.20
D
4.85
4.95
4.90
E
5.90
6.10
6.00
E1
3.80
3.90
3.85
E1a
3.85
3.95
3.90
e
–
–
1.27
h
–
–
0.35
L
0.62
0.82
0.72
Q
0.60
0.70
0.65
All Dimensions in mm
Suggested Pad Layout
Please see http://www.diodes.com/package-outlines.html for the latest version.
SO-7
Dimensions
Value
(in mm)
C
1.270
X
0.802
X1
4.612
Y
1.505
Y1
6.500
Note: For high voltage applications, the appropriate industry sector guidelines should be considered with regards to creepage and clearance distances between
device Terminals and PCB tracking.
1
b
e
E
A2
A1
9° (All sides)
4°± 3°
c
Q
h
45°
R 0.1
7°
DE1a
E1
L
Seating Plane
Gauge Plane
CX
Y
Y1
X1
ZXGD3111N7
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ZXGD3111N7
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