2N6782 Data Sheet November 1998 3.5A, 100V, 0.600 Ohm, N-Channel Power MOSFET Features The 2N6782 is an N-Channel enhancement mode silicon gate power field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. * rDS(ON) = 0.600 Ordering Information * Majority Carrier Device PART NUMBER 2N6782 PACKAGE TO-205AF File Number 1592.2 * 3.5A, 100V * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" BRAND 2N6782 NOTE: When ordering, use the entire part number. Symbol D G S Packaging JEDEC TO-205AF DRAIN (CASE) SOURCE GATE (c)2001 Fairchild Semiconductor Corporation 2N6782 Rev. A 2N6782 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulsed Drain Current (Notes 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulse Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 2N6782 100 100 3.5 2.25 14 20 3.5 14 15 0.12 -55 to 150 UNITS V V A A A V A A W W/oC oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS ID = 0.25mA, VGS = 0V 100 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 0.5mA 2 - 4 V IDSS VDS = 100V, VGS = 0V - - 250 A VDS = 80V, VGS = 0V TC = 125oC - - 1000 A ID = 3.5A, VGS = 10V - - 2.1 V VGS = 20V - - 100 nA ID = 2.25A, VGS = 10V - 0.5 0.600 Zero Gate Voltage Drain Current On-State Drain Current (Note 2) VDS(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) rDS(ON) Diode Forward Voltage (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time VSD ID = 2.25A, VGS = 10V, TC = 125oC TC = 25oC, IS = 3.5A, VGS = 0V gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time - - 1.080 0.75 - 1.5 V VDS = 5V, ID = 2.25A 1 1.5 3 S VDD 34V, ID = 2.25A, RG = 50 (Figure 17) MOSFET Switching Times are Essentially Independent of Operating Temperature - - 15 ns tf - - 25 ns - - 25 ns - - 20 ns 60 135 200 pF 40 80 100 pF CRSS 10 20 25 pF RJC - - 8.33 oC/W - - 175 oC/W VDS = 80V, ID = 188mA 15 - - W VDS = 4.28V, ID = 3.5A 15 - - W MIN TYP MAX - 200 - ns - 1.0 - C VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJA Free Air Operation Safe Operating Area SOA Source to Drain Diode Specifications PARAMETER Reverse Recovery Time Reverse Recovered Charge SYMBOL trr QRR TEST CONDITIONS TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/s TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/s UNITS NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). (c)2001 Fairchild Semiconductor Corporation 2N6782 Rev. A 2N6782 Typical Performance Curves Unless Otherwise Specified 5 POWER DISSIPATION MULTIPLIER 1.2 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 4 3 2 1 0 0 0 25 125 50 75 100 TC , CASE TEMPERATURE (oC) 25 150 75 50 100 125 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZJC, NORMALIZED THERMAL IMPEDANCE 1 0.5 0.2 0.1 0.1 PDM 0.05 t1 t2 0.02 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t, RECTANGULAR PULSE DURATION (s) 1 10 FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 12 100 80s PULSE TEST OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 10V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 10s 10 100s 1ms 1 -0.1 -1 TC = 25oC TJ = MAX RATED RJC = 8.33oC/W SINGLE PULSE 10ms VGS = 8V 6 7V 4 6V 2 100ms 5V 4V DC 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA (c)2001 Fairchild Semiconductor Corporation 9V 8 1000 0 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V) 60 FIGURE 5. OUTPUT CHARACTERISTICS 2N6782 Rev. A 2N6782 Typical Performance Curves 80s PULSE TEST 80s PULSE TEST VGS = 10V 8 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 Unless Otherwise Specified (Continued) 9.0V 8.0V 6 7.0V 4 6.0V 2 10 TJ = 125oC TJ = 25oC TJ = -55oC 1.0 5.0V 4.0V 0 0 1 3 4 5 2 VDS, DRAIN TO SOURCE VOLTAGE (V) 6 0.1 7 0 2 FIGURE 6. SATURATION CHARACTERISTICS 2.00 NORMALIZED ON-RESISTANCE rDS(ON), ON-STATE RESISTANCE () 14 FIGURE 7. TRANSFER CHARACTERISTICS 2.0 1.5 VGS = 10V 1.0 VGS = 20V 0.5 0 4 6 8 10 12 VGS, SOURCE TO DRAIN VOLTAGE (V) 0 5 10 ID, DRAIN CURRENT (A) 15 VGS = 10V ID = 1.5A 1.75 1.50 1.25 1.00 0.75 0.50 0.25 -80 20 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) 160 NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD 1.10 400 C, CAPACITANCE (pF) NORMALIZED ON-RESISTANCE 1.15 1.05 1.00 0.95 0.90 300 200 CISS COSS 100 0.85 0.80 -80 CRSS 0 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) 160 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE (c)2001 Fairchild Semiconductor Corporation 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 2N6782 Rev. A 2N6782 Typical Performance Curves 80s PULSE TEST IDR, REVERSE DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 2.5 Unless Otherwise Specified (Continued) TJ = -55oC 2.0 TJ = 25oC 1.5 TJ = 125oC 1.0 0.5 0 5 2 4 6 8 10 ID, DRAIN CURRENT (A) 12 TJ = 25oC TJ = 150oC 2 1.0 0.5 0.2 0.1 0 80ms PULSE TEST 10 14 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 0 0.4 0.8 1.2 1.6 2.0 2.2 VSD, SOURCE TO DRAIN VOLTAGE (V) 2.4 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE VGS, GATE TO SOURCE VOLTAGE (V) 20 ID = 8A VDS = 20V VDS = 50V VDS = 80V 15 10 5 0 0 2 4 6 8 Qg , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE (c)2001 Fairchild Semiconductor Corporation 2N6782 Rev. A 2N6782 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN IAS + RG REQUIRED PEAK IAS VDS VDD VDD - VGS DUT tP 0V IAS 0 0.01 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2F 50% PULSE WIDTH FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% 10% VDD Qg(TOT) SAME TYPE AS DUT 50k Qgd 0.3F VGS Qgs D VDS DUT G IG(REF) 0 S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT (c)2001 Fairchild Semiconductor Corporation IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS 2N6782 Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1