FEATURES FUNCTIONAL BLOCK DIAGRAM Isolated RS-485/RS-422 transceiver, configurable as half or full duplex isoPower integrated isolated dc-to-dc converter 15 kV ESD protection on RS-485 input/output pins Complies with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E) ADM2582E data rate: 16 Mbps ADM2587E data rate: 500 kbps 5 V or 3.3 V operation Connect up to 256 nodes on one bus Open- and short-circuit, fail-safe receiver inputs High common-mode transient immunity: >25 kV/s Thermal shutdown protection Safety and regulatory approvals UL recognition: 2500 V rms for 1 minute per UL 1577 VDE Certificates of Conformity DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01 VIORM = 560 V peak Operating temperature range: -40C to +85C Highly integrated, 20-lead, wide-body SOIC package VISOOUT VCC isoPower DC-TO-DC CONVERTER OSCILLATOR RECTIFIER VISOIN REGULATOR DIGITAL ISOLATION iCoupler TRANSCEIVER Y TxD ENCODE DECODE D Z DE ENCODE DECODE RxD DECODE ENCODE A R B ADM2582E/ADM2587E RE GND1 ISOLATION BARRIER GND2 08111-001 Data Sheet Signal and Power Isolated RS-485 Transceiver with 15 kV ESD Protection ADM2582E/ADM2587E Figure 1. APPLICATIONS Isolated RS-485/RS-422 interfaces Industrial field networks Multipoint data transmission systems GENERAL DESCRIPTION The ADM2582E/ADM2587E are fully integrated signal and power isolated data transceivers with 15 kV ESD protection and are suitable for high speed communication on multipoint transmission lines. The ADM2582E/ADM2587E include an integrated isolated dc-to-dc power supply, which eliminates the need for an external dc-to-dc isolation block. They are designed for balanced transmission lines and comply with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E). The devices integrate Analog Devices, Inc., iCoupler(R) technology to combine a 3-channel isolator, a three-state differential line driver, a differential input receiver, and Analog Devices isoPower(R) dc-todc converter into a single package. The devices are powered by a single 5 V or 3.3 V supply, realizing a fully integrated signal and power isolated RS-485 solution. Rev. G The ADM2582E/ADM2587E driver has an active high enable. An active low receiver enable is also provided, which causes the receiver output to enter a high impedance state when disabled. The devices have current limiting and thermal shutdown features to protect against output short circuits and situations where bus contention may cause excessive power dissipation. The parts are fully specified over the industrial temperature range and are available in a highly integrated, 20-lead, wide-body SOIC package. The ADM2582E/ADM2587E contain isoPower technology that uses high frequency switching elements to transfer power through the transformer. Special care must be taken during printed circuit board (PCB) layout to meet emissions standards. Refer to the AN-0971 Application Note, Control of Radiated Emissions with isoPower Devices, for details on board layout considerations. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2009-2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADM2582E/ADM2587E Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits ..................................................................................... 13 Applications ....................................................................................... 1 Switching Characteristics .............................................................. 14 Functional Block Diagram .............................................................. 1 Circuit Description......................................................................... 15 General Description ......................................................................... 1 Signal Isolation ........................................................................... 15 Revision History ............................................................................... 2 Power Isolation ........................................................................... 15 Specifications..................................................................................... 4 Truth Tables................................................................................. 15 ADM2582E Timing Specifications ............................................ 5 Thermal Shutdown .................................................................... 15 ADM2587E Timing Specifications ............................................ 5 Open- and Short-Circuit, Fail-Safe Receiver Inputs.............. 15 ADM2582E/ADM2587E Package Characteristics ................... 5 DC Correctness and Magnetic Field Immunity........................... 15 ADM2582E/ADM2587E Regulatory Information .................. 6 Applications Information .............................................................. 17 ADM2582E/ADM2587E Insulation and Safety-Related Specifications ................................................................................ 6 PCB Layout and Electromagnetic Interference (EMI) .......... 17 ADM2582E/ADM2587E VDE 0884 Insulation Characteristics .............................................................................. 6 Isolated Power Supply Considerations .................................... 19 Absolute Maximum Ratings............................................................ 7 ESD Caution .................................................................................. 7 Pin Configuration and Function Descriptions ............................. 8 Insulation Lifetime ..................................................................... 18 Typical Applications ................................................................... 20 Outline Dimensions ....................................................................... 22 Ordering Guide .......................................................................... 22 Typical Performance Characteristics ............................................. 9 REVISION HISTORY 5/2018--Rev. F to Rev. G Changes to Table 10 .......................................................................... 8 Deleted Electromagnetic Interference (EMI) Considerations Section .............................................................................................. 16 Changes to PCB Layout and Electromagnetic Interference (EMI) Section .................................................................................. 17 Changes to Figure 35 ...................................................................... 18 Changes to PCB Layout Reference ............................................... 19 Changes to Ordering Guide .......................................................... 22 9/2016--Rev. E to Rev. F Changes to Ordering Guide .......................................................... 20 10/2014--Rev. D to Rev. E Changes to Table 12 ........................................................................ 14 6/2011--Rev. B to Rev. C Changes to Features Section and Figure 1 .....................................1 Changes to Table 4.............................................................................4 Changes to Table 5.............................................................................5 Deleted Table 6; Renumbered Sequentially ...................................5 Added Thermal Resistance JA Parameter, Table 8 .......................6 Changes to Table 9.............................................................................6 Changes to Table 10 ..........................................................................7 Changes to Table 13 ....................................................................... 14 Moved DC Correctness and Magnetic Field Immunity Section.............................................................................................. 14 Changes to PCB Layout Section and Figure 35 .......................... 16 Changes to Figure 39...................................................................... 17 Changes to Typical Applications Section and Figure 40 ........... 18 9/2014--Rev. C to Rev. D Changes to Figure 9 .......................................................................... 9 Rev. G | Page 2 of 22 Data Sheet ADM2582E/ADM2587E 3/2011--Rev. A to Rev. B Removed Pending from Safety and Regulatory Approvals ........................................................................ Throughout Changed Minimum External Air Gap (Clearance) Value and Minimum External Tracking (Creepage) Value ............................ 5 Added Text to the ADM2582E/ADM2587E VDE 0884 Insulation Characteristics Section ................................................. 5 Changes to Differential Output Voltage, Loaded Parameter, Table 1 ................................................................................................. 3 Changes to Table 5 ............................................................................ 5 Added Table 6; Renumbered Sequentially ..................................... 5 Change to Pin 8 Description, Table 11 ........................................... 7 Changes to Figure 5 and Figure 6 ................................................... 8 Changes to Table 13 and Table 14 ................................................. 14 9/2010--Rev. 0 to Rev. A Changes to Features Section ............................................................ 1 9/2009--Revision 0: Initial Version Rev. G | Page 3 of 22 ADM2582E/ADM2587E Data Sheet SPECIFICATIONS All voltages are relative to their respective ground; 3.0 VCC 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25C, VCC = 5 V unless otherwise noted. Table 1. Parameter ADM2587E SUPPLY CURRENT Data Rate 500 kbps Symbol ICC Min Typ Max Unit Test Conditions 90 mA 72 125 mA mA 120 mA mA VCC = 3.3 V, 100 load between Y and Z VCC = 5 V, 100 load between Y and Z VCC = 3.3 V, 54 load between Y and Z VCC = 5 V, 54 load between Y and Z 120 load between Y and Z 150 230 mA mA 120 load between Y and Z 54 load between Y and Z 3.6 3.6 3.6 0.2 3.0 0.2 200 30 V V V V V V mA A RL = 100 (RS-422), see Figure 23 RL = 54 (RS-485), see Figure 23 -7 V VTEST1 12 V, see Figure 24 RL = 54 or 100 , see Figure 23 RL = 54 or 100 , see Figure 23 RL = 54 or 100 , see Figure 23 98 ADM2582E SUPPLY CURRENT Data Rate = 16 Mbps ICC ISOLATED SUPPLY VOLTAGE DRIVER Differential Outputs Differential Output Voltage, Loaded VISOUT |VOD| for Complementary Output States Common-Mode Output Voltage |VOC| for Complementary Output States Short-Circuit Output Current Output Leakage Current (Y, Z) Logic Inputs DE, RE, TxD Input Threshold Low Input Threshold High Input Current RECEIVER Differential Inputs Differential Input Threshold Voltage Input Voltage Hysteresis Input Current (A, B) Line Input Resistance Logic Outputs Output Voltage Low Output Voltage High Short-Circuit Current COMMON-MODE TRANSIENT IMMUNITY1 1 |VOD2| |VOD3| |VOD| VOC |VOC| IOS IO 3.3 2.0 1.5 1.5 DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VIN = -7 V -30 A VIL VIH II 0.3 x VCC -10 0.01 V V A DE, RE, TxD DE, RE, TxD DE, RE, TxD VTH VHYS II -200 -125 15 mV mV A A k -7 V < VCM < +12 V VOC = 0 V DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V DE = 0 V, VCC = 0 V or 3.6 V, VIN = -7 V -7 V < VCM < +12 V V V mA kV/s IO = 1.5 mA, VA - VB = -0.2 V IO = -1.5 mA, VA - VB = 0.2 V 0.7 x VCC 10 -30 125 RIN -100 96 VOL VOH VCC - 0.3 0.2 VCC - 0.2 0.4 100 25 VCM = 1 kV, transient magnitude = 800 V CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. G | Page 4 of 22 Data Sheet ADM2582E/ADM2587E ADM2582E TIMING SPECIFICATIONS TA = -40C to +85C. Table 2. Parameter DRIVER Maximum Data Rate Propagation Delay, Low to High Propagation Delay, High to Low Output Skew Rise Time/Fall Time Enable Time Disable Time RECEIVER Propagation Delay, Low to High Propagation Delay, High to Low Output Skew1 Enable Time Disable Time 1 Symbol Min Typ Max Unit Test Conditions tDPLH tDPHL tSKEW tDR, tDF tZL, tZH tLZ, tHZ 63 64 1 100 100 8 15 120 150 Mbps ns ns ns ns ns ns RL = 54 , CL1 = C L2 = 100 pF, see Figure 25 and Figure 29 RL = 54 , CL1 = C L2 = 100 pF, see Figure 25 and Figure 29 RL = 54 , CL1 = CL2 = 100 pF, see Figure 25 and Figure 29 RL = 54 , CL1 = CL2 = 100 pF, see Figure 25 and Figure 29 RL = 110 , CL = 50 pF, see Figure 26 and Figure 31 RL = 110 , CL = 50 pF, see Figure 26 and Figure 31 tRPLH tRPHL tSKEW tZL, tZH tLZ, tHZ 94 95 1 110 110 12 15 15 ns ns ns ns ns CL = 15 pF, see Figure 27 and Figure 30 CL = 15 pF, see Figure 27 and Figure 30 CL = 15 pF, see Figure 27 and Figure 30 RL = 1 k, CL = 15 pF, see Figure 28 and Figure 32 RL = 1 k, CL = 15 pF, see Figure 28 and Figure 32 Typ Max Unit Test Conditions 503 510 7 700 700 100 1100 2.5 200 kbps ns ns ns ns s ns RL = 54 , CL1 = C L2 = 100 pF, see Figure 25 and Figure 29 RL = 54 , CL1 = C L2 = 100 pF, see Figure 25 and Figure 29 RL = 54 , CL1 = CL2 = 100 pF, see Figure 25 and Figure 29 RL = 54 , CL1 = CL2 = 100 pF, see Figure 25 and Figure 29 RL = 110 , CL = 50 pF, see Figure 26 and Figure 31 RL = 110 , CL = 50 pF, see Figure 26 and Figure 31 91 95 4 200 200 30 15 15 ns ns ns ns ns CL = 15 pF, see Figure 27 and Figure 30 CL = 15 pF, see Figure 27 and Figure 30 CL = 15 pF, see Figure 27 and Figure 30 RL = 1 k, CL = 15 pF, see Figure 28 and Figure 32 RL = 1 k, CL = 15 pF, see Figure 28 and Figure 32 16 Guaranteed by design. ADM2587E TIMING SPECIFICATIONS TA = -40C to +85C. Table 3. Parameter DRIVER Maximum Data Rate Propagation Delay, Low to High Propagation Delay, High to Low Output Skew Rise Time/Fall Time Enable Time Disable Time RECEIVER Propagation Delay, Low to High Propagation Delay, High to Low Output Skew Enable Time Disable Time Symbol tDPLH tDPHL tSKEW tDR, tDF tZL, tZH tLZ, tHZ tRPLH tRPHL tSKEW tZL, tZH tLZ, tHZ Min 500 250 250 200 ADM2582E/ADM2587E PACKAGE CHARACTERISTICS Table 4. Parameter Resistance (Input-to-Output)1 Capacitance (Input-to-Output)1 Input Capacitance2 1 2 Symbol RI-O CI-O CI Min Typ 1012 3 4 Max Device considered a 2-terminal device: short together Pin 1 to Pin 10 and short together Pin 11 to Pin 20. Input capacitance is from any input data pin to ground. Rev. G | Page 5 of 22 Unit pF pF Test Conditions f = 1 MHz ADM2582E/ADM2587E Data Sheet ADM2582E/ADM2587E REGULATORY INFORMATION Table 5. ADM2582E/ADM2587E Approvals Organization UL VDE Approval Type Recognized under the Component Recognition Program of Underwriters Laboratories, Inc. Certified according to DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01 Notes In accordance with UL 1577, each ADM2582E/ADM2587E is proof tested by applying an insulation test voltage 3000 V rms for 1 second. In accordance with DIN EN 60747-5-2, each ADM2582E/ADM2587E is proof tested by applying an insulation test voltage 1050 VPEAK for 1 second. ADM2582E/ADM2587E INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 6. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 2500 7.7 Unit V rms mm Minimum External Tracking (Creepage) L(I02) 7.6 mm Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 min >175 IIIa mm V Conditions 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance along body Insulation distance through insulation DIN IEC 112/VDE 0303-1 Material Group (DIN VDE 0110: 1989-01, Table 1) ADM2582E/ADM2587E VDE 0884 INSULATION CHARACTERISTICS This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. An asterisk (*) on packages denotes VDE 0884 Part 2 approval. Table 7. Description CLASSIFICATIONS Installation Classification per DIN VDE 0110 for Rated Mains Voltage 150 V rms 300 V rms 400 V rms Climatic Classification Pollution Degree VOLTAGE Maximum Working Insulation Voltage Input-to-Output Test Voltage Method b1 Method a After Environmental Tests, Subgroup 1 After Input and/or Safety Test, Subgroup 2/Subgroup 3 Highest Allowable Overvoltage SAFETY-LIMITING VALUES Case Temperature Input Current Output Current Insulation Resistance at TS Conditions Symbol Characteristic Unit I to IV I to III I to II 40/85/21 2 DIN VDE 0110, see Table 1 VIORM VPR 560 V peak VIORM x 1.875 = VPR, 100% production tested, tm = 1 sec, partial discharge < 5 pC 1050 V peak VIORM x 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC VIORM x 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC 896 672 V peak V peak VTR 4000 V peak TS IS, INPUT IS, OUTPUT RS 150 265 335 >109 C mA mA Transient overvoltage, tTR = 10 sec Maximum value allowed in the event of a failure VIO = 500 V Rev. G | Page 6 of 22 Data Sheet ADM2582E/ADM2587E ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. All voltages are relative to their respective ground. Table 8. Parameter VCC Digital Input Voltage (DE, RE, TxD) Digital Output Voltage (RxD) Driver Output/Receiver Input Voltage Operating Temperature Range Storage Temperature Range ESD (Human Body Model) on A, B, Y, and Z pins ESD (Human Body Model) on Other Pins Thermal Resistance JA Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating -0.5 V to +7 V -0.5 V to VDD + 0.5 V -0.5 V to VDD + 0.5 V -9 V to +14 V -40C to +85C -55C to +150C 15 kV 2 kV 50C/W Table 9. Maximum Continuous Working Voltage1 Parameter AC Voltage Bipolar Waveform Max Unit Reference Standard 424 V peak 50-year minimum lifetime Unipolar Waveform Basic Insulation 560 V peak Maximum approved working voltage per VDE 0884 Part 2 DC Voltage Basic Insulation 560 V peak Maximum approved working voltage per VDE 0884 Part 2 1 260C 215C 220C Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. G | Page 7 of 22 ADM2582E/ADM2587E Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS GND1 1 20 GND2 VCC 2 RxD 4 RE 5 DE 6 TxD 7 VCC 8 19 VISOIN 18 A ADM2582E ADM2587E 17 B 16 GND2 TOP VIEW (Not to Scale) 15 Z 14 GND2 13 Y GND1 9 12 VISOOUT GND1 10 11 GND2 NOTES 1. PIN 12 AND PIN 19 MUST BE CONNECTED EXTERNALLY. 08111-002 GND1 3 Figure 2. Pin Configuration Table 10. Pin Function Description Pin No. 1 2 Mnemonic GND1 VCC 3 4 GND1 RxD 5 RE 6 7 8 DE TxD VCC 9 10 11, 14 GND1 GND1 GND2 12 VISOOUT 13 15 16 17 18 19 Y Z GND2 B A VISOIN 20 GND2 Description Ground, Logic Side. Logic Side Power Supply. It is recommended that a 0.1 F and a 0.01 F decoupling capacitor be fitted between Pin 2 and Pin 1. See Figure 35 for layout recommendations. Ground, Logic Side. Receiver Output Data. This output is high when (A - B) -30 mV and low when (A - B) -200 mV. The output is tristated when the receiver is disabled, that is, when RE is driven high. Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver; driving it high disables the receiver. Driver Enable Input. Driving this input high enables the driver; driving it low disables the driver. Driver Input. Data to be transmitted by the driver is applied to this input. Logic Side Power Supply. It is recommended that a 0.1 F and a 10 F decoupling capacitor be fitted between Pin 8 and Pin 9. See Figure 35 for layout recommendations. Ground, Logic Side. Ground, Logic Side. Ground for Isolated DC-to-DC Converter. It is recommended to connect Pin 11 and Pin 14 together through one ferrite bead to PCB ground. See Figure 35 for layout recommendations. Isolated Power Supply Output. This pin must be connected externally to VISOIN. It is recommended that a reservoir capacitor of 10 F and a decoupling capacitor of 0.1 F be fitted between Pin 12 and Pin 11. Driver Noninverting Output Driver Inverting Output Ground, Bus Side. Do not connect this pin to Pin 14 and Pin 11. See Figure 35 for layout recommendations. Receiver Inverting Input. Receiver Noninverting Input. Isolated Power Supply Input. This pin must be connected externally to VISOOUT. It is recommended that a 0.1 F and a 0.01 F decoupling capacitor be fitted between Pin 19 and Pin 20. Connect this pin through a ferrite bead and short trace length to VISOOUT for operation. See Figure 35 for layout recommendations. Ground, Bus Side. Rev. G | Page 8 of 22 Data Sheet ADM2582E/ADM2587E TYPICAL PERFORMANCE CHARACTERISTICS 180 140 120 RL = 54 140 SUPPLY CURRENT, ICC (mA) 120 RL = 120 100 80 NO LOAD 60 40 100 60 40 NO LOAD 10 35 TEMPERATURE (C) 60 85 08111-103 -15 0 -40 Figure 3. ADM2582E Supply Current (ICC) vs. Temperature (Data Rate = 16 Mbps, DE = 3.3 V, VCC = 3.3 V) -15 10 35 TEMPERATURE (C) 60 85 Figure 6. ADM2587E Supply Current (ICC) vs. Temperature (Data Rate = 500 kbps, DE = 3.3 V, VCC = 3.3 V) 140 72 70 DRIVER PROPAGATION DELAY (ns) RL = 54 120 SUPPLY CURRENT, ICC (mA) RL = 120 80 20 20 0 -40 RL = 54 08111-105 SUPPLY CURRENT, ICC (mA) 160 100 RL = 120 80 60 NO LOAD 40 20 68 66 64 tDPHL 62 tDPLH 60 58 56 54 10 35 TEMPERATURE (C) 60 85 50 -40 08111-104 -15 Figure 4. ADM2582E Supply Current (ICC) vs. Temperature (Data Rate = 16 Mbps, DE = 5 V, VCC = 5 V) -15 10 35 TEMPERATURE (C) 60 85 08111-107 52 0 -40 Figure 7. ADM2582E Differential Driver Propagation Delay vs. Temperature 120 600 DRIVER PROPAGATION DELAY (ns) 580 RL = 54 80 RL = 120 60 40 NO LOAD 20 560 540 tDPLH 520 tDPHL 500 480 460 440 -15 10 35 TEMPERATURE (C) 60 Figure 5. ADM2587E Supply Current (ICC) vs. Temperature (Data Rate = 500 kbps, DE = 5 V, VCC = 5 V) 85 400 -40 -15 10 35 TEMPERATURE (C) 60 85 08111-108 420 0 -40 08111-106 SUPPLY CURRENT, ICC (mA) 100 Figure 8. ADM2587E Differential Driver Propagation Delay vs. Temperature Rev. G | Page 9 of 22 ADM2582E/ADM2587E Data Sheet 60 TxD OUTPUT CURRENT (mA) 50 1 Y 40 30 20 Z 10 CH2 2.0V M10.00ns A CH1 1.28V 0 08111-109 CH1 2.0V CH3 2.0V 0 Figure 9. ADM2582E Driver Propagation Delay 1 2 3 OUTPUT VOLTAGE (V) 4 5 08111-112 3 Figure 12. Receiver Output Current vs. Receiver Output Low Voltage 4.75 4.74 OUTPUT VOLTAGE(V) 4.73 TxD 1 Z Y 4.72 4.71 4.70 4.69 4.68 4.67 3 CH2 2.0V M200ns A CH1 2.56V 4.65 -40 08111-110 CH1 2.0V CH3 2.0V Figure 10. ADM2587E Driver Propagation Delay 10 35 TEMPERATURE (C) 60 85 Figure 13. Receiver Output High Voltage vs. Temperature 0 0.32 -10 0.30 -20 OUTPUT VOLTAGE (V) -30 -40 -50 0.28 0.26 0.24 0.22 -70 0 1 2 3 OUTPUT VOLTAGE (V) 4 5 08111-111 -60 Figure 11. Receiver Output Current vs. Receiver Output High Voltage Rev. G | Page 10 of 22 0.20 -40 -15 10 35 TEMPERATURE (C) 60 Figure 14. Receiver Output Low Voltage vs. Temperature 85 08111-114 OUTPUT CURRENT (mA) -15 08111-113 4.66 Data Sheet ADM2582E/ADM2587E B A 1 RxD 3 CH2 2.0V M10.00ns A CH1 2.56V 98 97 96 tRPHL 95 94 93 92 tRPLH 91 90 -40 08111-115 CH1 2.0V CH3 2.0V 99 -15 10 35 TEMPERATURE (C) 60 85 08111-118 RECEIVER PROPAGATION DELAY (ns) 100 Figure 18. ADM2587E Receiver Propagation Delay vs. Temperature Figure 15. ADM2582E Receiver Propagation Delay 3.33 ISOLATED SUPPLY VOLTAGE (V) A B 1 RxD A CH1 2.56V 3.29 NO LOAD RL = 120 RL = 54 3.28 3.26 -40 -15 10 35 TEMPERATURE (C) 60 85 Figure 19. ADM2582E Isolated Supply Voltage vs. Temperature (VCC = 3.3 V, Data Rate = 16 Mbps) Figure 16. ADM2587E Receiver Propagation Delay 98 3.36 3.35 96 tRPHL 95 tRPLH 94 93 3.34 3.33 3.32 3.31 3.30 3.29 NO LOAD RL = 120 RL = 54 3.28 -15 10 35 TEMPERATURE (C) 60 85 08111-117 3.27 92 -40 3.26 -40 -15 10 35 TEMPERATURE (C) 60 85 Figure 20. ADM2582E Isolated Supply Voltage vs. Temperature (VCC = 5 V, Data Rate = 16 Mbps) Figure 17. ADM2582E Receiver Propagation Delay vs. Temperature Rev. G | Page 11 of 22 08111-120 97 ISOLATED SUPPLY VOLTAGE (V) RECEIVER PROPAGATION DELAY (ns) 3.30 08111-119 M10.00ns 08111-116 CH2 2.0V 3.31 3.27 3 CH1 2.0V CH3 2.0V 3.32 ADM2582E/ADM2587E Data Sheet 40 60 ISOLATED SUPPLY CURRENT (mA) 50 40 RL = 120 30 NO LOAD 20 10 30 RL = 120 25 20 15 10 NO LOAD 5 -15 10 35 TEMPERATURE (C) 60 85 Figure 21. ADM2582E Isolated Supply Current vs. Temperature (VCC = 3.3 V, Data Rate = 16 Mbps) 0 -40 -15 10 35 TEMPERATURE (C) 60 85 Figure 22. ADM2587E Isolated Supply Current vs. Temperature (VCC = 3.3 V, Data Rate = 500 kbps) Rev. G | Page 12 of 22 08111-122 0 -40 RL = 54 35 08111-121 ISOLATED SUPPLY CURRENT (mA) RL = 54 Data Sheet ADM2582E/ADM2587E TEST CIRCUITS RL 2 Y VOD2 VOUT VOC TxD 08111-003 Z Y S1 Figure 26. Driver Enable/Disable Figure 23. Driver Voltage Measurement Y 375 A 60 375 VTEST B VOUT RE CL Figure 27. Receiver Propagation Delay Figure 24. Driver Voltage Measurement VCC +1.5V Y TxD CL S1 RL RE 08111-005 Z RL -1.5V CL S2 CL VOUT RE IN Figure 28. Receiver Enable/Disable Figure 25. Driver Propagation Delay Rev. G | Page 13 of 22 08111-008 Z 08111-004 VOD3 TxD S2 CL 50pF Z DE VCC RL 110 08111-006 RL 2 08111-007 TxD ADM2582E/ADM2587E Data Sheet SWITCHING CHARACTERISTICS VCC VCC/2 VCC/2 0V tDPLH tDPHL VCC Z 1/2VO DE 0.5VCC 0.5VCC VO 0V tZL Y Y, Z 90% POINT VDIFF VOL tZH 10% POINT 10% POINT tDF tDR tHZ 2.3V VOH VOH - 0.5V Y, Z 08111-011 -VO VOL + 0.5V 90% POINT VDIFF = V(Y) - V(Z) 08111-009 +VO tLZ 2.3V tSKEW = tDPHL - tDPLH Figure 31. Driver Enable/Disable Timing Figure 29. Driver Propagation Delay, Rise/Fall Timing 0.7VCC RE 0.5VCC 0.5VCC 0.3VCC 0V 0V tRPLH tRPHL tZL 1.5V RO VOH tLZ VOL + 0.5V OUTPUT LOW tZH VOL tHZ OUTPUT HIGH 1.5V tSKEW = |tRPLH - tRPHL | 1.5V RO VOL 08111-010 RxD 1.5V VOH - 0.5V 0V Figure 32. Receiver Enable/Disable Timing Figure 30. Receiver Propagation Delay Rev. G | Page 14 of 22 VOH 08111-012 A-B Data Sheet ADM2582E/ADM2587E CIRCUIT DESCRIPTION SIGNAL ISOLATION Table 13. Receiving (see Table 11 for Abbreviations) The ADM2582E/ADM2587E signal isolation is implemented on the logic side of the interface. The part achieves signal isolation by having a digital isolation section and a transceiver section (see Figure 1). Data applied to the TxD and DE pins and referenced to logic ground (GND1) are coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the single-ended receiver output signal, referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RXD pin referenced to logic ground. POWER ISOLATION The ADM2582E/ADM2587E power isolation is implemented using an isoPower integrated isolated dc-to-dc converter. The dc-to-dc converter section of the ADM2582E/ADM2587E works on principles that are common to most modern power supplies. It is a secondary side controller architecture with isolated pulse-width modulation (PWM) feedback. VCC power is supplied to an oscillating circuit that switches current into a chip-scale air core transformer. Power transferred to the secondary side is rectified and regulated to 3.3 V. The secondary (VISO) side controller regulates the output by creating a PWM control signal that is sent to the primary (VCC) side by a dedicated iCoupler data channel. The PWM modulates the oscillator circuit to control the power being sent to the secondary side. Feedback allows for significantly higher power and efficiency. TRUTH TABLES The truth tables in this section use the abbreviations found in Table 11. Table 11. Truth Table Abbreviations Letter H L X Z NC Description High level Low level Don't care High impedance (off ) Disconnected DE H H L Y H L Z Inputs RE Output RxD -0.03 V -0.2 V -0.2 V < A - B < -0.03 V Inputs open X L or NC L or NC L or NC L or NC H H L X H Z THERMAL SHUTDOWN The ADM2582E/ADM2587E contain thermal shutdown circuitry that protects the parts from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. This circuitry is designed to disable the driver outputs when a die temperature of 150C is reached. As the device cools, the drivers are reenabled at a temperature of 140C. OPEN- AND SHORT-CIRCUIT, FAIL-SAFE RECEIVER INPUTS The receiver inputs have open- and short-circuit, fail-safe features that ensure that the receiver output is high when the inputs are open or shorted. During line-idle conditions, when no driver on the bus is enabled, the voltage across a terminating resistance at the receiver input decays to 0 V. With traditional transceivers, receiver input thresholds specified between -200 mV and +200 mV mean that external bias resistors are required on the A and B pins to ensure that the receiver outputs are in a known state. The short-circuit, fail-safe receiver input feature eliminates the need for bias resistors by specifying the receiver input threshold between -30 mV and -200 mV. The guaranteed negative threshold means that when the voltage between A and B decays to 0 V, the receiver output is guaranteed to be high. DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY Table 12. Transmitting (see Table 11 for Abbreviations) Inputs TxD H L X A-B Outputs Z L H Z The digital signals transmit across the isolation barrier using iCoupler technology. This technique uses chip-scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. Digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. At the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. The decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions at the input for more than 1 s, periodic sets of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. If the decoder receives no internal pulses of more than approximately 5 s, the input side is assumed to be Rev. G | Page 15 of 22 ADM2582E/ADM2587E Data Sheet unpowered or nonfunctional, in which case, the isolator output is forced to a default state by the watchdog timer circuit. This situation should occur in the ADM2582E/ADM2587E devices only during power-up and power-down operations. The limitation on the ADM2582E/ADM2587E magnetic field immunity is set by the condition in which induced voltage in the transformer receiving coil is sufficiently large to either falsely set or reset the decoder. The following analysis defines the conditions under which this can occur. The 3.3 V operating condition of the ADM2582E/ADM2587E is examined because it represents the most susceptible mode of operation. The pulses at the transformer output have an amplitude of >1.0 V. The decoder has a sensing threshold of about 0.5 V, thus establishing a 0.5 V margin in which induced voltages can be tolerated. The voltage induced across the receiving coil is given by V = (-d/dt)rn2; n = 1, 2, ... , N where: is magnetic flux density (gauss). N is the number of turns in the receiving coil. rn is the radius of the nth turn in the receiving coil (cm). The preceding magnetic flux density values correspond to specific current magnitudes at given distances from the ADM2582E/ADM2587E transformers. Figure 34 expresses these allowable current magnitudes as a function of frequency for selected distances. As shown in Figure 34, the ADM2582E/ ADM2587E are extremely immune and can be affected only by extremely large currents operated at high frequency very close to the component. For the 1 MHz example, a 0.5 kA current must be placed 5 mm away from the ADM2582E/ADM2587E to affect component operation. 100 MAXIMUM ALLOWABLE CURRENT (kA) 1k Given the geometry of the receiving coil in the ADM2582E/ ADM2587E and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated as shown in Figure 33. 10 DISTANCE = 1m 100 10 DISTANCE = 100mm 1 DISTANCE = 5mm 0.1 0.01 1k 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) Figure 34. Maximum Allowable Current for Various Current-to-ADM2582E/ADM2587E Spacings 1 Note that in combinations of strong magnetic field and high frequency, any loops formed by printed circuit board (PCB) traces can induce error voltages sufficiently large to trigger the thresholds of succeeding circuitry. Take care in the layout of such traces to avoid this possibility. 0.1 100k 10k 10M 1M MAGNETIC FIELD FREQUENCY (Hz) 100M 08111-019 0.01 0.001 1k 100M 08111-020 MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kGauss) For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event occurs during a transmitted pulse (and is of the worst-case polarity), it reduces the received pulse from >1.0 V to 0.75 V, which is still well above the 0.5 V sensing threshold of the decoder. Figure 33. Maximum Allowable External Magnetic Flux Density Rev. G | Page 16 of 22 Data Sheet ADM2582E/ADM2587E APPLICATIONS INFORMATION PCB LAYOUT AND ELECTROMAGNETIC INTERFERENCE (EMI) frequency and the 360 MHz secondary side rectifying frequency and harmonics. The ADM2582E/ADM2587E isolated RS-422/RS-485 transceiver contains an isoPower integrated dc-to-dc converter, requiring no external interface circuitry for the logic interfaces. Power supply bypassing is required at the input and output supply pins (see Figure 35). The power supply section of the ADM2582E/ ADM2587E uses a 180 MHz oscillator frequency to pass power efficiently through its chip-scale transformers. In addition, the normal operation of the data section of the iCoupler introduces switching transients on the power supply pins. To pass the EN55022 radiated emissions standard, the following additional layout guidelines are recommended: Bypass capacitors are required for several operating frequencies. Noise suppression requires a low inductance, high frequency capacitor, whereas ripple suppression and proper regulation require a large value capacitor. These capacitors are connected between Pin 1 (GND1) and Pin 2 (VCC) and Pin 8 (VCC) and Pin 9 (GND1) for VCC. The VISOIN and VISOOUT capacitors are connected between Pin 11 (GND2) and Pin 12 (VISOOUT) and Pin 19 (VISOIN) and Pin 20 (GND2). To suppress noise and reduce ripple, a parallel combination of at least two capacitors is required with the smaller of the two capacitors located closest to the device. The recommended capacitor values are 0.1 F and 10 F for VISOOUT at Pin 11 and Pin 12 and VCC at Pin 8 and Pin 9. Capacitor values of 0.01 F and 0.1 F are recommended for VISOIN at Pin 19 and Pin 20 and VCC at Pin 1 and Pin 2. The recommended best practice is to use a very low inductance ceramic capacitor, or its equivalent, for the smaller value. The total lead length between both ends of the capacitor and the input power supply pin should not exceed 10 mm. The dc-to-dc converter section of the ADM2582E/ADM2587E components must operate, out of necessity, at a very high frequency to allow efficient power transfer through the small transformers. This creates high frequency currents that can propagate in circuit board ground and power planes, causing edge and dipole radiation. The ADM2582E/ADM2587E features an internal split paddle, lead frame on the bus side. For the best noise suppression, filter both the GND2 pins (Pin 11 and Pin 14) and VISOOUT signals of the integrated dc-to-dc converter for high frequency currents. Use surface-mount ferrite beads in series with the signals before routing back to the device. See Figure 35 for the recommended PCB layout. The impedance of the ferrite bead is chosen to be about 2 k between the 100 MHz and 1 GHz frequency range to reduce the emissions at the 180 MHz primary switching * Do not connect the VISOOUT pin to a power plane; connect between VISOOUT and VISOIN using a PCB trace. Ensure that VISOIN (Pin 19) connects through the L1 ferrite to VISOOUT (Pin 12), as shown in Figure 35. * If using a four layer PCB, place an embedded stitching capacitor between GND1 and GND2 using internal layers of the PCB planes. An embedded PCB capacitor is created when two metal planes in a PCB overlap each other and are separated by dielectric material. This capacitor provides a return path for high frequency common-mode noise currents across the isolation gap. * If using a two layer PCB, place a high voltage discrete capacitor that connects between GND1 (Pin 10) and GND2 (Pin 11). This capacitor provides a return path for high frequency common-mode noise currents across the isolation gap. * Ensure that GND2 (Pin 14) connects to GND2 (Pin 11) on the inside (device side) of the C1 100 nF capacitor. * Ensure that the C1 capacitor connects between VISOOUT (Pin 12) and GND2 (Pin 11) on the device side of the L1 and L2 ferrites. * Ensure that GND2 (Pin 16) is connected to GND2 (Pin 11) on the outside (bus side) of the L2 ferrite, as shown in Figure 35. * Ensure that there is a keep out area for the GND2 plane in the PCB layout around the L1 and L2 ferrites. The keep out area means there must not be a GND2 fill on any layer below the L1 and L2 ferrites. * Locate the power delivery circuit in close proximity to the ADM2582E/ADM2587E device, so that the VCC trace is as short as possible. See the AN-1349 Application Note, PCB Implementation Guidelines to Minimize Radiated Emissions on the ADM2582E/ADM2587E RS485/RS-422 Transceivers, for more information. Evaluation boards and user guides are available for two layer and four layer PCB EN55022 radiated emissions compliant designs. See UG-916 and UG-044 for more information. Rev. G | Page 17 of 22 ADM2582E/ADM2587E Data Sheet 10nF 100nF 10nF 100nF GND1 1 VCC 2 GND1 3 GND2 20 DIGITAL ISOLATION TRANSCEIVER VISOIN 19 18 PCB TRACE CONNECTING PIN 11 AND PIN 14 GND2 R 4 17 D 5 16 6 15 7 14 VCC 8 13 GND1 9 GND1 10F 100nF isoPOWER DC-TO-DC CONVERTER 10 L1 VISOOUT 12 GND2 11 C1 100nF L2 FERRITE BEADS 10F 08111-035 STITCHING CAPACITOR ACROSS ISOLATION BARRIER REQUIRED FOR EN55022/CISPR22 CLASS B PCB KEEP OUT AREA Figure 35. Recommended PCB Layout In applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, design the board layout such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings for the device, thereby leading to latch-up and/or permanent damage. The ADM2582E/ADM2587E dissipate approximately 650 mW of power when fully loaded. Because it is not possible to apply a heat sink to an isolation device, the devices primarily depend on heat dissipation into the PCB through the GND pins. If the devices are used at high ambient temperatures, provide a thermal path from the GND pins to the PCB ground plane. The board layout in Figure 35 shows enlarged pads for Pin 1, Pin 3, Pin 9, Pin 10, Pin 11, Pin 14, Pin 16, and Pin 20. Implement multiple vias from the pad to the ground plane to reduce the temperature inside the chip significantly. The dimensions of the expanded pads are at the discretion of the designer and dependent on the available board space. The insulation lifetime of the ADM2582E/ADM2587E depends on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates, depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 36, Figure 37, and Figure 38 illustrate these different isolation voltage waveforms. Bipolar ac voltage is the most stringent environment. A 50-year operating lifetime under the bipolar ac condition determines the Analog Devices recommended maximum working voltage. In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher working voltages while still achieving a 50-year service life. The working voltages listed in Table 9 can be applied while maintaining the 50-year minimum lifetime, provided the voltage conforms to either the unipolar ac or dc voltage cases. Any cross insulation voltage waveform that does not conform to Figure 37 or Figure 38 should be treated as a bipolar ac waveform, and its peak voltage should be limited to the 50-year lifetime voltage value listed in Table 9. Rev. G | Page 18 of 22 Figure 36. Bipolar AC Waveform RATED PEAK VOLTAGE 0V Figure 37. DC Waveform RATED PEAK VOLTAGE 0V NOTES 1. THE VOLTAGE IS SHOWN AS SINUSODIAL FOR ILLUSTRATION PURPOSES ONLY. IT IS MEANT TO REPRESENT ANY VOLTAGE WAVEFORM VARYING BETWEEN 0 AND SOME LIMITING VALUE. THE LIMITING VALUE CAN BE POSITIVE OR NEGATIVE, BUT THE VOLTAGE CANNOT CROSS 0V. Figure 38. Unipolar AC Waveform 08111-022 Accelerated life testing is performed using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined, allowing calculation of the time to failure at the working voltage of interest. The values shown in Table 9 summarize the peak voltages for 50 years of service life in several operating conditions. In many cases, the working voltage approved by agency testing is higher than the 50-year service life voltage. Operation at working voltages higher than the service life voltage listed leads to premature insulation failure. 0V 08111-023 All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. Analog Devices conducts an extensive set of evaluations to determine the lifetime of the insulation structure within the ADM2582E/ADM2587E. 08111-021 RATED PEAK VOLTAGE INSULATION LIFETIME Data Sheet ADM2582E/ADM2587E ISOLATED POWER SUPPLY CONSIDERATIONS Table 14. Typical Maximum External Current Available on VISOOUT The typical output voltage of the integrated isoPower dc-to-dc isolated supply is 3.3 V. The isolated supply in the ADM2587E is capable of supplying a current of 55 mA when the junction temperature of the device is kept below 120C. It is important to note that the current available on the VISOOUT pin is the total current available and includes the current required to supply the internal RS-485 circuitry. External Load Current (mA) 15 RT 54 29 46 120 Unloaded System Configuration Double terminated bus with RT = 110 Single terminated bus Unterminated bus The ADM2582E typically has no current available externally on VISOOUT. The ADM2587E can typically supply 15 mA externally on VISOOUT when the driver is switching at 500 kbps loaded with 54 , while the junction temperature of the part is less than 120C. When external current is drawn from the VISOOUT pin, there is an increased risk of generating radiated emissions due to the high frequency switching elements used in the isoPower dc to-dc converter. Special care must be taken during PCB layout to meet emissions standards. See Application Note AN-0971, Control of Radiated Emissions with isoPower Devices, for details on board layout considerations. VCC EXTERNAL LOAD VISOOUT VCC isoPower DC-TO-DC CONVERTER GND1 OSCILLATOR GND RECTIFIER GND2 VISOIN REGULATOR TRANSCEIVER DIGITAL ISOLATION iCoupler Y TxD 500kbps ENCODE DECODE ENCODE DECODE D Z VCC DE RT A DECODE R ENCODE B ADM2582E/ADM2587E RE GND1 ISOLATION BARRIER GND2 Figure 39. ADM2587E Typical Maximum External Current Measurements Rev. G | Page 19 of 22 08111-038 RxD ADM2582E/ADM2587E Data Sheet TYPICAL APPLICATIONS An example application of the ADM2582E/ADM2587E for a fullduplex RS-485 node is shown in the circuit diagram of Figure 40. Refer to the PCB Layout and Electromagnetic Interference (EMI) section for the recommended placement of the capacitors shown in this circuit diagram. Placement of the RT termination resistors depends on the location of the node and the network configuration. Refer to the AN-960 Application Note, RS-485/ RS-422 Circuit Implementation Guide, for guidance on termination. Figure 41 and Figure 42 show typical applications of the ADM2582E/ADM2587E in half duplex and full duplex RS-485 network configurations. Up to 256 transceivers can be connected to the RS-485 bus. To minimize reflections, terminate the line at the receiving end in its characteristic impedance and keep stub lengths off the main line as short as possible. For half-duplex operation, this means that both ends of the line must be terminated because either end can be the receiving end. 3.3V/5V POWER SUPPLY 100nF 10F 100nF 10nF VCC VISOOUT VCC 100nF 10F isoPower DC-TO-DC CONVERTER OSCILLATOR RECTIFIER VISOIN 100nF REGULATOR DIGITAL ISOLATION iCoupler TxD MICROCONTROLLER AND UART DE TRANSCEIVER ENCODE DECODE ENCODE DECODE DECODE ENCODE D 10nF Y Z A RxD RE R B RT ADM2582E/ADM2587E ISOLATION BARRIER GND2 GND1 Figure 40. Example Circuit Diagram Using the ADM2582E/ADM2587E Rev. G | Page 20 of 22 08111-124 GND1 Data Sheet ADM2582E/ADM2587E MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 256 ADM2582E/ ADM2587E RxD R A A B B RE D RxD R RE RT RT DE TxD ADM2582E/ ADM2587E Z Z Y Y A B Z Y A B R Z DE D TxD Y R D ADM2582E/ ADM2587E RxD RE D ADM2582E/ ADM2587E DE TxD RxD RE DE TxD 08111-027 NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. 2. ISOLATION NOT SHOWN. Figure 41. ADM2582E/ADM2587E Typical Half-Duplex RS-485 Network MAXIMUM NUMBER OF NODES = 256 MASTER SLAVE A R RxD B Y D RT RE DE Z D B RT Y A RE R RxD ADM2582E/ ADM2587E ADM2582E/ ADM2587E A B Z Y A B Z Y SLAVE SLAVE R R D D ADM2582E/ ADM2587E ADM2582E/ ADM2587E RxD RE RxD RE DE TxD DE TxD NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. 2. ISOLATION NOT SHOWN. Figure 42. ADM2582E/ADM2587E Typical Full Duplex RS-485 Network Rev. G | Page 21 of 22 08111-028 DE TxD TxD Z ADM2582E/ADM2587E Data Sheet OUTLINE DIMENSIONS 13.00 (0.5118) 12.60 (0.4961) 11 20 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193) 10.00 (0.3937) 10 2.65 (0.1043) 2.35 (0.0925) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 1.27 (0.0500) BSC 0.51 (0.0201) 0.31 (0.0122) SEATING PLANE 0.75 (0.0295) 45 0.25 (0.0098) 8 0 0.33 (0.0130) 0.20 (0.0079) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013-AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 06-07-2006-A 1 Figure 43. 20-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-20) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 ADM2582EBRWZ ADM2582EBRWZ-REEL7 ADM2587EBRWZ ADM2587EBRWZ-REEL7 EVAL-ADM2582EEBZ EVAL-ADM2582EEMIZ EVAL-ADM2587EEBZ EVAL-ADM2587EEMIZ EVAL-ADM2587EARDZ EVAL-ADM2587ERPIZ EVAL-ADM2587EEB2Z 1 Data Rate (Mbps) 16 16 0.5 0.5 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 20-Lead SOIC_W 20-Lead SOIC_W 20-Lead SOIC_W 20-Lead SOIC_W ADM2582E Evaluation Board ADM2582E EMI Compliant Evaluation Board ADM2587E Evaluation Board ADM2587E EMI Compliant Evaluation Board ADM2587E Arduino Evaluation Board ADM2587E Raspberry Pi Evaluation Board ADM2587E Isolated RS-485 Repeater Evaluation Board Z = RoHS Compliant Part. (c)2009-2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08111-0-5/18(G) Rev. G | Page 22 of 22 Package Option RW-20 RW-20 RW-20 RW-20