410-310P - Digilent, Inc. - Datasheet.Live

Signal and Power Isolated RS-

485

Transceiver with ±15 kV ESD Protection

Data Sheet

ADM2582E/ADM2587E

Rev. G Document Feedback

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FEATURES

Isolated RS-485/RS-422 transceiver, configurable as half or

full duplex

isoPower integrated isolated dc-to-dc converter

±15 kV ESD protection on RS-485 input/output pins

Complies with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E)

ADM2582E data rate: 16 Mbps

ADM2587E data rate: 500 kbps

5 V or 3.3 V operation

Connect up to 256 nodes on one bus

Open- and short-circuit, fail-safe receiver inputs

High common-mode transient immunity: >25 kV/µs

Thermal shutdown protection

Safety and regulatory approvals

UL recognition: 2500 V rms for 1 minute per UL 1577

VDE Certificates of Conformity

DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01

VIORM = 560 V peak

Operating temperature range: −40°C to +85°C

Highly integrated, 20-lead, wide-body SOIC package

APPLICATIONS

Isolated RS-485/RS-422 interfaces

Industrial field networks

Multipoint data transmission systems

FUNCTIONAL BLOCK DIAGRAM

ADM2582E/ADM2587E

TxD

RxD

ISOLATION

BARRIER

TRANSCEIVER

GND

ENCODE

DECODE

DECODE D

DECODE

ENCODE

OSCILLATOR RECTIFIER

REGULATOR

ISOOUT

DIGITAL ISOLATION iCoupler

isoPower DC-TO-DC CONVERTER

ISOIN

08111-001

Figure 1.

GENERAL DESCRIPTION

The ADM2582E/ADM2587E are fully integrated signal and

power isolated data transceivers with ±15 kV ESD protection

and are suitable for high speed communication on multipoint

transmission lines. The ADM2582E/ADM2587E include an

integrated isolated dc-to-dc power supply, which eliminates the

need for an external dc-to-dc isolation block.

They are designed for balanced transmission lines and comply

with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E).

The devices integrate Analog Devices, Inc., iCoupler® technology

to combine a 3-channel isolator, a three-state differential line driver,

a differential input receiver, and Analog Devices isoPower® dc-to-

dc converter into a single package. The devices are powered by a

single 5 V or 3.3 V supply, realizing a fully integrated signal and

power isolated RS-485 solution.

The ADM2582E/ADM2587E driver has an active high enable.

An active low receiver enable is also provided, which causes the

receiver output to enter a high impedance state when disabled.

The devices have current limiting and thermal shutdown

features to protect against output short circuits and situations

where bus contention may cause excessive power dissipation.

The parts are fully specified over the industrial temperature

range and are available in a highly integrated, 20-lead, wide-body

SOIC package.

The ADM2582E/ADM2587E contain isoPower technology that

uses high frequency switching elements to transfer power through

the transformer. Special care must be taken during printed circuit

board (PCB) layout to meet emissions standards. Refer to the

AN-0971 Application Note, Control of Radiated Emissions with

isoPower Devices, for details on board layout considerations.

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 2 of 22

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 4

ADM2582E Timing Specifications ............................................ 5

ADM2587E Timing Specifications ............................................ 5

ADM2582E/ADM2587E Package Characteristics ................... 5

ADM2582E/ADM2587E Regulatory Information .................. 6

ADM2582E/ADM2587E Insulation and Safety-Related

Specifications ................................................................................ 6

ADM2582E/ADM2587E VDE 0884 Insulation

Characteristics .............................................................................. 6

Absolute Maximum Ratings ............................................................ 7

ESD Caution .................................................................................. 7

Pin Configuration and Function Descriptions ............................. 8

Typical Performance Characteristics ............................................. 9

Test Circuits ..................................................................................... 13

Switching Characteristics .............................................................. 14

Circuit Description......................................................................... 15

Signal Isolation ........................................................................... 15

Power Isolation ........................................................................... 15

Truth Tables................................................................................. 15

Thermal Shutdown .................................................................... 15

Open- and Short-Circuit, Fail-Safe Receiver Inputs.............. 15

DC Correctness and Magnetic Field Immunity ........................... 15

Applications Information .............................................................. 17

PCB Layout and Electromagnetic Interference (EMI) .......... 17

Insulation Lifetime ..................................................................... 18

Isolated Power Supply Considerations .................................... 19

Typical Applications ................................................................... 20

Outline Dimensions ....................................................................... 22

Ordering Guide .......................................................................... 22

REVISION HISTORY

5/2018—Rev. F to Rev. G

Changes to Table 10 .......................................................................... 8

Deleted Electromagnetic Interference (EMI) Considerations

Section .............................................................................................. 16

Changes to PCB Layout and Electromagnetic Interference

(EMI) Section .................................................................................. 17

Changes to Figure 35 ...................................................................... 18

Changes to PCB Layout Reference ............................................... 19

Changes to Ordering Guide .......................................................... 22

9/2016—Rev. E to Rev. F

Changes to Ordering Guide .......................................................... 20

10/2014—Rev. D to Rev. E

Changes to Table 12 ........................................................................ 14

9/2014—Rev. C to Rev. D

Changes to Figure 9 .......................................................................... 9

6/2011—Rev. B to Rev. C

Changes to Features Section and Figure 1 ..................................... 1

Changes to Table 4 ............................................................................. 4

Changes to Table 5 ............................................................................. 5

Deleted Table 6; Renumbered Sequentially ................................... 5

Added Thermal Resistance θJA Parameter, Table 8 ....................... 6

Changes to Table 9 ............................................................................. 6

Changes to Table 10 .......................................................................... 7

Changes to Table 13 ....................................................................... 14

Moved DC Correctness and Magnetic Field Immunity

Sec tion .............................................................................................. 14

Changes to PCB Layout Section and Figure 35 .......................... 16

Changes to Figure 39 ...................................................................... 17

Changes to Typical Applications Section and Figure 40 ........... 18

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 3 of 22

3/2011—Rev. A to Rev. B

Removed Pending from Safety and Regulatory

Approvals ........................................................................ Throughout

Changed Minimum External Air Gap (Clearance) Value and

Minimum External Tracking (Creepage) Value ............................ 5

Added Text to the ADM2582E/ADM2587E VDE 0884

Insulation Characteristics Section ................................................. 5

9/2010—Rev. 0 to Rev. A

Changes to Features Section ............................................................ 1

Changes to Differential Output Voltage, Loaded Parameter,

Table 1 ................................................................................................. 3

Changes to Table 5 ............................................................................ 5

Added Table 6; Renumbered Sequentially ..................................... 5

Change to Pin 8 Description, Table 11 ........................................... 7

Changes to Figure 5 and Figure 6 ................................................... 8

Changes to Table 13 and Table 14 ................................................. 14

9/2009—Revision 0: Initial Version

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 4 of 22

SPECIFICATIONS

All voltages are relative to their respective ground; 3.0 ≤ VCC ≤ 5.5 V. All minimum/maximum specifications apply over the entire

recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VCC = 5 V unless otherwise noted.

Table 1.

Parameter Symbol Min Typ Max Unit Test Conditions

ADM2587E SUPPLY CURRENT ICC

Data Rate ≤ 500 kbps 90 mA VCC = 3.3 V, 100 Ω load between Y and

72 mA VCC = 5 V, 100 Ω load between Y and Z

125 mA VCC = 3.3 V, 54 Ω load between Y and

98 mA VCC = 5 V, 54 Ω load between Y and Z

120 mA 120 Ω load between Y and Z

ADM2582E SUPPLY CURRENT

Data Rate = 16 Mbps 150 mA 120 Ω load between Y and Z

230 mA 54 Ω load between Y and Z

ISOLATED SUPPLY VOLTAGE

ISOUT

3.3

DRIVER

Differential Outputs

Differential Output Voltage, Loaded |VOD2| 2.0 3.6 V RL = 100 Ω (RS-422), see Figure 23

1.5 3.6 V RL = 54 Ω (RS-485), see Figure 23

|VOD3| 1.5 3.6 V −7 V ≤ VTEST1 ≤ 12 V, see Figure 24

Δ|VOD| for Complementary Output States Δ|VOD| 0.2 V RL = 54 Ω or 100 Ω, see Figure 23

Common-Mode Output Voltage VOC 3.0 V RL = 54 Ω or 100 Ω, see Figure 23

Δ|VOC| for Complementary Output States Δ|VOC| 0.2 V RL = 54 Ω or 100 Ω, see Figure 23

Short-Circuit Output Current IOS 200 mA

Output Leakage Current (Y, Z) IO 30 µA DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V,

VIN = 12 V

−30 µA DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V,

VIN = −7 V

Logic Inputs DE, RE, TxD

Input Threshold Low VIL 0.3 × VCC V DE, RE, TxD

Input Threshold High VIH 0.7 × VCC V DE, RE, TxD

Input Current II −10 0.01 10 µA DE, RE, TxD

RECEIVER

Differential Inputs

Differential Input Threshold Voltage VTH −200 −125 −30 mV −7 V < VCM < +12 V

Input Voltage Hysteresis VHYS 15 mV VOC = 0 V

Input Current (A, B) II 125 µA DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V

−100 µA DE = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V

Line Input Resistance RIN 96 kΩ −7 V < VCM < +12 V

Logic Outputs

Output Voltage Low VOL 0.2 0.4 V IO = 1.5 mA, VA − VB = −0.2 V

Output Voltage High VOH VCC − 0.3 VCC − 0.2 V IO = −1.5 mA, VA − VB = 0.2 V

Short-Circuit Current

100

COMMON-MODE TRANSIENT IMMUNITY1 25 kV/µs VCM = 1 kV, transient magnitude = 800 V

1 CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential

difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates

apply to both rising and falling common-mode voltage edges.

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 5 of 22

ADM2582E TIMING SPECIFICATIONS

TA = −40°C to +85°C.

Table 2.

Parameter Symbol Min Typ Max Unit Test Conditions

DRIVER

Maximum Data Rate 16 Mbps

Propagation Delay, Low to High tDPLH 63 100 ns RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29

Propagation Delay, High to Low tDPHL 64 100 ns RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29

Output Skew tSKEW 1 8 ns RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29

Rise Time/Fall Time tDR, tDF 15 ns RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29

Enable Time tZL, tZH 120 ns RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31

Disable Time tLZ, tHZ 150 ns RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31

RECEIVER

Propagation Delay, Low to High tRPLH 94 110 ns CL = 15 pF, see Figure 27 and Figure 30

Propagation Delay, High to Low tRPHL 95 110 ns CL = 15 pF, see Figure 27 and Figure 30

Output Skew1 tSKEW 1 12 ns CL = 15 pF, see Figure 27 and Figure 30

Enable Time tZL, tZH 15 ns RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32

Disable Time tLZ, tHZ 15 ns RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32

1 Guaranteed by design.

ADM2587E TIMING SPECIFICATIONS

TA = −40°C to +85°C.

Table 3.

Parameter Symbol Min Typ Max Unit Test Conditions

DRIVER

Maximum Data Rate 500 kbps

Propagation Delay, Low to High tDPLH 250 503 700 ns RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29

Propagation Delay, High to Low tDPHL 250 510 700 ns RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29

Output Skew tSKEW 7 100 ns RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29

Rise Time/Fall Time tDR, tDF 200 1100 ns RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29

Enable Time

, t

2.5

µs

= 110 Ω, C

= 50 pF, see Figure 26 and Figure 31

Disable Time tLZ, tHZ 200 ns RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31

RECEIVER

Propagation Delay, Low to High

RPLH

200

= 15 pF, see Figure 27 and Figure 30

Propagation Delay, High to Low tRPHL 95 200 ns CL = 15 pF, see Figure 27 and Figure 30

Output Skew tSKEW 4 30 ns CL = 15 pF, see Figure 27 and Figure 30

Enable Time tZL, tZH 15 ns RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32

Disable Time tLZ, tHZ 15 ns RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32

ADM2582E/ADM2587E PACKAGE CHARACTERISTICS

Table 4.

Parameter Symbol Min Typ Max Unit Test Conditions

Resistance (Input-to-Output)1 RI-O 1012 Ω

Capacitance (Input-to-Output)1 CI-O 3 pF f = 1 MHz

Input Capacitance2 CI 4 pF

1 Device considered a 2-terminal device: short together Pin 1 to Pin 10 and short together Pin 11 to Pin 20.

2 Input capacitance is from any input data pin to ground.

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 6 of 22

ADM2582E/ADM2587E REGULATORY INFORMATION

Table 5. ADM2582E/ADM2587E Approvals

Organization Approval Type Notes

Recognized under the Component

Recognition Program of Underwriters

Laboratories, Inc.

In accordance with UL 1577, each ADM2582E/ADM2587E is proof tested

by applying an insulation test voltage ≥ 3000 V rms for 1 second.

VDE

Certified according to DIN EN 60747-5-2

(VDE 0884 Part 2): 2003-01

In accordance with DIN EN 60747-5-2, each ADM2582E/ADM2587E is

proof tested by applying an insulation test voltage ≥ 1050 VPEAK for

1 second.

ADM2582E/ADM2587E INSULATION AND SAFETY-RELATED SPECIFICATIONS

Table 6.

Parameter Symbol Value Unit Conditions

Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration

Minimum External Air Gap (Clearance) L(I01) 7.7 mm Measured from input terminals to output terminals,

shortest distance through air

Minimum External Tracking (Creepage) L(I02) 7.6 mm Measured from input terminals to output terminals,

shortest distance along body

Minimum Internal Gap (Internal Clearance)

0.017 min

Insulation distance through insulation

Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303-1

Isolation Group IIIa Material Group (DIN VDE 0110: 1989-01, Table 1)

ADM2582E/ADM2587E VDE 0884 INSULATION CHARACTERISTICS

This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by

means of protective circuits.

An asterisk (*) on packages denotes VDE 0884 Part 2 approval.

Table 7.

Description Conditions Symbol Characteristic Unit

CLASSIFICATIONS

Installation Classification per DIN VDE 0110 for

Rated Mains Voltage

≤150 V rms I to IV

≤300 V rms I to III

≤400 V rms

I to II

Climatic Classification 40/85/21

Pollution Degree DIN VDE 0110, see Table 1 2

VOLTAGE

Maximum Working Insulation Voltage VIORM 560 V peak

Input-to-Output Test Voltage VPR

Method b1 VIORM × 1.875 = VPR, 100% production tested,

tm = 1 sec, partial discharge < 5 pC

1050 V peak

Method a

After Environmental Tests, Subgroup 1 VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC 896 V peak

After Input and/or Safety Test,

Subgroup 2/Subgroup 3

VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC 672 V peak

Highest Allowable Overvoltage Transient overvoltage, tTR = 10 sec VTR 4000 V peak

SAFETY-LIMITING VALUES Maximum value allowed in the event of a failure

Case Temperature TS 150 °C

Input Current IS, INPUT 265 mA

Output Current

OUTPUT

335

Insulation Resistance at TS VIO = 500 V RS >109 Ω

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 7 of 22

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted. All voltages are relative to

their respective ground.

Table 8.

Parameter Rating

VCC −0.5 V to +7 V

Digital Input Voltage (DE, RE, TxD) −0.5 V to VDD + 0.5 V

Digital Output Voltage (RxD) −0.5 V to VDD + 0.5 V

Driver Output/Receiver Input Voltage −9 V to +14 V

Operating Temperature Range −40°C to +85°C

Storage Temperature Range −55°C to +150°C

ESD (Human Body Model) on

A, B, Y, and Z pins

±15 kV

ESD (Human Body Model) on Other Pins ±2 kV

Thermal Resistance θJA 50°C/W

Lead Temperature

Soldering (10 sec) 260°C

Vapor Phase (60 sec) 215°C

Infrared (15 sec) 220°C

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

Table 9. Maximum Continuous Working Voltage1

Parameter Max Unit Reference Standard

AC Voltage

Bipolar Waveform

424

V peak

50-year minimum

lifetime

Unipolar Waveform

Basic Insulation 560 V peak Maximum approved

working voltage per

VDE 0884 Part 2

DC Voltage

Basic Insulation

560

V peak

Maximum approved

working voltage per

VDE 0884 Part 2

1 Refers to continuous voltage magnitude imposed across the isolation

barrier. See the Insulation Lifetime section for more details.

ESD CAUTION

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 8 of 22

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GND

CC 2

GND

RxD

GND

ISOIN

GND

TxD

GND

CC 8

GND

ISOOUT

GND

110

GND

NOTES

1. PIN 12 AND PIN 19 MUST BE

CONNECTED E X TERNAL LY.

ADM2582E

ADM2587E

TOP VIEW

(No t t o Scal e)

08111-002

Figure 2. Pin Configuration

Table 10. Pin Function Description

Pin No. Mnemonic Description

1 GND1 Ground, Logic Side.

2 VCC Logic Side Power Supply. It is recommended that a 0.1 µF and a 0.01 µF decoupling capacitor be fitted between

Pin 2 and Pin 1. See Figure 35 for layout recommendations.

3 GND1 Ground, Logic Side.

RxD

Receiver Output Data. This output is high when (A − B) ≥ −30 mV and low when (A − B) ≤ –200 mV.

The output is tristated when the receiver is disabled, that is, when RE is driven high.

5 RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver; driving it

high disables the receiver.

6 DE Driver Enable Input. Driving this input high enables the driver; driving it low disables the driver.

7 TxD Driver Input. Data to be transmitted by the driver is applied to this input.

8 VCC Logic Side Power Supply. It is recommended that a 0.1 µF and a 10 µF decoupling capacitor be fitted between

Pin 8 and Pin 9. See Figure 35 for layout recommendations.

9 GND1 Ground, Logic Side.

10 GND1 Ground, Logic Side.

11, 14 GND2 Ground for Isolated DC-to-DC Converter. It is recommended to connect Pin 11 and Pin 14 together through one

ferrite bead to PCB ground. See Figure 35 for layout recommendations.

12 VISOOUT Isolated Power Supply Output. This pin must be connected externally to VISOIN. It is recommended that a reservoir

capacitor of 10 µF and a decoupling capacitor of 0.1 µF be fitted between Pin 12 and Pin 11.

13 Y Driver Noninverting Output

15 Z Driver Inverting Output

16 GND2 Ground, Bus Side. Do not connect this pin to Pin 14 and Pin 11. See Figure 35 for layout recommendations.

Receiver Inverting Input.

18 A Receiver Noninverting Input.

19 VISOIN Isolated Power Supply Input. This pin must be connected externally to VISOOUT. It is recommended that a

0.1 µF and a 0.01 µF decoupling capacitor be fitted between Pin 19 and Pin 20. Connect this pin through a ferrite

bead and short trace length to VISOOUT for operation. See Figure 35 for layout recommendations.

20 GND2 Ground, Bus Side.

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 9 of 22

TYPICAL PERFORMANCE CHARACTERISTICS

100

120

140

160

180

–40 –15 10 35 60 85

SUPPLY CURRENT, I

(mA)

TEMPERAT URE ( °C)

NO LOAD

= 120Ω

= 54Ω

08111-103

Figure 3. ADM2582E Supply Current (ICC) vs. Temperature

(Data Rate = 16 Mbps, DE = 3.3 V, VCC = 3.3 V)

100

120

140

–40 –15 10 35 60 85

SUPPLY CURRENT, I

(mA)

TEMPERAT URE ( °C)

= 120Ω

= 54Ω

08111-104

NO LOAD

Figure 4. ADM2582E Supply Current (ICC) vs. Temperature

(Data Rate = 16 Mbps, DE = 5 V, VCC = 5 V)

100

120

–40 –15 10 35 60 85

SUPPLY CURRENT, ICC (mA)

TEMPERAT URE ( °C)

RL = 120Ω

RL = 54Ω

08111-106

NO LOAD

Figure 5. ADM2587E Supply Current (ICC) vs. Temperature

(Data Rate = 500 kbps, DE = 5 V, VCC = 5 V)

100

120

140

–40 –15 10 35 60 85

SUPPLY CURRENT, I

(mA)

TEMPERAT URE ( °C)

= 120Ω

= 54Ω

08111-105

NO LOAD

Figure 6. ADM2587E Supply Current (ICC) vs. Temperature

(Data Rate = 500 kbps, DE = 3.3 V, VCC = 3.3 V)

DRIVE R P ROPAGATIO N DE LAY (ns)

TEMPERATURE (°C)

tDPHL

tDPLH

–40 –15 10 35 60 85

08111-107

Figure 7. ADM2582E Differential Driver Propagation Delay vs. Temperature

400

420

440

460

480

500

520

540

560

580

600

DRIVE R P ROPAGATIO N DE LAY ( ns)

TEMPERATURE (°C)

tDPHL

tDPLH

–40 –15 10 35 60 85

08111-108

Figure 8. ADM2587E Differential Driver Propagation Delay vs. Temperature

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 10 of 22

CH1 2.0V

CH3 2.0V CH2 2.0V

TxD

M10.00ns A CH1 1. 28V

08111-109

Figure 9. ADM2582E Driver Propagation Delay

CH1 2.0V

CH3 2.0V CH2 2.0V M200ns A CH1 2.56V

08111-110

TxD

Figure 10. ADM2587E Driver Propagation Delay

–70

–60

–50

–40

–30

–20

–10

012345

OUT P UT CURRENT (mA)

OUTPUT VOLTAGE (V)

08111-111

Figure 11. Receiver Output Current vs. Receiver Output High Voltage

01 2 3 4 5

OUT P UT CURRENT (mA)

OUTPUT VOLTAGE (V)

08111-112

Figure 12. Receiver Output Current vs. Receiver Output Low Voltage

4.65

4.66

4.67

4.68

4.69

4.70

4.71

4.72

4.73

4.74

4.75

OUTPUT VOLTAGE(V)

TEMPERATURE (°C)

–40 –15 10 35 60 85

08111-113

Figure 13. Receiver Output High Voltage vs. Temperature

0.20

0.22

0.24

0.26

0.28

0.30

0.32

OUTPUT VOLTAGE (V)

TEMPERATURE (°C)

–40 –15 10 35 60 85

08111-114

Figure 14. Receiver Output Low Voltage vs. Temperature

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 11 of 22

RxD

CH1 2.0V

CH3 2.0V CH2 2.0V M10.00ns A CH1 2.56V

08111-115

Figure 15. ADM2582E Receiver Propagation Delay

CH1 2.0V

CH3 2.0V CH2 2.0V M10.00ns A CH1 2. 56V

08111-116

RxD

Figure 16. ADM2587E Receiver Propagation Delay

–40 –15 10 35 60 85

RECEIVER PROPAGATION DELAY (ns)

TEMPERAT URE ( °C)

tRPHL

tRPLH

08111-117

Figure 17. ADM2582E Receiver Propagation Delay vs. Temperature

100

RECEI V E R P ROPAGATIO N DE LAY (ns)

TEMPERATURE (°C)

tRPHL

tRPLH

–40 –15 10 35 60 85

08111-118

Figure 18. ADM2587E Receiver Propagation Delay vs. Temperature

3.26

3.27

3.28

3.29

3.30

3.31

3.32

3.33

ISOLAT ED SUPPLY VOL T AGE (V)

NO LOAD

= 120Ω

= 54Ω

–40 –15 10 35 60 85

TEMPERAT URE ( °C)

08111-119

Figure 19. ADM2582E Isolated Supply Voltage vs. Temperature

(VCC = 3.3 V, Data Rate = 16 Mbps)

3.26

3.27

3.28

3.29

3.31

3.33

3.35

3.30

3.32

3.34

3.36

ISOLAT ED SUPPLY VOL T AGE (V)

NO LOAD

= 120Ω

= 54Ω

–40 –15 10 35 60 85

TEMPERAT URE ( °C)

08111-120

Figure 20. ADM2582E Isolated Supply Voltage vs. Temperature

(VCC = 5 V, Data Rate = 16 Mbps)

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 12 of 22

–40 –15 10 35 60 85

ISOLATED SUPPLY CURRENT (mA)

TEMPERAT URE ( °C)

NO LOAD

= 120Ω

= 54Ω

08111-121

Figure 21. ADM2582E Isolated Supply Current vs. Temperature

(VCC = 3.3 V, Data Rate = 16 Mbps)

–40 –15 10 35 60 85

ISOLATED SUPPLY CURRENT (mA)

TEMPERAT URE ( °C)

NO LOAD

RL = 120Ω

RL = 54Ω

08111-122

Figure 22. ADM2587E Isolated Supply Current vs. Temperature

(VCC = 3.3 V, Data Rate = 500 kbps)

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 13 of 22

TEST CIRCUITS

TxD V

OD2

08111-003

Figure 23. Driver Voltage Measurement

TxD VOD3

VTEST

375Ω

60Ω

375Ω

08111-004

Figure 24. Driver Voltage Measurement

TxD

08111-005

Figure 25. Driver Propagation Delay

TxD

S1 S2

VCC

110Ω

VOUT

50pF

08111-006

Figure 26. Driver Enable/Disable

VOUT

08111-007

Figure 27. Receiver Propagation Delay

OUT

+1.5V

–1.5V

RE IN

08111-008

Figure 28. Receiver Enable/Disable

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 14 of 22

SWITCHING CHARACTERISTICS

DPLH

DPHL

1/2V

90% POINT

10% POINT

90% POINT

10% POINT

DIFF

= V

(Y)

– V

(Z)

–V

DIFF

SKEW

= │t

DPHL

–t

DPLH

│

/2 V

08111-009

Figure 29. Driver Propagation Delay, Rise/Fall Timing

A – B

RxD

1.5V 1.5V

RPLH

RPHL

SKEW = |

RPLH

–

RPHL

08111-010

Figure 30. Receiver Propagation Delay

Y, Z

0.5V

– 0.5V

+ 0.5V

2.3V

08111-011

Figure 31. Driver Enable/Disable Timing

OUTPUT LOW

OUTPUT HIGH

1.5V

0.5VCC 0.5VCC

0.7V

0.3V

– 0.5V

+ 0.5V V

08111-012

Figure 32. Receiver Enable/Disable Timing

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 15 of 22

CIRCUIT DESCRIPTION

SIGNAL ISOLATION

The ADM2582E/ADM2587E signal isolation is implemented on

the logic side of the interface. The part achieves signal isolation

by having a digital isolation section and a transceiver section

(see Figure 1). Data applied to the TxD and DE pins and referenced

to logic ground (GND1) are coupled across an isolation barrier

to appear at the transceiver section referenced to isolated ground

(GND2). Similarly, the single-ended receiver output signal,

referenced to isolated ground in the transceiver section, is

coupled across the isolation barrier to appear at the RXD pin

referenced to logic ground.

POWER ISOLATION

The ADM2582E/ADM2587E power isolation is implemented

using an isoPower integrated isolated dc-to-dc converter. The

dc-to-dc converter section of the ADM2582E/ADM2587E works

on principles that are common to most modern power supplies. It

is a secondary side controller architecture with isolated pulse-width

modulation (PWM) feedback. VCC power is supplied to an

oscillating circuit that switches current into a chip-scale air core

transformer. Power transferred to the secondary side is rectified

and regulated to 3.3 V. The secondary (VISO) side controller

regulates the output by creating a PWM control signal that is

sent to the primary (VCC) side by a dedicated iCoupler data

channel. The PWM modulates the oscillator circuit to control

the power being sent to the secondary side. Feedback allows for

significantly higher power and efficiency.

TRUTH TABLES

The truth tables in this section use the abbreviations found in

Table 11.

Table 11. Truth Table Abbreviations

Letter Description

H High level

L Low level

X Don’t care

Z High impedance (off)

Disconnected

Table 12. Transmitting (see Table 11 for Abbreviations)

Inputs Outputs

DE TxD Y Z

H H H L

H L L H

L X Z Z

Table 13. Receiving (see Table 11 for Abbreviations)

Inputs Output

A − B RE RxD

≥ −0.03 V L or NC H

≤ −0.2 V L or NC L

−0.2 V < A − B < −0.03 V

L or NC

Inputs open L or NC

X H

THERMAL SHUTDOWN

The ADM2582E/ADM2587E contain thermal shutdown circuitry

that protects the parts from excessive power dissipation during

fault conditions. Shorting the driver outputs to a low impedance

source can result in high driver currents. The thermal sensing

circuitry detects the increase in die temperature under this

condition and disables the driver outputs. This circuitry is

designed to disable the driver outputs when a die temperature

of 150°C is reached. As the device cools, the drivers are reenabled

at a temperature of 140°C.

OPEN- AND SHORT-CIRCUIT, FAIL-SAFE RECEIVER

INPUTS

The receiver inputs have open- and short-circuit, fail-safe

features that ensure that the receiver output is high when the

inputs are open or shorted. During line-idle conditions, when no

driver on the bus is enabled, the voltage across a terminating

resistance at the receiver input decays to 0 V. With traditional

transceivers, receiver input thresholds specified between −200 mV

and +200 mV mean that external bias resistors are required on the

A and B pins to ensure that the receiver outputs are in a known

state. The short-circuit, fail-safe receiver input feature eliminates

the need for bias resistors by specifying the receiver input threshold

between −30 mV and −200 mV. The guaranteed negative threshold

means that when the voltage between A and B decays to 0 V, t h e

receiver output is guaranteed to be high.

DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY

The digital signals transmit across the isolation barrier using

iCoupler technology. This technique uses chip-scale transformer

windings to couple the digital signals magnetically from one

side of the barrier to the other. Digital inputs are encoded into

waveforms that are capable of exciting the primary transformer

winding. At the secondary winding, the induced waveforms are

decoded into the binary value that was originally transmitted.

Positive and negative logic transitions at the isolator input cause

narrow (~1 ns) pulses to be sent to the decoder via the transformer.

The decoder is bistable and is, therefore, either set or reset by the

pulses, indicating input logic transitions. In the absence of logic

transitions at the input for more than 1 µs, periodic sets of refresh

pulses indicative of the correct input state are sent to ensure dc

correctness at the output. If the decoder receives no internal pulses

of more than approximately 5 µs, the input side is assumed to be

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 16 of 22

unpowered or nonfunctional, in which case, the isolator output

is forced to a default state by the watchdog timer circuit.

This situation should occur in the ADM2582E/ADM2587E

devices only during power-up and power-down operations. The

limitation on the ADM2582E/ADM2587E magnetic field

immunity is set by the condition in which induced voltage in

the transformer receiving coil is sufficiently large to either

falsely set or reset the decoder. The following analysis defines

the conditions under which this can occur.

The 3.3 V operating condition of the ADM2582E/ADM2587E

is examined because it represents the most susceptible mode of

operation. The pulses at the transformer output have an amplitude

of >1.0 V. The decoder has a sensing threshold of about 0.5 V,

thus establishing a 0.5 V margin in which induced voltages can

be tolerated. The voltage induced across the receiving coil is

given by

V = (−dβ/dt)Σπrn2; n = 1, 2, … , N

where:

β is magnetic flux density (gauss).

N is the number of turns in the receiving coil.

rn is the radius of the nth turn in the receiving coil (cm).

Given the geometry of the receiving coil in the ADM2582E/

ADM2587E and an imposed requirement that the induced

voltage be, at most, 50% of the 0.5 V margin at the decoder, a

maximum allowable magnetic field is calculated as shown in

Figure 33.

MAG NETI C FI ELD F RE QUENCY ( Hz )

100

MAXIMUM ALLOWABLE MAGNETIC FLUX

DENSI TY ( kGau ss)

0.001 1M

0.01

1k 10k 10M

0.1

100M

100k

08111-019

Figure 33. Maximum Allowable External Magnetic Flux Density

For example, at a magnetic field frequency of 1 MHz, the

maximum allowable magnetic field of 0.2 kgauss induces a

voltage of 0.25 V at the receiving coil. This is about 50% of the

sensing threshold and does not cause a faulty output transition.

Similarly, if such an event occurs during a transmitted pulse

(and is of the worst-case polarity), it reduces the received pulse

from >1.0 V to 0.75 V, which is still well above the 0.5 V sensing

threshold of the decoder.

The preceding magnetic flux density values correspond to

specific current magnitudes at given distances from the

ADM2582E/ADM2587E transformers. Figure 34 expresses

these allowable current magnitudes as a function of frequency

for selected distances. As shown in Figure 34, the ADM2582E/

ADM2587E are extremely immune and can be affected only by

extremely large currents operated at high frequency very close

to the component. For the 1 MHz example, a 0.5 kA current must

be placed 5 mm away from the ADM2582E/ADM2587E to affect

component operation.

MAG NETI C FI E LD FRE QUENCY ( Hz )

MAXI MUM AL LO WABLE CURRE NT (kA)

100

0.1

0.011k 10k 100M100k 1M 10M

DISTANCE = 5mm

DISTANCE = 1m

DISTANCE = 100mm

08111-020

Figure 34. Maximum Allowable Current for Various

Current-to-ADM2582E/ADM2587E Spacings

Note that in combinations of strong magnetic field and high

frequency, any loops formed by printed circuit board (PCB)

traces can induce error voltages sufficiently large to trigger the

thresholds of succeeding circuitry. Take care in the layout of

such traces to avoid this possibility.

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 17 of 22

APPLICATIONS INFORMATION

PCB LAYOUT AND ELECTROMAGNETIC

INTERFERENCE (EMI)

The ADM2582E/ADM2587E isolated RS-422/RS-485 transceiver

contains an isoPower integrated dc-to-dc converter, requiring

no external interface circuitry for the logic interfaces. Power

supply bypassing is required at the input and output supply pins

(see Figure 35). The power supply section of the ADM2582E/

ADM2587E uses a 180 MHz oscillator frequency to pass power

efficiently through its chip-scale transformers. In addition, the

normal operation of the data section of the iCoupler introduces

switching transients on the power supply pins.

Bypass capacitors are required for several operating frequencies.

Noise suppression requires a low inductance, high frequency

capacitor, whereas ripple suppression and proper regulation

require a large value capacitor. These capacitors are connected

between Pin 1 (GND1) and Pin 2 (VCC) and Pin 8 (VCC) and

Pin 9 (GND1) for VCC. The VISOIN and VISOOUT capacitors are

connected between Pin 11 (GND2) and Pin 12 (VISOOUT) and

Pin 19 (VISOIN) and Pin 20 (GND2). To suppress noise and reduce

ripple, a parallel combination of at least two capacitors is required

with the smaller of the two capacitors located closest to the device.

The recommended capacitor values are 0.1 µF and 10 µF for

VISOOUT at Pin 11 and Pin 12 and VCC at Pin 8 and Pin 9. Capacitor

values of 0.01 µF and 0.1 µF are recommended for VISOIN at

Pin 19 and Pin 20 and VCC at Pin 1 and Pin 2. The recommended

best practice is to use a very low inductance ceramic capacitor,

or its equivalent, for the smaller value. The total lead length

between both ends of the capacitor and the input power supply

pin should not exceed 10 mm.

The dc-to-dc converter section of the ADM2582E/ADM2587E

components must operate, out of necessity, at a very high

frequency to allow efficient power transfer through the small

transformers. This creates high frequency currents that can

propagate in circuit board ground and power planes, causing edge

and dipole radiation.

The ADM2582E/ADM2587E features an internal split paddle,

lead frame on the bus side. For the best noise suppression, filter

both the GND2 pins (Pin 11 and Pin 14) and VISOOUT signals of

the integrated dc-to-dc converter for high frequency currents.

Use surface-mount ferrite beads in series with the signals before

routing back to the device. See Figure 35 for the recommended

PCB layout. The impedance of the ferrite bead is chosen to be

about 2 kΩ between the 100 MHz and 1 GHz frequency range

to reduce the emissions at the 180 MHz primary switching

frequency and the 360 MHz secondary side rectifying

frequency and harmonics.

To pass the EN55022 radiated emissions standard, the following

additional layout guidelines are recommended:

• Do not connect the VISOOUT pin to a power plane;

connect between VISOOUT and VISOIN using a PCB trace.

Ensure that VISOIN (Pin 19) connects through the L1

ferrite to VISOOUT (Pin 12), as shown in Figure 35.

• If using a four layer PCB, place an embedded stitching

capacitor between GND1 and GND2 using internal

layers of the PCB planes. An embedded PCB capacitor

is created when two metal planes in a PCB overlap

each other and are separated by dielectric material.

This capacitor provides a return path for high

frequency common-mode noise currents across the

isolation gap.

• If using a two layer PCB, place a high voltage discrete

capacitor that connects between GND1 (Pin 10) and

GND2 (Pin 11). This capacitor provides a return path

for high frequency common-mode noise currents

across the isolation gap.

• Ensure that GND2 (Pin 14) connects to GND2 (Pin 11)

on the inside (device side) of the C1 100 nF capacitor.

• Ensure that the C1 capacitor connects between VISOOUT

(Pin 12) and GND2 (Pin 11) on the device side of the

L1 and L2 ferrites.

• Ensure that GND2 (Pin 16) is connected to GND2

(Pin 11) on the outside (bus side) of the L2 ferrite, as

shown in Figure 35.

• Ensure that there is a keep out area for the GND2

plane in the PCB layout around the L1 and L2 ferrites.

The keep out area means there must not be a GND2

fill on any layer below the L1 and L2 ferrites.

• Locate the power delivery circuit in close proximity to

the ADM2582E/ADM2587E device, so that the VCC

trace is as short as possible.

See the AN-1349 Application Note, PCB Implementation Guidelines

to Minimize Radiated Emissions on the ADM2582E/ADM2587E RS-

485/RS-422 Transceivers, for more information. Evaluation boards

and user guides are available for two layer and four layer PCB

EN55022 radiated emissions compliant designs. See UG-916 and

UG-044 for more information.

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 18 of 22

TRANSCEIVER

DIGITAL

ISOLATION

isoPOWER

DC-TO-DC CONVERT ER

CC 2

GND

ISOIN

516

615

GND

CC 813

GND

ISOOUT

GND

110

10µF

10nF

100nF

STIT CHING CAPACITOR ACROS S

ISOLATI O N BARRIE R REQ UIRED

FOR EN55022/CI S PR22 CL AS S B

FERRITE

BEADS

PCB KEE P O UT AREA

PCB T RACE

CONNECTING

PI N 11 AND PI N 14

100nF 100nF

GND

100nF

10nF

08111-035

Figure 35. Recommended PCB Layout

In applications involving high common-mode transients, ensure

that board coupling across the isolation barrier is minimized.

Furthermore, design the board layout such that any coupling

that does occur equally affects all pins on a given component

side. Failure to ensure this can cause voltage differentials between

pins exceeding the absolute maximum ratings for the device,

thereby leading to latch-up and/or permanent damage.

The ADM2582E/ADM2587E dissipate approximately 650 mW

of power when fully loaded. Because it is not possible to apply a

heat sink to an isolation device, the devices primarily depend

on heat dissipation into the PCB through the GND pins. If the

devices are used at high ambient temperatures, provide a thermal

path from the GND pins to the PCB ground plane. The board

layout in Figure 35 shows enlarged pads for Pin 1, Pin 3, Pin 9,

Pin 10, Pin 11, Pin 14, Pin 16, and Pin 20. Implement multiple

vias from the pad to the ground plane to reduce the temperature

inside the chip significantly. The dimensions of the expanded

pads are at the discretion of the designer and dependent on the

available board space.

INSULATION LIFETIME

All insulation structures eventually break down when subjected to

voltage stress over a sufficiently long period. The rate of insulation

degradation is dependent on the characteristics of the voltage

waveform applied across the insulation. Analog Devices conducts

an extensive set of evaluations to determine the lifetime of the

insulation structure within the ADM2582E/ADM2587E.

Accelerated life testing is performed using voltage levels higher

than the rated continuous working voltage. Acceleration factors for

several operating conditions are determined, allowing calculation

of the time to failure at the working voltage of interest. The values

shown in Table 9 summarize the peak voltages for 50 years of

service life in several operating conditions. In many cases, the

working voltage approved by agency testing is higher than the

50-year service life voltage. Operation at working voltages higher

than the service life voltage listed leads to premature insulation

failure.

The insulation lifetime of the ADM2582E/ADM2587E depends

on the voltage waveform type imposed across the isolation barrier.

The iCoupler insulation structure degrades at different rates,

depending on whether the waveform is bipolar ac, unipolar ac,

or dc. Figure 36, Figure 37, and Figure 38 illustrate these different

isolation voltage waveforms.

Bipolar ac voltage is the most stringent environment. A 50-year

operating lifetime under the bipolar ac condition determines

the Analog Devices recommended maximum working voltage.

In the case of unipolar ac or dc voltage, the stress on the insulation

is significantly lower. This allows operation at higher working

voltages while still achieving a 50-year service life. The working

voltages listed in Table 9 can be applied while maintaining the

50-year minimum lifetime, provided the voltage conforms to either

the unipolar ac or dc voltage cases. Any cross insulation voltage

waveform that does not conform to Figure 37 or Figure 38 should

be treated as a bipolar ac waveform, and its peak voltage should

be limited to the 50-year lifetime voltage value listed in Table 9.

RATED P E AK V OLTAGE

08111-021

Figure 36. Bipolar AC Waveform

RAT E D P EAK VOL TAGE

08111-023

Figure 37. DC Waveform

RATED P EAK VOL T AGE

NOTES

1. THE V OL TAGE IS SHOW N AS SINUSO DIAL FO R IL LUSTRATIO N

PURPOSES ONLY. IT I S MEANT TO REPRESENT ANY VOLTAGE

WAV E FO RM VARYING BETWEEN 0 AND SOME LIMITI NG VALUE.

THE LI M IT ING V A L UE CAN BE P OSITIVE OR NEGAT IVE, BUT THE

VO LT AGE CANNOT CROSS 0 V .

08111-022

Figure 38. Unipolar AC Waveform

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 19 of 22

ISOLATED POWER SUPPLY CONSIDERATIONS

The typical output voltage of the integrated isoPower dc-to-dc

isolated supply is 3.3 V. The isolated supply in the ADM2587E is

capable of supplying a current of 55 mA when the junction

temperature of the device is kept below 120°C. It is important to

note that the current available on the VISOOUT pin is the total current

available and includes the current required to supply the

internal RS-485 circuitry.

The ADM2587E can typically supply 15 mA externally on

VISOOUT when the driver is switching at 500 kbps loaded with 54 Ω,

while the junction temperature of the part is less than 120°C.

Table 14. Typical Maximum External Current Available

on VISOOUT

External Load Current (mA) RT System Configuration

15 54 Ω Double terminated

bus with RT = 110 Ω

29 120 Ω Single terminated bus

46 Unloaded Unterminated bus

The ADM2582E typically has no current available externally

on VISOOUT.

When external current is drawn from the VISOOUT pin, there is

an increased risk of generating radiated emissions due to the

high frequency switching elements used in the isoPower dc to-dc

converter. Special care must be taken during PCB layout to

meet emissions standards. See Application Note AN-0971,

Control of Radiated Emissions with isoPower Devices, for details

on board layout considerations.

ADM2582E/ADM2587E

TxD

RxD

ISOLATION

BARRIER

TRANSCEIVER

GND

ENCODE

DECODE

DECODE D

DECODE

ENCODE

OSCILLATOR RECTIFIER

REGULATOR

EXTERNAL

LOAD

ISOOUT

DIGITAL ISOLATION iCoupler

isoPower DC-TO-DC CONVERTER

ISOIN

08111-038

500kbps

GND

Figure 39. ADM2587E Typical Maximum External Current Measurements

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 20 of 22

TYPICAL APPLICATIONS

An example application of the ADM2582E/ADM2587E for a full-

duplex RS-485 node is shown in the circuit diagram of Figure 40.

Refer to the PCB Layout and Electromagnetic Interference

(EMI) section for the recommended placement of the capacitors

shown in this circuit diagram. Placement of the RT termination

resistors depends on the location of the node and the network

configuration. Refer to the AN-960 Application Note,

RS-485/ RS-422 Circuit Implementation Guide, for guidance on

termination.

Figure 41 and Figure 42 show typical applications of the

ADM2582E/ADM2587E in half duplex and full duplex RS-485

network configurations. Up to 256 transceivers can be connected to

the RS-485 bus. To minimize reflections, terminate the line at the

receiving end in its characteristic impedance and keep stub lengths

off the main line as short as possible. For half-duplex operation, this

means that both ends of the line must be terminated because either

end can be the receiving end.

ADM2582E/ADM2587E

TxD

RxD

ISOLATION

BARRIER

TRANSCEIVER

GND1

GND2

ENCODE

DECODE

DECODE D

OSCILLATOR RECTIFIER

REGULATOR

VISOOUT

VCC

VISOIN

MICROCONTROLLER

AND UART

3.3V/5V POWER

SUPPLY

100nF 10µF 100nF 10nF

100nF 10µF

100nF 10nF

DIGITAL ISOLATION iCoupler

isoPower DC-TO- DC CONVE RTER

08111-124

Figure 40. Example Circuit Diagram Using the ADM2582E/ADM2587E

Data Sheet ADM2582E/ADM2587E

Rev. G | Page 21 of 22

NOTES

1. RT IS EQ UAL TO THE CHARACTERIST IC I M P E DANCE OF THE CABLE.

2. ISOLATION NOT SHOWN.

A B Z YA B Z Y

RDRD

ADM2582E/

ADM2587E

ADM2582E/

ADM2587E

ADM2582E/

ADM2587E

RxD RE DE TxDRxD RE DE TxD

RTRT

RxD

TxD

RxD

TxD

ADM2582E/

ADM2587E

MAXIMUM NUMBE R OF TRANSCEIVERS ON BUS = 256

08111-027

Figure 41. ADM2582E/ADM2587E Typical Half-Duplex RS-485 Network

NOTES

1. RT IS EQ UAL TO THE CHARACTERIST IC I M P E DANCE OF THE CABLE.

2. ISOLATION NOT SHOWN.

AB Z Y

A B Z Y

TxD

RxD

ADM2582E/

ADM2587E

ADM2582E/

ADM2587E

ADM2582E/

ADM2587E

SLAVE

RxD

TxD

ADM2582E/

ADM2587E

MASTER

SLAVE

RxD RE DE TxD

MAXIMUM NUMBE R OF NODES = 2 56

08111-028

Figure 42. ADM2582E/ADM2587E Typical Full Duplex RS-485 Network

ADM2582E/ADM2587E Data Sheet

Rev. G | Page 22 of 22

OUTLINE DIMENSIONS

CONTROLLING DIMENSIONSAREIN MILLIMETERS; INCHDIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

COMPLIANT TO JEDEC STANDARDSMS-013-AC

13.00(0.5118)

12.60 (0.4961)

0.30(0.0118)

0.10 (0.0039)

2.65(0.1043)

2.35 (0.0925)

10.65 (0.4193)

10.00(0.3937)

7.60 (0.2992)

7.40 (0.2913)

0.75(0.0295)

0.25(0.0098)

45°

1.27 (0.0500)

0.40 (0.0157)

COPLANARITY

0.100.33 (0.0130)

0.20(0.0079)

0.51 (0.0201)

0.31 (0.0122)

SEATING

PLANE

8°

0°

20 11

1.27

(0.0500)

BSC

06-07-2006-A

Figure 43. 20-Lead Standard Small Outline Package [SOIC_W]

Wide Body

(RW-20)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model1

Data Rate

(Mbps)

Temperature

Range Package Description

Package

Option

ADM2582EBRWZ 16 −40°C to +85°C 20-Lead SOIC_W RW-20

ADM2582EBRWZ-REEL7 16 −40°C to +85°C 20-Lead SOIC_W RW-20

ADM2587EBRWZ 0.5 −40°C to +85°C 20-Lead SOIC_W RW-20

ADM2587EBRWZ-REEL7 0.5 −40°C to +85°C 20-Lead SOIC_W RW-20

EVAL-ADM2582EEBZ ADM2582E Evaluation Board

EVAL-ADM2582EEMIZ ADM2582E EMI Compliant Evaluation Board

EVAL-ADM2587EEBZ ADM2587E Evaluation Board

EVAL-ADM2587EEMIZ ADM2587E EMI Compliant Evaluation Board

EVAL-ADM2587EARDZ ADM2587E Arduino Evaluation Board

EVAL-ADM2587ERPIZ ADM2587E Raspberry Pi Evaluation Board

EVAL-ADM2587EEB2Z ADM2587E Isolated RS-485 Repeater Evaluation Board

1 Z = RoHS Compliant Part.

registered trademarks are the property of their respective owners.

D08111-0-5/18(G)