840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
1
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
GENERAL DESCRIPTION
The ICS840031I is an IEEE 1394b Clock
Generator and a member of the HiPerClocksTM
family of high performance devices from ICS.
The ICS840031I uses a 24.576MHz crystal to
synthesize 98.304MHz. The ICS840031I has
excellent phase jitter performance, from 12KHz – 20MHz
integration range. The ICS840031I is packaged in a small
8-pin SOIC, making it ideal for use in systems with limited
board space.
FEATURES
•(1) LVCMOS/LVTTL output
•Crystal oscillator interface designed for a 24.576MHz,
18pF parallel resonant crystal
•Output frequency: 98.304MHz (typical)
•VCO range: 490MHz to 640MHz
•RMS phase jitter @ 98.304MHz, using a 24.576MHz crystal
(12KHz - 20MHz): 0.75ps (typical)
•RMS phase noise at 98.304MHz (typical)
Offset Noise Power
100Hz .............. -103.3 dBc/Hz
1KHz .............. -126.2 dBc/Hz
10KHz .............. -134.2 dBc/Hz
100KHz .............. -132.9 dBc/Hz
•3.3V core/1.8V output operating supply
•Lead-Free fully RoHS compliant
•-40°C to 85°C ambient operating temperature
HiPerClockS™
ICS
ICS840031I
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
VDD
XTAL_OUT
XTAL_IN
VDDA
1
2
3
4
VDDO
Q0
GND
PLL_SEL
8
7
6
5
BLOCK DIAGRAM PIN ASSIGNMENT
OSC Phase
Detector
VCO
589.824MHz w/
24.576MHz Ref.
M = ÷24
(fixed)
÷6
0
1
XTAL_IN
XTAL_OUT
PLL_SEL
Q0
FREQUENCY TABLE
stupnI ycneuqerFtuptuO
)zHM(
)zHM(ycneuqerFlatsyrC
675.42403.89
(Pullup)
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
2
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
TABLE 2. PIN CHARACTERISTICS
TABLE 1. PIN DESCRIPTIONS
rebmuNemaNepyTnoitpircseD
1V
DD
rewoP.nipylppuseroC
,2
3
,TUO_LATX
NI_LATX tupnI ,tupniehtsiNI_LATX.ecafretnirotallicsolatsyrC
.tuptuoehtsiTU
O_LATX
4V
ADD
rewoP.nipylppusgolanA
5LES_LLPtupnIpulluP.slevelecafretniLTTVL/SOMCVL.niptcelesLLP
6DNGrewoP.dnuorgylppusrewoP
70
QtuptuO .slevelecafretniLTTVL/SOMCVL.tuptuokcolcdedne-elgniS
8V
ODD
rewoP.nipylppustuptuO
:ETON
pulluP
.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotsrefer
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
C
DP
ecnaticapaCnoitapissiDrewoPV
DD
V=
ADD
V,V564.3=
ODD
V98.1=81Fp
R
PULLUP
rotsiseRpulluPtupnI 15kΩ
R
TUO
ecnadepmItuptuO 01 Ω
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
3
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ADD
egatloVylppuSgolanA 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 17.18.198.1V
I
DD
tnerruCylppuSrewoP 55Am
I
ADD
tnerruCylppuSgolanA 21Am
I
ODD
tnerruCylppuStuptuO 5Am
TABLE 4. CRYSTAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI-0.5V to VDD + 0.5 V
Outputs, VO-0.5V to VDDO + 0.5V
Package Thermal Impedance, θJA 112.7°C/W (0 lfpm)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnI 2V
DD
3.0+V
V
LI
egatloVwoLtupnI 3.0-8.0V
I
HI
tnerruChgiHtupnILES_LLPV
DD
V=
NI
V564.3=5Aµ
I
LI
tnerruCwoLtupnILES_LLPV
DD
V,V564.3=
NI
V0=051-Aµ
V
HO
1ETON;egatloVhgiHtuptuO 5.1V
V
LO
1ETON;egatloVwoLtuptuO 4.0V
05htiwdetanimretstuptuO:1ETON ΩVot
DD
,noitceSnoitamrofnItnemerusaeMretemaraPeeS.2/
."tiucriCtseTdaoLtuptuOV8.1/V3.3"
retemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
noitallicsOfoedoM latnemadnuF
ycneuqerF1=LES_F714.02675.42766.6
2zHM
)RSE(ecnatsiseRseireStnelaviuqE 05 Ω
ecnaticapaCtnuhS 7Fp
TABLE 5. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO 76.18403.8976.601zHM
t
)Ø(tij ;)modnaR(rettiJesahPSMR
1ETON
,zHM403.89=TUOf
)zHM02otzHK21( 57.0sp
t
R
t/
F
emiTllaF/esiRtuptuO%08ot%022.01sn
cdoelcyCytuDtuptuO 6445%
.tolPesioNesahPehtotreferesaelP:1ETON
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
4
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
TYPICAL PHASE NOISE AT 98.304MHZ
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
10 100 1k 10k 100k 1M 10M 100M
98.304MHz
RMS Phase Jitter (Random)
12KHz to 20MHz = 0.75ps (typical)
OFFSET FREQUENCY (HZ)
NOISE POWER dBc
Hz
Phase Noise Result by adding
a Filter to raw data
Raw Phase Noise Data
Filter
➤
➤
➤
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
5
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD OUTPUT RISE/FALL TIME
3.3V/1.8V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
2.4±0.9V
-0.9V±5%
Pulse Width
tPERIOD
tPW
tPERIOD
odc =
V
DD
2
Q0
GND
VDD,
VDDA
RMS PHASE JITTER
Phase Noise Mas
k
Offset Frequency
f1f2
Phase Noise Plot
RMS Jitter = Area Under the Masked Phase Noise Plot
Noise Power
Clock
Outputs
20%
80% 80%
20%
t
R
t
F
VDDO
0.9V±5%
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
6
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
APPLICATION INFORMATION
Figure 2. CRYSTAL INPUt INTERFACE
CRYSTAL INPUT INTERFACE
The ICS840031I has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2
below were determined using a 24.576MHz, 18pF
parallel resonant crystal and were chosen to minimize the
ppm error. The optimum C1 and C2 values can be slightly
adjusted for different board layouts.
POWER SUPPLY FILTERING T ECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS840031I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VDD, VDDA, and VDDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 1
illustrates how
a 10Ω resistor along with a 10µF and a .01µF bypass
capacitor should be connected to each VDDA pin. FIGURE 1. POWER SUPPLY FILTERING
10Ω
VDDA
10µF
.01µF
3.3V
.01µF
VDD
C1
33p
X1
18pF Parallel Crystal
C2
22p
XTAL_OUT
XTAL_IN
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
7
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS840031I is: 1787
TABLE 6. θJAVS. AIR FLOW TABLE FOR 8 LEAD SOIC
FIGURE 3. ICS840031I APPLICATION SCHEMATIC EXAMPLE
APPLICATION SCHEMATIC EXAMPLE
Figure 3
shows a schematic example of the ICS840031I. In this
example, a series termination, one of LVCMOS termination ap-
proaches, is shown. Additional LVCMOS termination approaches
are shown in the LVCMOS Termination Application Note. In this
example, an 18pF parallel resonant crystal is used. The C1=22pF
and C2=33pF are approximate values for frequency accuracy.
The C1 and C2 may be slightly adjusted for optimizing frequency
accuracy.
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 153.3°C/W 128.5°C/W 115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 112.7°C/W 103.3°C/W 97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
θθ
θθ
θJA by Velocity (Linear Feet per Minute)
C6
0.1u
C4
0.1u
VDD=3.3V
VDD
X1
CL=18pF
R2 10
VD D O= 1.8 V
R1
1K R3
40
VDDA
VDD
C2
33pF
C5
0.1u
VDD
Zo = 50 Ohm
U1
ICS840031i
1
2
3
4
8
7
6
5
VDD
XTAL_OUT
XTAL_IN
VDDA
VDDO
Q0
GND
PLL_SEL
C3
10uF
C1
22pF
VDDO
LVCMOS
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
8
Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
TABLE 7. PACKAGE DIMENSIONS
PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC
Reference Document: JEDEC Publication 95, MS-012
LOBMYS sretemilliM
NUMINIMMUMIXAM
N8
A53.157.1
1A01.052.0
B33.015.0
C91.052.0
D08.400.5
E08.300.4
eCISAB72.1
H08.502.6
h52.005.0
L04.07
2.1
α°0°8
840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005
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Integrated
Circuit
Systems, Inc.
ICS840031I
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
TABLE 8. ORDERING INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
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