MITSUBISHI <Dig./Ana. INTERFACE> M51996P ,FP SWITCHING REGULATOR CONTROL DESCRIPTION M51996 is the primary switching regulator controller which is especially designed to get the regulated DC voltage from AC power supply. This IC can directly drive the MOS-FET with fast rise and fast fall output pulse and with a large-drive totempole output. Type M51996 has the functions of not only high frequency OSC and fast output drive but also current limit with fast response and high sensibility so the true fast switching regulator can be realized. The M51996 is equivalent to the M51978 with externally re- settable OVP( over voltage protection) circuit. FEATURES @ 500kHz operation to MOS FET e Output CUIFENt cote es +1A @ Output rise time 60ns, fall time 40ns @ Modified totempole output method with small through current @ Compact and light-weight power supply * Small start-up Current se 1002 typ. - Big difference between start-up voltage and stop voltage makes the smoothing capacitor of the power input section small. Start-up threshold 16V, stop voltage 10V * Packages with high power dissipation are used to with- stand the heat generated by the gate-drive current of MOS FET. 14-pin DIP, 16-pin SOP 1.5W (at 25C) @ Simplified peripheral circuit with protection circuit and built-in large-capacity totempole output + High-speed current limiting circuit using pulse-by- pulse method (CLM-+ pin) * Over-voltage protection circuit with an externally re- settable latch (OVP) + Protection circuit for output miss action at low supply voltage (UVLO) @ High-preformance and highly functional power supply * Triangular wave oscillator for easy dead time setting * SOFT start function by expanding period APPLICATION Feed forward regulator, fly-back regulator RECOMMENDED OPERATING CONDITIONS PIN CONFIGURATION (TOP VIEW) VU cottector [i | M4] ve: Vou- [2] Ti3] cum+ emitTea [3 | z 1i2] GNo ove [4 | z i} roFF Fe [5 | % io) cr oet[e] [3 Jt-on rec [7 | rs] sort Outline 14P4 coLtector[1 | O 78] Voc Vour LZ | 5] cum+ EMITTER[3 | M4] Gnp HEAT SINK PIN [4 | & 3] HEAT SINK PIN ove[5| 8 12] t-oFF F/B [6 | 3 ii} cr pet[7| fo] tON rea [a | [3] sort Outline 16P2N-A Connect the heat sink pin to GND. Supply voltage range Fe tee nett n reer een n eats 12~30V Operating frequency: less than 500kHz Oscillator frequency setting resistance * T-ON pin resistance Ron 10k~75k2 * T-OFF pin resistance Rope 2k~ 30k 2 MITSUBISHI ELECTRIC 533VITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL BLOCK DIAGRAM REG (7.8V) | VOLTAGE REGULATOR 5 x N UNDER | 6 VOLTAGE LOCKOUT | 4 Ove t LATCH COLLECTOR I _ TOR or OL OSCILLATOR CURRENT Vour T-ON LIMIT DETECTION (TRIANGLE? T-OFF (4 = . EMITTER 5 mi -O- - - -0- - - SOFT CLM+ GND ABSOLUTE MAXIMUM RATINGS | Symbol ss sssCsPatrameter _| Conditions Ratings Unit Voc Supply vottage : 31 Vv | Vc (| Collectorvotage CS Po [BH v PO _ | Peak +1 lo j Output current | Continuous +0.15 A a ce - ee a \vrec VREG terminal output current 6 mA | Vsort ~"] SOFT tern nal vollage ee : VREGTO.2 | v | Vous | CLM terminal votage HB Voer DET terminal voltage j 6 v | love (| OWPterminalcurrent , 8 mA lem F/B terminal current _ Oe =10 mA | Iron. T-ON terminal input current - - | So =1 mA lrorr T-OFF terminal input current _ _ OO _ - 72) t mA | Pq [Powerdissipation ftaesc Ss | Ss~iS | wef | Ka [Thermal derating -_ | ta>25c oo 12s mw Hrs T Opening eteaaiz 3085 Tstq | Storage temperature 1 40~125 Lc Note |. + sign shows the direction of current flowing into the IC and " sign shows the current flowing out from the IC 2. The low impedance voltage supply should not be applied to the OVP terminal MITSUBISHI 5~34 ELECTRICVOTSUBSH <Uig./Ana. \) 24-AUr> MS1996P,FP SWITCHING REGULATOR CONTROL ELECTRICAL CHARACTERISTICS (vcc=18v, Ta=25'C, unless otherwise noted) Limits Block Symbol Parameter Test Conditions - Unit _ Min Typ Max | ~ Vec c Vv. Operating supply voltage range _ 30 Vv o ce Pp 3 pply 9 9g (STOP) - a Vecistant) | Operation start up voltage ee 15.2| 16.2 17.2 Vv 3 Vecistor: | Operation stop voltage 9.0 3.9 10.9 Vv & Wee Vecistart). Vecistop) difference Nec=Vectstarti Vectstor! 5.0 6.3 7.6 v 3 Voc=14.5V Tg=25'C 65 100 150 D loot Stand-by current . cope uA a ; Voc=14.5V 30T STgS85T 50 100 200 9 ; ; Voc= 15V, f=188kHz 133 m leco Operating circuit current JP nn nrc enti mA 3 Veco=30V, f=188kKHz ; 8 3 \ Cireuit in OVP stat Veo= 25V 1.3 ma Hrcust Current in Slate ooo 7 a oT a ccove Vee=9. 5V 140 uA | lFamiInD Current at 0% duty F/B terminal input current 2.1 mA Ipamaxo | Current at maximum duty F/B terminal input current 0.9 mA F/B 4lep Current difference between max and 0% duty | 4ipa=lrawino lremaxp 1.35 mA Vep F/B terminal voltage F/B terminal input current=0. 95mA 4.9 Vv | Ree OVP terminal resistance 420 Q ! Vinover | OVP terminal H threshold voltage 540 mv 4VsHove | OVP terminal hysterisis voltage AVrHove= Vrnoven VtHover mv ItHove OVP terminal threshold current ; 80 uA linove OVP terminal input current Vove=400mv 80 _. # vA | ove Vecovec | OVP reset supply voltage 7.5 9.0 10.0 Vv v, Diff \ it bet ti OVP terminal is open. ifference su voltage between operation ectstor) Ply wolag p (high impedance) 0.55; 1.20) Vv Vecovec | stop and OVP reset - | Current from OVP terminal Voc 30V 480: 320) 213 ItHovec uA for OVP reset Voco18V 210, 140| 93 Vruoim+| CLM+ terminal threshold voltage | 180 1. 200 220 _ mv CLM+ | tincum+ | CLM+ terminal current Veim+ = OV 280| 200 140 4A Tpocum+ Delay time from CLM+ to Vout _ 150 - ns fosc Oscillating frequency Ron=20k2 Cr=220pF 170 188 207 kHz Touty Maximum ON duty Rope =17kKQ., ~5STgs85C 47 50 53 % . - 2 Voscu Upper limit voltage of oscillation waveform 3.97 4.37 4.77 Vv = Voset Lower limit voltage of oscillation waveform Ron=20kN., Rore=17k2 1.76 | 1.96 2.16 v a y Voltage difference between upper Cr 220pF O | Mosc | 9 * eee 211) 241) 271 Vv limit and lower limit of OSC waveform - to. oo | Vt-0Nn TON terminal voltage ' Ron=20k0, 3.8 4.5 5.4 v Vt_oFF T OFF terminal voltage Rore=17kQ 2.9 3.5 4.2 v an Vsort=5. 5V 170 188 207 kHz Oscillating frequency b foscsort , A Vsort=2. 5V Ronw=20KQ, Rore=17k9, Cr=220pF V1 131 151 kHz i during SOFT operation Oo Vsort=0. 2V oe ot 19.0 23.3 27.0 kHz a lsortin | SOFT terminal input current Vsort=1V -0.5) 0.1 _ BAD . . . Discharge current of SOFT terminal lsortpis | SOFT terminal discharging current 1 3.3 _ mA , at Voc less than Vocistop? REG Vrec Regulator output voltage 6.8 7.8 8.8 Vv Vou Voc=18V to=!0mA _ 0. 04 04] ov Vov2 Veco=t8V Io=100mA _ 0.7 1.4 Vv - Output Jow voltage 3 Vous Vec=5 lo=lmA _ 0. 85 1.0 Vv 2 Vows Vec=5V 1o=100mA _ 1.30 2.0 Vv 0 Vv Voc=l8V lo=10mA 16.0 16.7 _ Vv om Output high voltage oe Vou2 Voo=18V Io=100mA 15.5 16.5 _ v Trise Output voltage rise time _ 60 _ ns Trace Output voltage fall time _ 40 _ ns 5 Voer Detecting voltage 2.4 2.5 2.6 Vv 8 liwoet DET terminal input current Voet=2. 5V _ 1.0; 3.0 uA a Gavpet | Voltage gain of detection amp 30 40 = dB MITSUBISHI ELECTRIC 535TSU BISH: <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL TYPICAL CHARACTERISTICS THERMAL DERATING (MAXIMUM RATING) 1800 T | | 1800 1200 POWER DISSIPATION Pq (mw) 8 3 300 r | s 0 25 50 78 85T 100 126 150 AMBIENT TEMPERATURE Ta (C) SOFT TERMINAL INPUT VOLTAGE VS. EXPANSION RATE OF PERIOD S50 TT Tt = fogc=1OOKHZ GW Ray=ISk2 Rope =27KY 5 45 t @ =18ko =24k | a @ =22k2 B22kKD 2 48 @ = 24keQ = 20K] So S22k2 212k = 36 =36kd =62k0 | 5 30 | ; | 5 28 a | | Z 20 {ot Z | z WwW : = 10 a FE | t os t ale Sy @ 8 eH i Wale | 4 B90 1 i 4 6 o 2 B 10 12 14 16 18 20 EXPANSION RATE OF PERIOD (TIMES) SOFT TERMINAL INPUT CURRENT VS. INPUT VOLTAGE -100 1 3S SOFT TERMINAL INPUT CURRENT {soet in (NA od 3 o 1 2 3 4 5 6 7 8 9 10 SOFT TERMINAL INPUT VOLTAGE Vsorr (V) CIRCUIT CURRENT Joc (A) SOFT TERMINAL INPUT VOLTAGE Veoer (V} CLM-+ TERMINAL THRESHOLD VOLTAGE Vrncum+ (mV) CIRCUIT CURRENT VS. SUPPLY VOLTAGE (NORMAL OPERATION) Ron =18k2 Ropr=20k2 fosc=SOOkHz 150 4 100% 50 u Q 5 10 1 20 268 3 35 40 SUPPLY VOLTAGE Voc (V) SOFT TERMINAL INPUT VOLTAGE VS. EXPANSION RATE OF PERIOD S8orTT-T T_T TT TI fosc=500KHZ @RON=15kQ Rope a27k2 4 @R = 1Bk2 =24kQ | 4 @R =22k2 =22k2 | @R =24kD =20k2 35 @OR =22kQ =12k2_| " @R =36K2 F6.2k2 20 | 25 \ +4 | 20 \ t LW | 10 N 0s ll | Degel le rat 1 L 9 204 6 8 10 12 *4 16 18 20 EXPANSION RATE OF PERIOD (TIMES) CLM+ TERMINAL THRESHOLD VOLTAGE VS. AMBIENT TEMPERATURE IN 196 40-200 20 40 60 0 100 AMBIENT TEMPERATURE Ta (C) 5 36 MITSUBISHI ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P ,FP SWITCHING REGULATOR CONTROL CLM+ TERMINAL CURRENT VS. CLM+ TERMINAL VOLTAGE ~ ~400 < | St i + 5 2-300 E Zz ww = +. TT | Ta 286 B ~200 =a t== Taras 2 f--te, | +) ts 4-201 z . 2 -100 a uw BE + 3 o h Oo O1 02 03 04 05 06 07 08 og 10 CLM+ TERMINAL VOLTAGE Voim+ (V) OUTPUT HIGH VOLTAGE VS. SOURCE CURRENT S 45 4 3 2 Veg =18V > 39 - | Ta =25C 3 36 w 343 2 30 a 27 a 2 > 24 x Sar x - 18 > a 15 5 L a 12 1073 23 5y072 23 5 yg-12 3 510 235 10! SOURCE CURRENT lon (A) DETECTING VOLTAGE VS. AMBIENT TEMPERATURE > 2.55 bo > ~ w p~ 2 250 [ J N : > Qo \ z ra a \ 2.45 rf \ Ww ww N -40 -20 0 20 40 #60 80 #100 AMBIENT TEMPERATURE Ta ('C ) REG OUTPUT VOLTAGE Vaeg (V) A ee OUTPUT LOW VOLTAGE Vo.(V) REG OUTPUT VOLTAGE VS. AMBIENT TEMPERATURE WW qf CO ~60 -40 -20 0 Zz 49 60 8O 100 AMBIENT TEMPERATURE Ta (C ) OUTPUT LOW VOLTAGE VS. SINK CURRENT 3 1073 23 51972 23 Big? 3 5 19 23 5 10' SINK CURRENT lo. (A) <= DETECTION TERMINAL INPUT CURRENT DETECTION TERMINAL INPUT CURRENT twoer (uA VS. AMBIENT TEMPERATURE -40 -20 0 20 40 60 80 100 AMBIENT TEMPERATURE Ta ('C ) MITSUBISHI 537MITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL VOLTAGE GAIN OF DETECTION ON duty VS. F/B TERMINAL INPUT CURRENT a AMP VS. FREQUENCY (fosc=100kHz) 2 $0 i 4s 45 o Ron =18kQ & 40 40 ROFF =20k.2 < 2 35 _ 3 5 & 30 25 3 25 a 5 7 5 2 18 18 < 10 10 iw < 5 5 \ a Q io 238 igaas 108295 10235 198 oO oa 06 08 10 121412 18 20 22 FREQUENCY f (Hz) F/B TERMINAL tNPUT CURRENT (mA) ON duty VS. F/B TERMINAL INPUT CURRENT ON duty VS. F/B TERMINAL INPUT CURRENT (fosc=200kHz) (fose=500kHz) t y [RON =18kQ pf ROF P= 20K Ren =! \ | . Rog r= = \ 40 s i | \ i \ \ (= Ta=28c =~ q | mates Ta 288 30 a= \ i> Taz-WC & = \ = \ Z 20 ony LT ONIAIN i | \ : \ NN 10 i x | \ \ \ i YK \ 6 0 04 06 08 10 12 1416 18 20 22 F/B TERMINAL INPUT CURRENT (mA) Oo O04 06 08 10142 14 16 18 20 22 F/B TERMINAL INPUT CURRENT (mA) UPPER & LOWER LIMIT VOLTAGE OF OSCILLATOR FREQUENCY OSC VS. AMBIENT TEMPERATURE o VS. CF TERMINAL CAPACITANCE 1 Ron #18k2 nN 5 =20k2 = 3 > 5 3 g 2 ase *100kHz 3 10? fasq =200 KHz wy 5 =600 kHz a 3 a o E 5 2 9 a o 10 -40 -20 0 20 40 86 80 100 Moe B38 agit D8 1QEE SS Qs 235 198 AMBIENT TEMPERATURE Ta (C) CF TERMINAL CAPACITANCE (pF) UPPER & LOWER LIMIT VOLTAGE OF OSC Voscn. Vosor (V) MITSUBISHI 5 338 ELECTRICVO SUB ios! <Jig.Ana. No t4A-ACc> M51996P ,FP SWITCHING REGULATOR CONTROL ON duty (%) OSCILLATOR FREQUENCY fosc (kHz) ON duty (%) ON duty VS. Rorr 5 7 10! 23 7 10? Rore (k2.) 10 2 3 OSCILLATOR FREQUENCY VS. AMBIENT TEMPERATURE (Ron24k 2, Roer=20k2, Cp=47pF) 700 600 200 -80 -40-20 0 20 40 680 80 100 120140 AMBIENT TEMPERATURE Ta (C) ON duty VS. AMBIENT TEMPERATURE (fose=200kHz) Rorr =6.2kQ 22 Rorr =t2kQ Ron= 24kQ. Ror = 20k Ron= 22k. Rorr = 22k2 Ron= 18k. Rorr =24kQ wy 16KQ. Rogge =27 ki 60 ~40 -20 0 20 40 60 86 100 120 140 AMBIENT TEMPERATURE Ta (C ) OSCILLATOR FREQUENCY fosc (kHz) ON duty (%) ON duty (%) OSCILLATOR FREQUENCY VS. AMBIENT TEMPERATURE (Ron=24k0, Rorr= 20k, C-=330pF) 120 1190 100 30 380 i | ot 20 40 60 80 100 120 140 -60 -49 -20 6 AMBIENT TEMPERATURE Ta (C) ON duty VS. AMBIENT TEMPERATURE (fosc=100kKH2z) 100 90 80 Rorr = 62kQ 70 80 = 22kQRorr = 12k2 590 ~oas'o Rorr=20kQ ON = 22kQ Roe =22k0 40 = 18k QRopr=24kQ 30 = 15k QRopr=H27KQ 20 10 0 60 40-20 0 20 40 60 80 100120140 AMBIENT TEMPERATURE Ta (C) ON duty VS. AMBIENT TEMPERATURE (fosc=500kHz) F=62k2 Rorr=12k2 =24k0 Roger =20k2 2kQ Rorr=22kQ =18 70 Rorr =24kQ =1 Ror =27kQ 20 1 Qa -60 -40 -20 0 AMBIENT TEMPERATURE Ta (C) 20 40 6O 80 100 120 140 MITSUBISHI ELECTRICVo Osror SigyaAna Yo o<-AU =? M51996P FP SWITCHING REGULATOR CONTROL OVP TERMINAL INPUT VOLTAGE VS. INPUT CURRENT Ta=25C 2 = - Ta=30T - T3=85C 1004 10 OVP TERMINAL INPUT CURRENT love (A) 0,2 0.4 0.6 0.8 1.0 OVP TERMINAL INPUT VOLTAGE Voye (V) CIRCUIT CURRENT VS. SUPPLY VOLTAGE (OVP OPERATION) 8.0 (TF = 25 7,0} -- o> Tas 30 -Ta=85T OVP RESET POINT 8. 30C) 8. 94V(25C ) 9. 23V(85C ) w > uw o 9 2 CIRCUIT CURRENT Icc (mA) nN 0 10.0 20.0 30. 0 40.0 SUPPLY VOLTAGE Vec (V) OUTPUT THROUGH CURRENT WAVEFORM AT RISING EDGE OF OUTPUT PULSE Horizontal axis : 20ns/div Vertical axis : 50mA/div OVP TERMINAL THRESHOLD VOLTAGE VS. AMBIENT TEMPERATURE Pa 1.0 Voc=1 0.9 0.8 H threshold voltage (v } 0.7 0.6 voitage Vinover OVP TERMINAL THRESHOLD VOLTAGE Ss o Vinove (V) 2 aay 2S w 40 -20 0 20 40 60 80 100 AMBIENT TEMPERATURE Ta (C) CURRENT FROM OVP TERMINAL FOR OVP RESET VS. SUPPLY VOLTAGE Ta=25C = = Tg=85'C - T,=- QD o 3 ) ow Qo 3 ms 3 3 2 3 CURRENT FROM OVP TERMINAL FOR OVP RESET Itnovec (A nN 2 S 2 2 5 10 15 2 2 30 36 40 SUPPLY VOLTAGE Vee (V) AT FALLING EDGE OF OUTPUT PULSE Horizontal axis : 20ns/div Vertical axis 5mA/div 5 40 MITSUBISHI ELECTRICMITSUBISH: <Dig./Ana. \ math 27 M51996P,FP SWITCHING REGULATOR CONTROL FUNCTION DESCRIPTION Types M51996P and MS51996FP are especially designed for off-line primary PWM contorl IC of switching made power supply to get DC voltage from AC power supply. Using this IC, smart SMPS can be realized with reasonable cost and compact size as the number of external electric o4 a wi A Crin AC INPUT | ic wt) og WwW z 5 O- Fig.1 O- xc Ww Se AC INPUT | & zr lu z 5 O- RUSH CURRENT PREVENTION CIRCUIT parts can be reduced and also parts can be replaced by reasonable one. In the foilowing circuit diagram, MOS-FET is used for out- put transistor, however, bipolar transistor can be replaced with no problem. as * DC OUTPUT O Re Cvce c d REG SOFT Voc COLLECTOR Vout Pp 19 cLM+ M51996P/FP EMITTER GND DET F/B TON CF TOFF OVP t [omme) ty } 1, } Ron Rorr Cnr FEEDBACK ~ Sp. H (TLA31} zk Application example for feed forward regulator Cerin Cyc a LL BC OUTPUT Res QO 4 Rea Cre Voc COLLECTOR ban f F/B Vout >____(}] 0E +1 M51996P/FP EMITTER REG Rea GND SOFT ovp| TON CF TOFF Ron cry Rorr RNF Rem ne Fig.2 Application example for fly-back regulator MITSUBISHI ELECTRIC 541MITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL Start-up circuit section The start-up current is such low current level as typical 1004A, as shown in Fig. 3, when the Voc voltage is in- creased from low level to start-up voltage Vocstaar)- In this voltage range, only a few parts in this 1C, which has the function to make the output voltage low level, is alive and Icc current is used to keep output low level. The large voltage difference between Vcc cstant) and Voc (stop) makes start-up easy, because it takes rather long duration from Vecistart) tO Vecistoe). < & G 2 E Zz w a ac 2 Oo E > oO c oO Vee Veo (stop) (START) =9. 9V 16, 2v SUPPLY VOLTAGE Veg (V) Fig. 3 Circuit current vs. supply voltage Oscillator section The oscillation waveform is the triangle one. The ON- duration of output pulse depends on the rising duration of the triangle waveform and dead-time is decided by the fall- ing duration. The rising duration is determined by the product of external resistor Ron and capacitor Cr and the falling duration is mainly determined by the product of resistor Rorr and capacitor Cr. (1)Oscillator operation when SOFT circuit does not operate Fig. 4 shows the equivalent charging and discharging cir- cuit diagram of oscillator . The current flows through Ron from the constant voltage source of 5.8V. C, is charged up by the same amplitude as Ron current, when internal switch SW,, SW, is switched to charging side. The rise rate of CF terminal is given as ~__Vt-0N RonX Ce where V1_on=4.5V The maximum on duration is approximately given as VoscuVosor) X Ron X Cr Vt-on ~4 where VoscH=*4.4V Vose.=2.0V Cr is discharged by the summed-up of Rog- current and one sixteenth (1/16) of Row current by the function of Qz, Q3 and Q, when SW,, SW. are switched to discharge side. 5. 8V Q, CHARGING ie swt Rore# | SIGNAL !SWITCHED BY V4, 2V ICHARGING AND ? tpl... DISCHARGING Cex | OF [| # SW2'siGnaL rad ' st | bso \ DISCHARGING M51996 Fig. 4 Schematic diagram of charging and discharging control circuit for OSC. capacitor Cr VOSCH =44V VoscL =20V WAVEFORM OF CF TERMINAL Von FO : [ Vor 1 : L i 1 WAVEFORM OF Voy TERMINAL IN MAX ON duty CONDITION Fig.5 OSC. waveform at normal condition (no-operation of intermittent action and OSC. control circuit) So fall rate of CF terminal is given as Vion 16 Ron X Ce ~__VT-OFF ~ RorrX Ce The minimum off duration approximately is given as (VoscuVoset)XCe mA LESH ST OSCL/ANE Rorr | 16X Ron where Vyr.o6==3.5V The cycle time of oscillation is given by the summation of Equations 2 and 4. The frequency including the dead-time is not influenced by the temperature because of the built-in temperature con- pensating circuit. MITSUBISHI 5 42 ELECTRICVo S.nor <agyana Vo tt nA SP M51996P,FP SWITCHING REGULATOR CONTROL (2)Oscillator operation when the SOFT (soft start) circuit is operating Output transistor is protected from rush current by CLM function at the start time of power on. SOFT terminal is used to improve the rising response of the output voltage of power supply (prevention of overshooting). The ON duration of output is kept constant, and the OFF duration is extended as the SOFT terminal voltage becom- es lower by the soft start circuit of this IC. The maximum value of extension is set internally at approx- imately sixteen times of the maximum ON duration. The features of this method are as follows: @ tt is ideal for primary control as IC driving current is supplied from the third widing of the main transformer at the start-up because constant ON duration is obtained from start-up. @ It is possible to get a wide dynamic range for ON/OFF ratio by pulse-by-pulse current limit circuit. @ The response characteristics at power-on is not affected by input voltage as the pulse-by-pulse limit current value is not affected by the input voltage. Fig. 6 shows the circuit diagram of the soft start. If SOFT terminal voltage is low, T OFF terminal voltage becomes low and Vrorr in equations (3) and (4) become low. TO REG TERMINAL TO REG Rsort SOFT TERMINAL! TOFF wa ; TERMINAL [er =A eV GND x TERMINAL DISCHARGING TRANSISTOR ICs INTERNAL CIRCUIT % Active when operation stops. Fig.6 Circuit diagram of SOFT terminal section and T OFF terminal section Voscn ---~-- =4. 4V 1 i Vose. Ls ' i 1 =2.0V WAVEFORM OF CF TERMINAL IN MAX. ON duty CONDITION < s T 7] WAVEFORM OF Voyr TERMINAL Fig.7 Oscillator waveform when the SOFT circuit Is operating 4a < Zz s2 zo Starts trom OV F Voscu wk ( >O <u ' 2 Vose t 0 i) wie t OSs y 470? The first 2BszZz OH TTT TTT ro output pulse ze oo No output pulse p ax & if ' wet VotR-- > 552 I ri < 5590 9 t t S>Zo Fig.8 Relationship between oscillator waveform and output waveform at start-up Fig. 7 shows the relationship between oscillator waveform and output pulse. If the SOFT terminal voltage is Vsorr, the rise rate of CF terminal is given as ~ ton _ ( Ron + Cr The fall rate of ascitlation waveform is given as ~Vsort~Vee , Vron ony Rorrs Cet 16+ Rone Gp (V/S) 8 where Vsort; SOFT terminal applied voltage Veae=0.65V If Vsort Vee <0, VsortVee=0 If Vsort Vee> Vrorr (=3.5v), Vsort Vae= Vrorr PWM comparator, PWM latch and current limit latch section Fig. 9 shows the schematic diagram of PWM comparator and PWM latch section. The on-duration of output waveform coincides with the rising duration of CF terminal waveform when the no output current flows from F/B terminal. When the F/B terminal has finite impedance and current flows out from F/B terminal, A point potential shown in Fig. 9 depends on this current. So the A point potential is close to GND level when the flow-out current becomes large. A point potential is compared to the CF terminal oscillator waveform and PWM comparator, and the latch circuit is set when the potential of oscillator waveform is higher than A point potential. The latch circuit is reset during the dead time of oscillator circuit (falling duration of oscillator circuit), So the B point potential or output waveform of latch circuit is the one shown in Fig. 10. The final output waveform or C point potential is got by combining the B point signal and dead-time signal logically. (please refer to Fig. 10) MITSUBISHI ELECTRIC 5 43MITSUBISHI <Dig./Ana. INTERFACE> M51996P ,FP SWITCHING REGULATOR CONTROL | < Point A | e PWM a x NS 7 ( comparator ' ; To output 6S | | ; Point C F/B C i - Ll. --0 M51996 CF CLM+ * From OSC 1 Resistor to determine current limit sensitivity *2: High-level during dead time Fig.9 PWM comparator, PWM latch and current limit latch section Oscillator waveform Waveform at point A WAVEFORM OF OSC & POINT A POINT B Fig.10 Waveforms of PWM comparator input point-A, latch circuit points B and C Current limitting section When the current-limit signal is applied before the crossing instant of A point potential and CF terminal voltage shown in Fig. 9, this signal makes the output off and the off state will continue until next cycle. Fig. 11 shows the timing reia- tion among them. if the current limitting circuit is set, no waveform is gener- ated at output terminal, however this state is reset during the succeeding dead-time. So this current limitting circuit is able to have the function in every cycle, and is named pulse-by-pulse current limit. There happen some noise voltage on Ro. during the switching of power transistor due to the snubber circuit and stray capacitor of the transformer windings. OSC WAVEFORM OF CF TERMINAL Vincum+ 2 200mVv WAVEFORM OF CLM+ TERMINAL CURRENT LIMIT SIGNAL | | TO SET LATCH WAVEFORM OF Vour TERMINAL Fig.11 Operating waveform of current limitting circuit To eliminate the abnormal operation by the noise voltage, the low pass filter, which consists of Rye and Cyr is used as shown in Fig. 12. It is recommended to use 10~ 1002 for Rue because such range of Ryr is not influenced by the flow-out current of some 200uA from CLM4+ terminal and Cyr is designed to have the enough value to absorb the noise voltage. Roum M51996 Fig.12 Connection diagram of current timit circuit Voltage detector circuit (DET) section The DET terminal can be used to control the output voltage which is determined by the winding ratio of fly back trans- former in fly-back system or in case of common ground cir- cuit of primary and secondary in feed forward system. The circuit diagram is quite similar to that of shunt regulator type 431 as shown in Fig. 13. As well known from Fig. 13 and Fig. 14, the output of OP AMP has the current-sink ability, when the DET terminal voltage is higher than 2.5V MITSUBISHI 5-44 ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P FP SWITCHING REGULATOR CONTROL Fig.13 Voltage detector circuit section (DET) but it becomes high impedance state when lower than 2.5V. DET terminal and F/B terminat have inverting phase characteristics each other, so it is recommended to connect the resistor and capacitor in series between them for phase compensation. It is very important one can not connect by resistor directly as there is the voltage difference between them and the capacitor has the DC stopper function. Fig.14 Schematic diagram of voltage detector circuit section (DET) OVP circuit (over voltage protection circuit) section OVP circuit is basically positive feedback circuit con- structed by Q2, Q3 as shown in Fig. 15. Qe, Qs turn on and the circuit operation of IC stops, when the input signal is applied to OVP terminal.(threshold voi- tage=750mv) The current value of ty is about 150A when the OVP does not operates but it decreases to about 2~A when OVP Operates. It is necessary to input the sufficient larger current (800A ~8mA) than i, for triggering the OVP operation. The reason to decrease |, is that it is necessary that lec at the OVP reset supply voltage is small. It is necessary that OVP state holds by circuit current from R, in the application example, so this IC has the character- istic of small Icc at the OVP reset supply voltage (= stand- by current + 20uA) On the other hand, the circuit current is large in the higher supply voltage, so the supply voltage of this IC doesn't be- come so high by the voltage drop across R,. This characteristic is shown in Fig. 16. The OVP terminal input current in the voltage lower than the OVP threshold voltage is based on lz and the input cur- rent in the voltage higher than the OVP threshold voltage is the sum of the current flowing to the base of Q, and the current flowing from the collector of Q, to the base. For holding in the latch state, it is necessary that the OVP terminal voltage is kept in the voltage higher than Vge of Qs. So if the capacitor is connected between the OVP terminal and GND, even though Q turns on in a moment by the surge voltage, etc, this latch action does not hold if the OVP terminal voltage does not become higher than Vee of Q, by charging this capacitor. For resetting OVP state, it is necessary to make the OVP terminal voltage lower than the OVP L threshold voltage or make Voc lower than the OVP reset supply voitage. As the OVP reset voltage is settled on the rather high vol- tage of 9.0V, SMPS can be reset in rather short time from the switch-off of the AC power source if the smoothing capacitor is not so large value. Veg QO 7.8 fi] 1908 " a ', a, 400 ro wo o * v Qs OPO ia GND O 1,=0 when OVP operates Fig.15 Detail diagram of OVP circuit MITSUBISHI ELECTRIC 5--45MITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL 8.0 Ta=25'C 7.0 Ta=85C Ta=30 6.0 POINT 9: OF 8 'g7v(30c) 8. $, 23V( } CIRCUIT CURRENT loc (mA) 0 10.0 20.0 30.0 40.0 SUPPLY VOLTAGE Vec (V) Fig.16 CIRCUIT CURRENT VS. SUPPLY VOLTAGE (OVP OPERATION) Output section It is required that the output circuit have the high sink and source abilities for MOS-FET drive. It is well known that the totempoie circuit has high sink and source ability. Howev- er, it has the demerit of high through current. For example, the through current may reach such the high current level of 1A, if type M51996 has the conventional totempole circuit. For the high frequency application such as higher than 100kHz, this through current is very impor- tant factor and will cause not only the large Icc current and the inevitable heat-up of IC but also the noise voltage. This iC uses the improved totempole circuit, so without de- teriorating the characteristic of operating speed, its through current is approximately 100mA. APPLICATION NOTE OF TYPE M51996P,FP Design of start-up circuit and the power supply of IC (1)The start-up circuit when it is not necessary to set the start and stop input voltage Fig. 17 shows one of the example circuit diagram of the start-up circuit which is used when it is not necessary to set the start and stop voltage. It is recommended that the current more than 300A flows through R, in order to overcome the operation start-up cur- rent Ioc(staat) and Cycc is in the range of 10 to 47uF. The product of R; by Cycce causes the time delay of operation, so the response time will be long if the product is too much large. RECTIFIED DC VOLTAGE FROM ->- SMOOTHING CAPACITOR MAIN TRANSFORMER THIRD WINDING OR BIAS WINDING M51996 Fig. 17 Start-up circuit diagram when it is not necessary to set the start and stop input voltage Just after the start-up, the Icc current is supplied from Cycc, however, under the steady state condition, IC will be supplied from the third winding or bias winding of transfor- mer, the winding ratio of the third winding must be de- signed so that the induced voltage may be higher than the operation-stop voltage Vecistor). The Vec voltage is recommended to be 12V to 17V as the normal and optimum gate voltage is 10 to 15V and the out- put voltage (Vou) of type M51996P, FP is about (Vco2V). It is not necessary that the induced voltage is settled high- er than the operation start-up voltage Voc(start), and the high gate drive voltage causes high gate dissipation, on the other hand, too low gate drive voltage does not make the MOS-FET fully on-state or the saturation state. (2)The start-up circuit when it is necessary to set the start and stop input voltage It is recommend to use the third winding of forward wind- ing or positive polarity as shown in Fig. 18, when the DC source voltages at both the IC operation start and stop must be settled at the specified values. The input voltage (Vinistaat)), at which the IC operation starts, is decided by R, and Rp utilizing the low start-up Vin RECTIFIED DC VOLTAGE FROM ) paIMARY WINDING SMOOTHING CAPACITOR Np OF TRANSFORMER Ai 2 S Ve jal a 9 Vee THIRD WINDING Na OF TRANSFORMER Raz + M51996 UZ Cvee GNO Fig. 18 Start-up circuit diagram when it is necessary to set the start and stop input voltage MITSUBISHI 5 46 ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL current characterisitics of type M51996P, FP. The input voltage (Vincstop)), at which the IC Operation stops, is decided by the ratio of third winding of trans- former. The Vin(start) and Vinistop) are given by following equa- tions. R iz VinstarT) = Ri loot +1) *Veetstaaty ve N 1, \ Vintstop)= (Vecisrop) Ve) * wet BVIN Aiptp-py (8) B where loci is the operation start-up current of IC Vcoistart) is the operation start-up voltage of IC Voc(stop) is the operation stop voltage of IC Vr is the forward voltage of rectifier diode V'in (p-p) is the peak to peak rippie voltage of a Ne Veco terminal= yy Vin RIP(P-P) It is required that the Vin starr) Must be higher than Vin (STOP). When the third winding is the fly back winding or reverse polarity, the Vin(staat) Can be fixed, however, Vinstop) can not be settled by this system, so the auxiliary circuit is re- quired. (3)Notice to the Vcc, Vcc line and GND tine To avoid the abnormal IC operation, it is recommended to design the Vcc is not vary abruptly and has few spike vol- tage, which is induced from the stray capacity between the winding of main transformer. To reduce the spike voltage, the Cycc, which is connected between Vcc and ground, must have the good high fre- quency characteristics. To design the conductor-pattern on PC board, following cautions must be considered as shown in Fig. 19. (a) To separate the emitter line of type M51996 from the the GND tine of the IC (b) To locate the Cycc as near as possible to type M51996 and connect directly () To separate the collector tine of type M51996 from the Voc line of the iC (d) To connect the ground terminals of peripheral parts of ICs to GND of type M51996 as short as possible couscron Voc M51996 Cvee iO OUTPUT EMITTER Roum GND Fig. 19 How to design the conductor-pattern of type M51996 on PC board (schematic example) (4)Power supply circuit for easy start-up When IC start to operate, the voltage of the Cycc begins to decrease till the Cycc becomes to be charged from the third winding of main-transformer as the Icc of the IC in- creases abruptly. In case shown in Fig. 17 and 18, some unstable start-up or fail to start-up may happen, as the charging interval of Cycc is very short duration; that is the charging does occur only the duration while the induced winding voltage is higher than the Cycc voltage, if the in- duced winding voltage is nearly equal to the operation- stop voltage of type M51996. it is recommended to use the 10 to 47uF for Cycci, and ab- out 5 times capacity bigger than Cyco: for Cyce2. Ry Ke 4 , MAIN TRANSFORMER THIRD WINDING ; Vec M51996 pono Fig. 20 DC source circuit for stable start-up + ZCyeo: BL Cyccz yt MITSUBISHI ELECTRIC 54?7MITSUBISHI <Dig./Ana. INTERFACZ> M51996P,FP SWITCHING REGULATOR CONTROL OVP circuit (1)To avoid the miss-operation of OVP it is recommended to connect the capacitor between OVP terminal and GND for avoiding the miss operation by the spike noise. The OVP terminal is connected with the sink current source (150uA)in IC when OVP does not operate, for absorbing the leak current of the photo coupler in the application. So the resistance between the OVP terminal and GND for leak-cut is not necessary. If the resistance is connected, the supply current at the OVP reset supply voitage becomes large. As the result, the OVP reset supply voltage may become higher than the operation stop voltage. in that case, the OVP action is reset when the OVP is trig- gered at the supply voltage a little high than the operation stop voltage. So it should be avoided absolutely to connect the resist- ance between the OVP terminal and GND. TO REG oF Vec 5. 6k i ~y \ . ~T, AO M51996 a PHOTO COUPLER ove + GND __ Fig. 21 Peripheral circuit of OVP terminal (2)Application circuit to make the OVP-reset time fast The reset time may becomes problem when the discharge time constant of Crin > (Ri +Rz2) is tong. Under such the cir- cuit condition, it is recommended to discharge the Cycc forcedly and to make the Vcc low value; This makes the OVP-reset time fast. (3)OVP setting method using the induced third winding voltage on fly back system For the over voltage protection (OVP), the induced fly back type third winding voltage can be utilized, as the induced third winding voltage depends on the output voltage. Fig. 23 shows one of the example circuit diagram. TO MAIN TRANSFORMER _ Vee tr M51996 Cyc C |GNOD | THE TIME CONSTANT OF THIS PART SHOULD BE SHORT Fig. 22 Example circuit diagram to make the OVP-reset-time fast lq * | a o Vee MAIN + TRANSFORMER ove al Cuvee THIRD WINDING M51996 -} -o- pone | Fig. 23. OVP setting method using the induced third winding voltage on fly back system =. (4)Method to control for ON/OFF using the OVP terminal You can reset OVP to lower the OVP terminal voltage lower than Vryover- So you can control for ON/OFF using this nature. The application is shown in Fig. 24. The circuit turns off by SW OFF and turns on by SW ON in this application. Of course you can make use of the transistor or photo- transistor instead of SW. REG M51996 ON/OFF Fig. 24. Method to contro! for ON/OFF using the OVP terminal MITSUBISHI 5 48 ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL Current limitting circuit (1)Peripheral circuit of CLM + terminal Fig.25 shows the example circuit diagrams around the CLM + terminal. It is required to connect the low pass filter, in oder to reduce the spike current component, as the main current or drain current contains the spike current especial- ly during the turn-on duration of MOS-FET 1,000pF to 22,000pF is recommended for Cyr and the Rye; and Rye2 have the functions both to adjust the current- detecting-sensitivity and to consist the low pass filter bg gee at 7 st M51996 SMOOTHING CAPACITOR Fig, 25. Peripheral circuit diagram of CLM-+ terminal To design the Rye: and Ryrz, it is required to consider the influence of CLM + terminal source current (livcum +). which value is in the range of 90 to 270uA. In order to be not influenced from these resistor paralleled value of Rue: and Rares, (Rari//Rneo) is recommended to be less than 1000. The Reim should be the non-inductive resistor. (2)Over current limitting curve (a) In case of feed forward system Fig. 26 shows the primary and secondary current wave- forms under the current limitting operation. At the typical application of pulse by pulse primary current detecting circuit, the secondary current depends on the primary current. As the peak value of secondary current is limitted to specified value, the characteristics curve of out- put voltage versus output current become to the one as shown in Fig. 27. oO (b) Primary and secondary current Fig. 26 Primary and secondary current waveforms under the current limitting operation condition on feed forward system OUTPUT VALTAGE oot QUTPUT CURRENT Fig. 27 Over current limitting curve on feed forward system The demerit of the pulse by pulse current limitting system is that the output pulse width can not reduce to less than some value because of the delay time of low. pass filter connected to the CLM-+ termina! and propagation delay time Tppcim+ from CLM+ terminal to output terminal of type M51996. The typical Tpocim+ is 150ns. As the frequency becomes higher, the delay time must be shorter. And as the secondary output voltage becomes higher, the dynamic range of on-duty must be wider; it means that it is required to make the on-duration much more narrower. So this system has the demerit at the high- er oscillating frequency and higher output voltage applica- tions. To prevent that, the SOFT terminal is used to lower the fre- quency when the curve starts to become vertical. MITSUBISHI ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL 1 |< REG 3k 500 ri F/B M51996 Fig. 28 Relationship between REG terminal and F/B terminal If the curve becomes vertical because of an excess cur- rent, the output voltage is lowered and no feedback current flows from feedback photo-coupler; the PWM comparator operates to enlarge the duty sufficiently, but the signal from the CLM+ section operates to make the pulse width nar- rower. Under the condition in which I, in Fig. 26 does not become 0, the output voitage is proportional to the product of the in- put voltage Vin (primary side voltage of the main transformer) and on duty. If the bias winding is positive, Vcc is approximately proportional to Vij and the smoothed output voltage of the IC is proportional to Vin. The exist- ence of feed back current of the photo-coupler is known by measuring the F/B terminal voltage which becomes less than 2Vg_ in the internal circuit of REG terminal and F/B terminal if the output current flows from the F/B terminal. Fig. 29 shows an application example. Q, is turned on when normal output voltage is controlled at a certain value. The SOFT terminal is clamped to a high- level voltage. If the output voltage decreases and the curve starts to drop, no feed back current flows, Q, is turned off and the SOFT terminal responds to the smoothed output voltage. It is recommended to use an R, and Rz of 10kN ~30kN. An R3 of 20~100k2 and C of 1000pF ~ 8200pF should be used. To change the knee point of frequency drop, use the circuit in Fig. 30. To have a normal SOFT start function in the circuit in Fig. 29, use the circuit in Fig. 31. It is recommended to use an Rg of 10k2. D2 COLLECTOR] + 4 BIAS WINDING OF Vec Cvce i THE MAIN TRANSFORMER Vout : R TO OUTPUT TRANSISTOR 3 SOFT eat 4 M51996 PHOTO-COUPLER FOR FEED BACK SIGNAL Fig. 29 Circuit to lower frequency during over current Vout Vout TO SOFT SOFT TO MAKE THE KNEE POINT HIGH Vout SOFT s TO MAKE THE KNEE POINT LOW Fig. 30 Method to control the knee point of frequency drop BIAS WINDING OF THE MAIN TRANSFORMER M51996 TO OUTPUT TRANSISTOR ~ PHOTO-COUPLER FOR FEED BACK SIGNAL Fig. 31 Circuit to use frequency drop during the over current and normal! soft start MITSUBISHI 550 ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL (b)In case of fly back system The DC output voltage of SMPS depends on the Vcc vol- tage of type M51996 when the polarity of the third winding is negative and the system is fly back. S30 the operation of type M51996 will stop when the Voc becomes !ower than Operation-stop voltage of M51996 when the DC output voltage of SMPS decreases under specified value at over load condition. However, the M51996 will non-operate and operate inter- mittently, as the Vcc voltage rises in accordance with the decrease of Icc current. The fly back system has the constant output power charac- teristics as shown in Fig. 32 when the peak primary current and the operating frequency are constant. To avoid an increase of the output current, the frequency is lowered when the DC output voltage of SMPS starts to drop using the SOFT terminal. Vcc is divided and is input to the SOFT terminal as shown in Fig. 33, because the voltage in proportional to the output voltage is obtained from the bias winding. In this application example, the current flowing to Rs is added to the start-up current. So please use high re- sistance or 100kKQ ~200k2 for R3. The start-up current is not affected by R; if Rg is connected to Cyccg in the circuit shown in Fig. 20. A oO < e a 5 \ > 5 > < POINT THAT Voc VOLTAGE & 7 OR THIRD WINDING > 7 VOLTAGE DECREASES co UNDER OPERATION-STOP & uo VOLTAGE" DC OUTPUT CURRENT Fig. 32 Over current limitting curve on fly back system + bv b couscron Cvee . Ra; M51996 SOFT To photo-coupler for feed back signal Fig. 33. Circuit to lower the frequency during the over current in the fly back system Output circuit (1)The output terminal characteristics at the Voc voltage lower than the Operation-stop voltage TO MAIN TRANSFORMER M51996 hes Vout m W00KN $ Reig Fig. 34 Circuit diagram to prevent the MOS-FET gate potential rising The output terminal has the current sink ability even though the Vcc voltage tower than the Operation-stop voltage or Vecistop)- (It means that the terminal is Output low state and please refer characteristics of output low voltage ver- sus sink current.) This characteristics has the merit not to damage the MOS- FET at the stop of operation when the Vcc voltage de- creases lower than the voltage of Vocistop), as the gate charge of MOS-FET, which shows the capacitive load char- acteristics to the output terminal, is drawn out rapidly. The output terminal has the draw-out ability above the Voc voltage of 2V, however, lower than the 2V, it loses the abil- ity and the output terminal potential may rise due to the leakage current. In this case, it is recommended to connect the resistor of 100kQ between gate and source of MOS-FET as shown in Fig. 34. (2)MOS-FET gate drive power dissipation Fig. 35 shows the relation between the applied gate vol- tage and the stored gate charge. In the region (1), the charge is mainly stored at Cgg as the depletion is spread and Cgp is small owing to the off-state of MOS-FET and the high drain votage. In the region @, the Cgp is multiplied by the mirror effect as the characteristics of MOS-FET transfers from off-state to on-state. In the region @, both the Cgp and Cgg affect to the charac- teristics as the MOS-FET is on-state and the drain voltage is low. The charging and discharging current caused by this gate charge makes the gate power dissipation. The relation be- tween gate drive current Ip and total gate charge Qggy is shown by following equation; Ip=Qesu * fosc Where fosc is switching frequency MITSUBISHI ELECTRICMITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL As the gate drive current may reach up to several tenths miiliampere at 500kHz operation, depending on the size of MOS-FET, the power dissipation caused by the gate cur- rent can not be neglected. In this case, following action will be considered to avoid heat up of type M51996 20 2 Ss 15 Vos= WwW I oO Vos=200V DRAIN < I 5 Vos=320V t!o o S 10 = 2 a 3 Cop F Cos, t reot ly Vo x i a t Cos w 5 Ves E < SOURCE oO 0 4 8 12 16 20 TOTAL STORED GATE CHARGE (nC) Fig. 35 The relation between applied gate-source voltage and stored gate charge il; To attach the heatsink to type M51996 2: To use the printed circuit board with the good ther- mal conductivity (3! To use the buffer circuit shown next section (3)Output buffer circuit It is recommended to use the output buffer circuit as shown in Fig. 36, when type M51996 drives the large capacitive load or bipolar transistor. Vour [- M51996 | o, 7 cad Fig. 36 Output buffer circuit diagram DET Fig. 37 shows how to use the DET circuit for the voltage detector and error amplifier. For the phase shift compensation, it is recommended to connected the CR network between DET terminal and F/B terminal. A Cc ci #2 DETECTING Ny pr b, VOLTAGE F/B ij | 4 4p aw a R M51996 Ce DET 3 Oo T | Fig. 37. How to use the DET circuit for the voltage detector Fig. 38 shows the gain-frequency characteristics between point B and point C shown in Fig. 37. The G;,@, and , are given by following euqations; At the start of the operation, there happen to be no output pulse due to F/B terminal current through C; and Cz, as the potential of F/B terminal rises sharply just after the start of the operation. Not to lack the output pulse, is recommended to connect the capacitor C, as shown by broken line. Please take notice that the current flows through the R, and R. are superposed to Icc:srart;}. Not to superpose, R, is connected to Cycc2 as shown in Fig. 20 Gavoer (DC VOLTAGE GAIN) logG (dB) Gy o; M2 = Log Fig. 38 Gain-frequency characteristics between point B and C shown in Fig. 37 How to get the narrow pulse width during the start of operation Fig. 39 shows how to get the narrow pulse width during the start of the operation. If the pulse train of forcedly narrowed pulse-width continues too long, the misstart of operation may happen, so it is recommended to make the output pulse width narrow only for a few pulse at the start of op- eration 0.14F is recommended for the C. MITSUBISHI 552 ELECTRICNUTSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL F/B M51996 fC. \ 2 1009 TO PHOTO c COUPLER I Fig. 39 How to get the narrow pulse width during the start of operation How to synchronize with external circuit Type M51996 has no function to synchronize with external circuit, however, there is some application circuit for syn- chronization as shown in Fig. 40. MS1996 T-ON CF T-OFF SYNCHRONOUS PULSE oO 22 $ / =P ow a> L Os ~ Sf D < o = ov N z= ef 9 2 OV > 3 MINIMUM PULSE QO WIDTH OF MAXIMUM PULSE WIDTH OF SYNCHRONOUS SYNCHRONOUS PULSE PULSE Fig. 40 How to synchronize with externat circuit Driver circuit for bipolar transistor When the bipolar transistor is used instead of MOS-FET, the base current of bipolar transistor must be sinked by the negative base voltage source for the switching-off duration. in order to make the switching speed of bipolar transistor fast one In this case, over current can not be detected by detecting resistor in series to bipolar transistor, so it is recommended to use the CT(current transformer). For the low current rating transistor, type M51996 can drive it directly as shown in Fig, 42. S| a _ 4 ; COLLECTOR : Vec Jd Vour BIPOLAR M51996 bef Poy -{ TRANSISTOR Mand | i GND __EMITTER | 3 | og a o Fig. 42 Driver circuit diagram (2) for small bipolar transistor L, | Veo COLLECTOR 3) T va | Vout M51996 Vss [| GND EMITTER (-2v~5V) ] L Fig. 41 Driver circuit diagram (1) for bipolar transistor MITSUBISHI ELECTRIC 553MITSUBISHI <Dig./Ana. INTERFACE> M51996P,FP SWITCHING REGULATOR CONTROL Attention for heat generation The maximum ambient temperature of type M51996 is + 85C, however, the ambient temperature in vicinity of the IC is not uniform and varies piace by place, as the amount of power dissipation is fearly large and the power dissipation is generated locally in the switching regulator. So it is one of the good idea to check the IC package temperature. The temperature difference between IC junc- tion and the surface of IC package is 15C or less, when the IC junction temperature is measured by temperature dependency of forward voltage of pn junction, and IC pack- age temperature is measured by thermo-viewer, and also the IC is mounted on the phenol-base PC board in normal atmosphere. So it is conciuded that the maximum case temperature (surface temperature of IC) rating is 120C with adequate margin. 554 MITSUBISH l ELECTRIC