October 2003 P1817A/B
rev 1.0
Alliance Semiconductor
2575, Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.
Low-Power Mobile VGA EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Generates a low EMI spread spectrum clock of the
input frequency.
Optimized for frequency range from:
o P1817A – 20 to 30MHz. Operation
o P1817B – 10 to 20MHz Operation
Internal loop filter minimizes external components
and board space.
Two selectable spread ranges.
Low inherent cycle-to-cycle jitter.
3.3V or 5V operating voltage range.
TTL or CMOS compatible outputs.
Ultra-low power CMOS design.
3.17mA @3.3V, 10MHz | 6.20mA@5.0V, 10MHz
4.28mA @3.3V, 14MHz | 7.50mA @5.0V, 14MHz
5.50mA @3.3V, 20MHz | 9.50mA @5.0V, 20MHz
Supports notebook VGA and other LCD timing
controller applications.
SSON pin for Spread Spectrum On/Off and
Standby Mode controls.
Available in 8-pin SOIC and TSSOP.
Product Description
The P1817 is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1817 reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of
down stream clock and data dependent signals. The P1817
allows significant system cost savings by reducing the
number of circuit board layers ferrite beads, shielding and
other passive components that are traditionally required to
pass EMI regulations.
The P1817 modulates the output of a single PLL in order to
“spread” the bandwidth of a synthesized clock, and more
importantly, decreases the peak amplitudes of its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
The P1817 uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
Applications
The P1817 is targeted towards notebook VGA chip and
other displays using an LVDS interface, PC peripheral
devices, and embedded systems.
Block Diagram
VSS
XIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter VCO Output
Divider
ModOUT
PLL
VDD
SSON
SR0
Ref
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Notice: The information in this document is subject to change without notice.
ModOUT
1
2
3
4 5
6
7
8
P1817A/B
XIN /CLKIN
VSS
SR0
SSON/SBM
REF
VDD
XOUT
Pin Configuration
Pin Description
Pin# Pin Name Type Description
1 XIN/CLKIN I
Connect to externally generated clock signal. To put the part into standby
mode, disable the input clock signal to this pin and pull SSON/SBM (pin 4)
low. Refer Standby Mode Selection Table.
2 VSS P Ground Connection. Connect to system ground.
3 SR0 I
Digital logic input used to select Spreading Range. Refer Spread Spectrum
Selection Table. This pin has an internal pull-up resistor.
4 SSON/SBM I Spread Spectrum On/Off and standby mode control. Refer Standby Mode
Selection Table.
5 ModOUT O
Spread spectrum clock output or reference output. Refer Standby Mode
Selection Table.
6 REF O Reference output.
7 VDD P Connect to +3.3V or 5.0V.
8 XOUT O Connect to crystal. No connect if externally generated clock signal is used.
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Notice: The information in this document is subject to change without notice.
Standby Mode Selection
CLKIN SSON/SBM Spread
Spectrum ModOUT PLL Mode
Disabled 0 N/A Disabled Disabled Standby
Disabled 1 N/A Disabled Free Running Free Running
Enabled 0 Off Reference Disabled Buffer out
Enabled 1 On Normal Normal Normal
Spread Range Selection, VDD = 5V
CLKIN frequency SR0 Spreading Range Modulation Rate
1 ± 1.5%
10 MHz 0 ± 1.9%
1 ± 1.36%
14.318MHz 0 ± 1.64%
1 ± 1.3%
15MHz 0 ± 1.5%
1 ± 0.95%
20MHz 0 ± 1.125%
(CLKIN/10) * 20.83KHz
Spread Range Selection, VDD = 3.3V
CLKIN frequency SR0 Spreading Range Modulation Rate
1 ± 1.5%
10 MHz 0 ± 1.65%
1 ± 1.4%
14.318MHz 0 ± 1.7%
1 ± 1.37%
15MHz 0 ± 1.63%
1 ± 1.1%
20MHz 0 ± 1.28%
(CLKIN/10) * 20.83KHz
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Notice: The information in this document is subject to change without notice.
Schematic for Notebook VGA Application
1. To set the P1817 to standby mode, disable the input clock (pin 1 CLKIN), and pull pin 4 SSON/SBM low.
VDD
1
VDD
VDD
2
3
4
5
6
7
8
Ferrite
Bead
0.1µF
0
0
0
0
CLKIN/
XIN
VSS
SR0
SSON/
SBM ModOUT
REF
VDD
XOUT
Use either pull-up or pull-down
resistors with 0Ω.
Pull pin 4 low to turn Spread Spectrum
off and enable Standby Mode1.
10 to 20 MHz and 20 to 32 MHz EMI
reduced clock output.
P1817A/B
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Notice: The information in this document is subject to change without notice.
Absolute Maximum Ratings
Symbol Parameter Rating Unit
VDD, VIN Voltage on any pin with respect to GND -0.5 to + 7.0 V
TSTG Storage temperature -65 to +125 °C
TA Operating temperature 0 to 70 °C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
VIL Input low voltage GND – 0.3 - 0.8 V
VIH Input high voltage 2.0 - VDD + 0.3 V
IIL Input low current (pull-up resistors on inputs SR0 and
SSON/SBM) - - -35 µA
IIH Input high current (pull-down resistor on input SSON#) - - 35 µA
@ 0.4V, VDD = 3.3V - 3 -
IXOL X
OUT output low current @ 0.4V, VDD = 5.0V - 20 - mA
@ 2.5V, VDD = 3.3V - 3 -
IXOH X
OUT output high current @ 4.5V, VDD = 5.0V - 20 - mA
VDD =3.3V, IOL = 20mA - - 0.4
VOL Output low voltage VDD =5.0V, IOL = 20mA - - - V
VDD =3.3V, IOH = 20mA 2.5 - -
VOH Output high voltage VDD =5.0V, IOH = 20mA 4.5 - - V
Normal Mode fIN-min f
IN-typ f
IN-max
3.3V and 10pF loading 3.2 - 7.0
ICC Dynamic supply current
normal mode 5.0V and 10pF loading 6.2 - 13.6
mA
IDD Static supply current standby mode - 0.6 - mA
VDD Operating voltage 2.7 3.3 5.5 V
tON Power up time (first locked clock cycle after power up) - 0.18 - mS
ZOUT Clock output impedance - 50 -
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Notice: The information in this document is subject to change without notice.
AC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
fIN Input frequency (See device type P1817A or P1817B). 10 - 32 MHz
fOUT Output frequency (See device type P1817A or P1817B). 10 - 32 MHz
Measured at 0.8V to 2.0V 0.7 0.9 1.1 ns
tLH* Output rise time Measured at 1.2V to 3.75V - 0.75 - ns
Measured at 0.8V to 2.0V 0.6 0.8 1.0 ns
tHL* Output fall time Measured at 1.2V to 3.75V - 0.75 - ns
tJC Jitter (cycle to cycle) - - 360 ps
tD Output duty cycle 45 50 55 %
*tLH and tHL are measured into a capacitive load of 15pF
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Notice: The information in this document is subject to change without notice.
D
EH
D
A1
A2
A
θ
L
C
B
e
Package Information
Mechanical Package Outline 8-Pin SOIC
Symbol Dimensions in inches Dimensions in millimeters
Min Max Min Max
A 0.057 0.071 1.45 1.80
A1 0.004 0.010 0.10 0.25
A2 0.053 0.069 1.35 1.75
B 0.012 0.020 0.31 0.51
C 0.004 0.01 0.10 0.25
D 0.186 0.202 4.72 5.12
E 0.148 0.164 3.75 4.15
e 0.050 BSC 1.27 BSC
H 0.224 0.248 5.70 6.30
L 0.012 0.028 0.30 0.70
θ
Note: Controlling dimensions are millimeters
SOIC – 0.074 grams unit weight
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Notice: The information in this document is subject to change without notice.
E
H
A
A1
A2
D
B
C
L
θ
e
Mechanical Package Outline 8-Pin TSSOP
Dimensions in inches Dimensions in millimeters
Symbol Min Max Min Max
A 0.047 1.10
A1 0.002 0.006 0.05 0.15
A2 0.031 0.041 0.80 1.05
B 0.007 0.012 0.19 0.30
C 0.004 0.008 0.09 0.20
D 0.114 0.122 2.90 3.10
E 0.169 0.177 4.30 4.50
e 0.026 BSC 0.65 BSC
H 0.244 0.260 6.20 6.60
L 0.018 0.030 0.45 0.75
θ 0° 8° 0° 8°
Note: Controlling dimensions are millimeters
TSSOP – 0.034 grams unit weight
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Notice: The information in this document is subject to change without notice.
Ordering Codes
Part Number Marking
Input
Frequency
(MHz)
Package Type Pb
Free
Qty per
reel
Temperature
(°C)
P1817A-08ST P1817A 20-32 8-pin SOIC, tube No 0 to 70
P1817AF-08ST P1817AF 20-32 8-pin SOIC, tube Yes 0 to 70
I1817A-08SR I1817A 20-32 8-pin SOIC, tape & reel No 2500 -20 to 85
I1817BF-08TR I1817BF 10-20 8-pin SOIC, tape & reel Yes 2500 -20 to 85
Device Ordering Information
X1817X X- 08 XX
Licensed under US patent Nos 5,488,627 and 5,631,920.
Preliminary datasheet. Specification subject to change without notice.
OR - SOT23/T/R SR - SOIC, T/R
TT – TSSOP, TUBE QR – QFN, T/R
TR - TSSOP, T/R QT - QFN, TUBE
VT – TVSOP, TUBE BT - BGA, TUBE
VR – TVSOP, T/R BR – BGA, T/R
ST – SOIC, TUBE
F = Pb FREE
DEVICE NUMBER
Flow:
P = Commercial Temperature Range (0°C to 70°C)
I = Industrial Tem
p
erature Ran
g
e
(
-25°C to 85°C
)
Pin Count
October 2003 P1817A/B
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Notice: The information in this document is subject to change without notice.
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
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Alliance Semiconductor Corporation
2595, Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Fax: 408-855-4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: P1817A/B
Document Version: v1.0