Preliminary Technical Data
AD1986
Rev. 0 | Page 33 of 52
EQ CONTROL REGISTER (REGISTER 0x60)
Register 0x60 is a read/write register that controls equalizer function and data setup. The register also contains the Biquad and coefficient
address pointer, which is used in conjunction with the EQ data register (0x78) to setup the equalizer coefficients. The reset default
disables the equalizer function until the coefficients can be properly set up by the software and sets the symmetry bit to allow equal
coefficients for left and right channels.
Reg Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0x60 EQ
Control
EQM x x x x x x x SYM CHS BCA5 BCA4 BCA3 BCA2 BCA1 BCA0 0x8080
Table 56. Biquad and Coefficient Address Pointer
BCA [5,0] Biquad 0 Coef a0 BCA [5,0] = 011011
Biquad 0 Coef a1 BCA [5,0] = 011010
Biquad 0 Coef a2 BCA [5,0] = 011001
Biquad 0 Coef b1 BCA [5,0] = 011101
Biquad 0 Coef b2 BCA [5,0] = 011100
Biquad 1 Coef a0 BCA [5,0] = 100000
Biquad 1 Coef a1 BCA [5,0] = 011111
Biquad 1 Coef a2 BCA [5,0] = 011110
Biquad 1 Coef b1 BCA [5,0] = 100010
Biquad 1 Coef b2 BCA [5,0] = 100001
Biquad 2 Coef a0 BCA [5,0] = 100101
Biquad 2 Coef a1 BCA [5,0] = 100100
Biquad 2 Coef a2 BCA [5,0] = 100011
Biquad 2 Coef b1 BCA [5,0] = 100111
Biquad 2 Coef b2 BCA [5,0] = 100110
Biquad 3 Coef a0 BCA [5,0] = 101010
Biquad 3 Coef a1 BCA [5,0] = 101001
Biquad 3 Coef a2 BCA [5,0] = 101000
Biquad 3 Coef b1 BCA [5,0] = 101100
Biquad 3 Coef b2 BCA [5,0] = 101011
Biquad 4 Coef a0 BCA [5,0] = 101111
Biquad 4 Coef a1 BCA [5,0] = 101110
Biquad 4 Coef a2 BCA [5,0] = 101101
Biquad 4 Coef b1 BCA [5,0] = 110001
Biquad 4 Coef b2 BCA [5,0] = 110000
Biquad 5 Coef a0 BCA [5,0] = 110100
Biquad 5 Coef a1 BCA [5,0] = 110011
Biquad 5 Coef a2 BCA [5,0] = 110010
Biquad 5 Coef b1 BCA [5,0] = 110110
Biquad 5 Coef b2 BCA [5,0] = 110101
Biquad 6 Coef a0 BCA [5,0] = 111001
Biquad 6 Coef a1 BCA [5,0] = 111000
Biquad 6 Coef a2 BCA [5,0] = 110111
Biquad 6 Coef b1 BCA [5,0] = 111011
Biquad 6 Coef b2 BCA [5,0] = 111010
Table 57.
Register Function
Swaps the blocks that are used for symmetry coefficients. Only valid when the SYM bit is set.
CHS Function Default
0 Selects left channel coefficients data block Default
CHS
(Channel
Select)
1 Selects right channel coefficients data block
When set to 1 this bit indicates that the left and right channel coefficients are equal.
This shortens the coefficients setup sequence since only the left channel coefficients need to be addressed and setup. The
right channel coefficients are simultaneously copied into memory.
SYM Function
0 Left and right channels can use different coefficients
SYM
(Symmetry)
1 Indicates that the left and right channel coefficients are equal Default
When set to 1, this bit disables the equalizer function (allows all data pass-through). The reset default sets this bit to 1
disabling the equalizer function until the biquad coefficients can be properly set.
EQM Function
0 EQ is enabled.
EQM
(Equalizer
Mute)
1 EQ is disabled. Data will pass-thru without change. Default
x Reserved. Default: 0